From 75a75a7ddcdc0ea45941ecc7593900824a088715 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Feb 2013 10:01:27 +0000 Subject: Fixed bug 3602150. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5096 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F0xx/stm32_rcc.h | 54 ++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) (limited to 'os/hal/platforms/STM32F0xx/stm32_rcc.h') diff --git a/os/hal/platforms/STM32F0xx/stm32_rcc.h b/os/hal/platforms/STM32F0xx/stm32_rcc.h index d10aa6de7..2db4b26fa 100644 --- a/os/hal/platforms/STM32F0xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F0xx/stm32_rcc.h @@ -528,6 +528,60 @@ * @api */ #define rccResetUSART2() rccResetAPB1(RCC_APB1RSTR_USART2RST) + +/** + * @brief Enables the CRC peripheral clock. + * @note The @p lp parameter is ignored in this family. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableCRC(lp) rccEnableAHB(RCC_AHBENR_CRCEN, lp) + +/** + * @brief Disables the CRC peripheral clock. + * @note The @p lp parameter is ignored in this family. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableCRC(lp) rccDisableAHB(RCC_AHBENR_CRCEN, lp) + +/** + * @brief Resets the CRC peripheral. + * + * @api + */ +#define rccResetCRC() rccResetAHB(RCC_AHBRSTR_CRCRST) + +/** + * @brief Enables the WWDG peripheral clock. + * @note The @p lp parameter is ignored in this family. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccEnableWWDG(lp) rccEnableAPB1(RCC_APB1ENR_WWDGEN, lp) + +/** + * @brief Disables the WWDG peripheral clock. + * @note The @p lp parameter is ignored in this family. + * + * @param[in] lp low power enable flag + * + * @api + */ +#define rccDisableWWDG(lp) rccDisableAPB1(RCC_APB1ENR_WWDGEN, lp) + +/** + * @brief Resets the WWDG peripheral. + * + * @api + */ +#define rccResetWWDG() rccResetAPB1(RCC_APB1RSTR_WWDGRST) /** @} */ /*===========================================================================*/ -- cgit v1.2.3