From 7cfab88550523fc375231131f3043d7fe82ebc29 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Apr 2013 18:41:34 +0000 Subject: Added support for timers 6, 7, 9, 11, 12, 14 to the STM32 GPT driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5551 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/gpt_lld.c | 294 +++++++++++++++++++++++++++++++++++++++ os/hal/platforms/STM32/gpt_lld.h | 183 +++++++++++++++++++++++- 2 files changed, 474 insertions(+), 3 deletions(-) (limited to 'os/hal/platforms/STM32') diff --git a/os/hal/platforms/STM32/gpt_lld.c b/os/hal/platforms/STM32/gpt_lld.c index 98aca51a5..35268fbe5 100644 --- a/os/hal/platforms/STM32/gpt_lld.c +++ b/os/hal/platforms/STM32/gpt_lld.c @@ -75,6 +75,22 @@ GPTDriver GPTD4; GPTDriver GPTD5; #endif +/** + * @brief GPTD6 driver identifier. + * @note The driver GPTD6 allocates the timer TIM6 when enabled. + */ +#if STM32_GPT_USE_TIM6 || defined(__DOXYGEN__) +GPTDriver GPTD6; +#endif + +/** + * @brief GPTD7 driver identifier. + * @note The driver GPTD7 allocates the timer TIM7 when enabled. + */ +#if STM32_GPT_USE_TIM7 || defined(__DOXYGEN__) +GPTDriver GPTD7; +#endif + /** * @brief GPTD8 driver identifier. * @note The driver GPTD8 allocates the timer TIM8 when enabled. @@ -83,6 +99,38 @@ GPTDriver GPTD5; GPTDriver GPTD8; #endif +/** + * @brief GPTD9 driver identifier. + * @note The driver GPTD9 allocates the timer TIM9 when enabled. + */ +#if STM32_GPT_USE_TIM9 || defined(__DOXYGEN__) +GPTDriver GPTD9; +#endif + +/** + * @brief GPTD11 driver identifier. + * @note The driver GPTD11 allocates the timer TIM11 when enabled. + */ +#if STM32_GPT_USE_TIM11 || defined(__DOXYGEN__) +GPTDriver GPTD11; +#endif + +/** + * @brief GPTD12 driver identifier. + * @note The driver GPTD12 allocates the timer TIM12 when enabled. + */ +#if STM32_GPT_USE_TIM12 || defined(__DOXYGEN__) +GPTDriver GPTD12; +#endif + +/** + * @brief GPTD14 driver identifier. + * @note The driver GPTD14 allocates the timer TIM14 when enabled. + */ +#if STM32_GPT_USE_TIM14 || defined(__DOXYGEN__) +GPTDriver GPTD14; +#endif + /*===========================================================================*/ /* Driver local variables and types. */ /*===========================================================================*/ @@ -205,6 +253,44 @@ CH_IRQ_HANDLER(STM32_TIM5_HANDLER) { } #endif /* STM32_GPT_USE_TIM5 */ +#if STM32_GPT_USE_TIM6 +#if !defined(STM32_TIM6_HANDLER) +#error "STM32_TIM6_HANDLER not defined" +#endif +/** + * @brief TIM6 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(STM32_TIM6_HANDLER) { + + CH_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD6); + + CH_IRQ_EPILOGUE(); +} +#endif /* STM32_GPT_USE_TIM6 */ + +#if STM32_GPT_USE_TIM7 +#if !defined(STM32_TIM7_HANDLER) +#error "STM32_TIM7_HANDLER not defined" +#endif +/** + * @brief TIM7 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(STM32_TIM7_HANDLER) { + + CH_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD7); + + CH_IRQ_EPILOGUE(); +} +#endif /* STM32_GPT_USE_TIM7 */ + #if STM32_GPT_USE_TIM8 #if !defined(STM32_TIM8_UP_HANDLER) #error "STM32_TIM8_UP_HANDLER not defined" @@ -224,6 +310,82 @@ CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) { } #endif /* STM32_GPT_USE_TIM8 */ +#if STM32_GPT_USE_TIM9 +#if !defined(STM32_TIM9_HANDLER) +#error "STM32_TIM9_HANDLER not defined" +#endif +/** + * @brief TIM9 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(STM32_TIM9_HANDLER) { + + CH_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD9); + + CH_IRQ_EPILOGUE(); +} +#endif /* STM32_GPT_USE_TIM9 */ + +#if STM32_GPT_USE_TIM11 +#if !defined(STM32_TIM11_HANDLER) +#error "STM32_TIM11_HANDLER not defined" +#endif +/** + * @brief TIM11 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(STM32_TIM11_HANDLER) { + + CH_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD11); + + CH_IRQ_EPILOGUE(); +} +#endif /* STM32_GPT_USE_TIM11 */ + +#if STM32_GPT_USE_TIM12 +#if !defined(STM32_TIM12_HANDLER) +#error "STM32_TIM12_HANDLER not defined" +#endif +/** + * @brief TIM12 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(STM32_TIM12_HANDLER) { + + CH_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD12); + + CH_IRQ_EPILOGUE(); +} +#endif /* STM32_GPT_USE_TIM12 */ + +#if STM32_GPT_USE_TIM14 +#if !defined(STM32_TIM14_HANDLER) +#error "STM32_TIM14_HANDLER not defined" +#endif +/** + * @brief TIM14 interrupt handler. + * + * @isr + */ +CH_IRQ_HANDLER(STM32_TIM14_HANDLER) { + + CH_IRQ_PROLOGUE(); + + gpt_lld_serve_interrupt(&GPTD14); + + CH_IRQ_EPILOGUE(); +} +#endif /* STM32_GPT_USE_TIM14 */ + /*===========================================================================*/ /* Driver exported functions. */ /*===========================================================================*/ @@ -265,11 +427,47 @@ void gpt_lld_init(void) { gptObjectInit(&GPTD5); #endif +#if STM32_GPT_USE_TIM6 + /* Driver initialization.*/ + GPTD6.tim = STM32_TIM6; + gptObjectInit(&GPTD6); +#endif + +#if STM32_GPT_USE_TIM7 + /* Driver initialization.*/ + GPTD7.tim = STM32_TIM7; + gptObjectInit(&GPTD7); +#endif + #if STM32_GPT_USE_TIM8 /* Driver initialization.*/ GPTD8.tim = STM32_TIM8; gptObjectInit(&GPTD8); #endif + +#if STM32_GPT_USE_TIM9 + /* Driver initialization.*/ + GPTD9.tim = STM32_TIM9; + gptObjectInit(&GPTD9); +#endif + +#if STM32_GPT_USE_TIM11 + /* Driver initialization.*/ + GPTD11.tim = STM32_TIM11; + gptObjectInit(&GPTD11); +#endif + +#if STM32_GPT_USE_TIM12 + /* Driver initialization.*/ + GPTD12.tim = STM32_TIM12; + gptObjectInit(&GPTD12); +#endif + +#if STM32_GPT_USE_TIM14 + /* Driver initialization.*/ + GPTD14.tim = STM32_TIM14; + gptObjectInit(&GPTD14); +#endif } /** @@ -331,6 +529,26 @@ void gpt_lld_start(GPTDriver *gptp) { } #endif +#if STM32_GPT_USE_TIM6 + if (&GPTD6 == gptp) { + rccEnableTIM6(FALSE); + rccResetTIM6(); + nvicEnableVector(STM32_TIM6_NUMBER, + CORTEX_PRIORITY_MASK(STM32_GPT_TIM6_IRQ_PRIORITY)); + gptp->clock = STM32_TIMCLK1; + } +#endif + +#if STM32_GPT_USE_TIM7 + if (&GPTD7 == gptp) { + rccEnableTIM7(FALSE); + rccResetTIM7(); + nvicEnableVector(STM32_TIM7_NUMBER, + CORTEX_PRIORITY_MASK(STM32_GPT_TIM7_IRQ_PRIORITY)); + gptp->clock = STM32_TIMCLK1; + } +#endif + #if STM32_GPT_USE_TIM8 if (&GPTD8 == gptp) { rccEnableTIM8(FALSE); @@ -340,6 +558,46 @@ void gpt_lld_start(GPTDriver *gptp) { gptp->clock = STM32_TIMCLK2; } #endif + +#if STM32_GPT_USE_TIM9 + if (&GPTD9 == gptp) { + rccEnableTIM9(FALSE); + rccResetTIM9(); + nvicEnableVector(STM32_TIM9_NUMBER, + CORTEX_PRIORITY_MASK(STM32_GPT_TIM9_IRQ_PRIORITY)); + gptp->clock = STM32_TIMCLK2; + } +#endif + +#if STM32_GPT_USE_TIM11 + if (&GPTD11 == gptp) { + rccEnableTIM11(FALSE); + rccResetTIM11(); + nvicEnableVector(STM32_TIM11_NUMBER, + CORTEX_PRIORITY_MASK(STM32_GPT_TIM11_IRQ_PRIORITY)); + gptp->clock = STM32_TIMCLK2; + } +#endif + +#if STM32_GPT_USE_TIM12 + if (&GPTD12 == gptp) { + rccEnableTIM12(FALSE); + rccResetTIM12(); + nvicEnableVector(STM32_TIM12_NUMBER, + CORTEX_PRIORITY_MASK(STM32_GPT_TIM12_IRQ_PRIORITY)); + gptp->clock = STM32_TIMCLK1; + } +#endif + +#if STM32_GPT_USE_TIM14 + if (&GPTD14 == gptp) { + rccEnableTIM14(FALSE); + rccResetTIM14(); + nvicEnableVector(STM32_TIM14_NUMBER, + CORTEX_PRIORITY_MASK(STM32_GPT_TIM14_IRQ_PRIORITY)); + gptp->clock = STM32_TIMCLK1; + } +#endif } /* Prescaler value calculation.*/ @@ -398,11 +656,47 @@ void gpt_lld_stop(GPTDriver *gptp) { rccDisableTIM5(FALSE); } #endif +#if STM32_GPT_USE_TIM6 + if (&GPTD6 == gptp) { + nvicDisableVector(STM32_TIM6_NUMBER); + rccDisableTIM6(FALSE); + } +#endif +#if STM32_GPT_USE_TIM7 + if (&GPTD7 == gptp) { + nvicDisableVector(STM32_TIM7_NUMBER); + rccDisableTIM7(FALSE); + } +#endif #if STM32_GPT_USE_TIM8 if (&GPTD8 == gptp) { nvicDisableVector(STM32_TIM8_UP_NUMBER); rccDisableTIM8(FALSE); } +#endif +#if STM32_GPT_USE_TIM9 + if (&GPTD9 == gptp) { + nvicDisableVector(STM32_TIM9_NUMBER); + rccDisableTIM9(FALSE); + } +#endif +#if STM32_GPT_USE_TIM11 + if (&GPTD11 == gptp) { + nvicDisableVector(STM32_TIM11_NUMBER); + rccDisableTIM11(FALSE); + } +#endif +#if STM32_GPT_USE_TIM12 + if (&GPTD12 == gptp) { + nvicDisableVector(STM32_TIM12_NUMBER); + rccDisableTIM12(FALSE); + } +#endif +#if STM32_GPT_USE_TIM14 + if (&GPTD14 == gptp) { + nvicDisableVector(STM32_TIM14_NUMBER); + rccDisableTIM14(FALSE); + } #endif } } diff --git a/os/hal/platforms/STM32/gpt_lld.h b/os/hal/platforms/STM32/gpt_lld.h index d547bb68b..ecb1dcb35 100644 --- a/os/hal/platforms/STM32/gpt_lld.h +++ b/os/hal/platforms/STM32/gpt_lld.h @@ -84,6 +84,24 @@ #define STM32_GPT_USE_TIM5 FALSE #endif +/** + * @brief GPTD6 driver enable switch. + * @details If set to @p TRUE the support for GPTD6 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_GPT_USE_TIM6) || defined(__DOXYGEN__) +#define STM32_GPT_USE_TIM6 FALSE +#endif + +/** + * @brief GPTD7 driver enable switch. + * @details If set to @p TRUE the support for GPTD7 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_GPT_USE_TIM7) || defined(__DOXYGEN__) +#define STM32_GPT_USE_TIM7 FALSE +#endif + /** * @brief GPTD8 driver enable switch. * @details If set to @p TRUE the support for GPTD8 is included. @@ -93,6 +111,42 @@ #define STM32_GPT_USE_TIM8 FALSE #endif +/** + * @brief GPTD9 driver enable switch. + * @details If set to @p TRUE the support for GPTD9 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_GPT_USE_TIM9) || defined(__DOXYGEN__) +#define STM32_GPT_USE_TIM9 FALSE +#endif + +/** + * @brief GPTD11 driver enable switch. + * @details If set to @p TRUE the support for GPTD11 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_GPT_USE_TIM11) || defined(__DOXYGEN__) +#define STM32_GPT_USE_TIM11 FALSE +#endif + +/** + * @brief GPTD12 driver enable switch. + * @details If set to @p TRUE the support for GPTD12 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_GPT_USE_TIM12) || defined(__DOXYGEN__) +#define STM32_GPT_USE_TIM12 FALSE +#endif + +/** + * @brief GPTD14 driver enable switch. + * @details If set to @p TRUE the support for GPTD14 is included. + * @note The default is @p TRUE. + */ +#if !defined(STM32_GPT_USE_TIM14) || defined(__DOXYGEN__) +#define STM32_GPT_USE_TIM14 FALSE +#endif + /** * @brief GPTD1 interrupt priority level setting. */ @@ -129,11 +183,53 @@ #endif /** - * @brief GPTD5 interrupt priority level setting. + * @brief GPTD6 interrupt priority level setting. + */ +#if !defined(STM32_GPT_TIM6_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD7 interrupt priority level setting. + */ +#if !defined(STM32_GPT_TIM7_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD8 interrupt priority level setting. */ #if !defined(STM32_GPT_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__) #define STM32_GPT_TIM8_IRQ_PRIORITY 7 #endif + +/** + * @brief GPTD9 interrupt priority level setting. + */ +#if !defined(STM32_GPT_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD11 interrupt priority level setting. + */ +#if !defined(STM32_GPT_TIM11_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD12 interrupt priority level setting. + */ +#if !defined(STM32_GPT_TIM12_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#endif + +/** + * @brief GPTD14 interrupt priority level setting. + */ +#if !defined(STM32_GPT_TIM14_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 +#endif /** @} */ /*===========================================================================*/ @@ -160,13 +256,40 @@ #error "TIM5 not present in the selected device" #endif +#if STM32_GPT_USE_TIM6 && !STM32_HAS_TIM6 +#error "TIM6 not present in the selected device" +#endif + +#if STM32_GPT_USE_TIM7 && !STM32_HAS_TIM7 +#error "TIM7 not present in the selected device" +#endif + #if STM32_GPT_USE_TIM8 && !STM32_HAS_TIM8 #error "TIM8 not present in the selected device" #endif +#if STM32_GPT_USE_TIM9 && !STM32_HAS_TIM9 +#error "TIM9 not present in the selected device" +#endif + +#if STM32_GPT_USE_TIM11 && !STM32_HAS_TIM11 +#error "TIM11 not present in the selected device" +#endif + +#if STM32_GPT_USE_TIM12 && !STM32_HAS_TIM12 +#error "TIM12 not present in the selected device" +#endif + +#if STM32_GPT_USE_TIM14 && !STM32_HAS_TIM14 +#error "TIM14 not present in the selected device" +#endif + #if !STM32_GPT_USE_TIM1 && !STM32_GPT_USE_TIM2 && \ - !STM32_GPT_USE_TIM3 && !STM32_GPT_USE_TIM4 && \ - !STM32_GPT_USE_TIM5 && !STM32_GPT_USE_TIM8 + !STM32_GPT_USE_TIM3 && !STM32_GPT_USE_TIM4 && \ + !STM32_GPT_USE_TIM5 && !STM32_GPT_USE_TIM6 && \ + !STM32_GPT_USE_TIM7 && !STM32_GPT_USE_TIM8 && \ + !STM32_GPT_USE_TIM9 && !STM32_GPT_USE_TIM11 && \ + !STM32_GPT_USE_TIM12 && !STM32_GPT_USE_TIM14 #error "GPT driver activated but no TIM peripheral assigned" #endif @@ -195,11 +318,41 @@ #error "Invalid IRQ priority assigned to TIM5" #endif +#if STM32_GPT_USE_TIM6 && \ + !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM6_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM6" +#endif + +#if STM32_GPT_USE_TIM7 && \ + !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM7_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM7" +#endif + #if STM32_GPT_USE_TIM8 && \ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM8_IRQ_PRIORITY) #error "Invalid IRQ priority assigned to TIM8" #endif +#if STM32_GPT_USE_TIM9 && \ + !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM9_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM9" +#endif + +#if STM32_GPT_USE_TIM11 && \ + !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM11_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM11" +#endif + +#if STM32_GPT_USE_TIM12 && \ + !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM12_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM12" +#endif + +#if STM32_GPT_USE_TIM14 && \ + !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_GPT_TIM14_IRQ_PRIORITY) +#error "Invalid IRQ priority assigned to TIM14" +#endif + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ @@ -303,10 +456,34 @@ extern GPTDriver GPTD4; extern GPTDriver GPTD5; #endif +#if STM32_GPT_USE_TIM6 && !defined(__DOXYGEN__) +extern GPTDriver GPTD6; +#endif + +#if STM32_GPT_USE_TIM7 && !defined(__DOXYGEN__) +extern GPTDriver GPTD7; +#endif + #if STM32_GPT_USE_TIM8 && !defined(__DOXYGEN__) extern GPTDriver GPTD8; #endif +#if STM32_GPT_USE_TIM9 && !defined(__DOXYGEN__) +extern GPTDriver GPTD9; +#endif + +#if STM32_GPT_USE_TIM11 && !defined(__DOXYGEN__) +extern GPTDriver GPTD11; +#endif + +#if STM32_GPT_USE_TIM12 && !defined(__DOXYGEN__) +extern GPTDriver GPTD12; +#endif + +#if STM32_GPT_USE_TIM14 && !defined(__DOXYGEN__) +extern GPTDriver GPTD14; +#endif + #ifdef __cplusplus extern "C" { #endif -- cgit v1.2.3