From 49754b31dc6bdcee0c8f0a2eeb83a615231b5615 Mon Sep 17 00:00:00 2001 From: liamstask Date: Mon, 12 Jul 2010 16:54:48 +0000 Subject: * fix typo in STM32 SPI DMA priority macro * add support for SPI3 on STM32 connectivity line devices (deselected by default) git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2074 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/spi_lld.h | 43 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-) (limited to 'os/hal/platforms/STM32/spi_lld.h') diff --git a/os/hal/platforms/STM32/spi_lld.h b/os/hal/platforms/STM32/spi_lld.h index a6ccb8467..4b44a2750 100644 --- a/os/hal/platforms/STM32/spi_lld.h +++ b/os/hal/platforms/STM32/spi_lld.h @@ -56,13 +56,22 @@ #define USE_STM32_SPI2 TRUE #endif +/** + * @brief SPI3 driver enable switch. + * @details If set to @p TRUE the support for SPI3 is included. + * @note The default is @p TRUE. + */ +#if !defined(USE_STM32_SPI3) || defined(__DOXYGEN__) +#define USE_STM32_SPI3 FALSE +#endif + /** * @brief SPI1 DMA priority (0..3|lowest..highest). * @note The priority level is used for both the TX and RX DMA channels but * because of the channels ordering the RX channel has always priority * over the TX channel. */ -#if !defined(SPI1_DMA_PRIORITY) || defined(__DOXYGEN__) +#if !defined(STM32_SPI1_DMA_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI1_DMA_PRIORITY 2 #endif @@ -72,10 +81,20 @@ * because of the channels ordering the RX channel has always priority * over the TX channel. */ -#if !defined(SPI2_DMA_PRIORITY) || defined(__DOXYGEN__) +#if !defined(STM32_SPI2_DMA_PRIORITY) || defined(__DOXYGEN__) #define STM32_SPI2_DMA_PRIORITY 2 #endif +/** + * @brief SPI3 DMA priority (0..3|lowest..highest). + * @note The priority level is used for both the TX and RX DMA channels but + * because of the channels ordering the RX channel has always priority + * over the TX channel. + */ +#if !defined(STM32_SPI3_DMA_PRIORITY) || defined(__DOXYGEN__) +#define STM32_SPI3_DMA_PRIORITY 2 +#endif + /** * @brief SPI1 interrupt priority level setting. */ @@ -90,6 +109,13 @@ #define STM32_SPI2_IRQ_PRIORITY 10 #endif +/** + * @brief SPI3 interrupt priority level setting. + */ +#if !defined(STM32_SPI3_IRQ_PRIORITY) || defined(__DOXYGEN__) +#define STM32_SPI3_IRQ_PRIORITY 10 +#endif + /** * @brief SPI1 DMA error hook. * @note The default action for DMA errors is a system halt because DMA error @@ -108,6 +134,15 @@ #define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() #endif +/** + * @brief SPI3 DMA error hook. + * @note The default action for DMA errors is a system halt because DMA error + * can only happen because programming errors. + */ +#if !defined(STM32_SPI3_DMA_ERROR_HOOK) || defined(__DOXYGEN__) +#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() +#endif + /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ @@ -195,6 +230,10 @@ extern SPIDriver SPID1; extern SPIDriver SPID2; #endif +#if USE_STM32_SPI3 && !defined(__DOXYGEN__) +extern SPIDriver SPID3; +#endif + #ifdef __cplusplus extern "C" { #endif -- cgit v1.2.3