From a152d4e54534be7ee3c00d47e656d8cc7e439379 Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Fri, 11 Aug 2017 13:22:02 +0000 Subject: Fixed Bug #869 git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10397 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c | 5 + os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h | 285 +++++++++++---------- os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk | 4 +- .../ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg | 5 +- 4 files changed, 155 insertions(+), 144 deletions(-) (limited to 'os/hal/boards') diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c index f56bd1a03..52b14f7e2 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c @@ -14,6 +14,11 @@ limitations under the License. */ +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + #include "hal.h" #if HAL_USE_PAL || defined(__DOXYGEN__) diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h index 788ca6d74..840cb354c 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h @@ -14,8 +14,13 @@ limitations under the License. */ -#ifndef _BOARD_H_ -#define _BOARD_H_ +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#ifndef BOARD_H +#define BOARD_H /* * Setup for STMicroelectronics STM32F3-Discovery board. @@ -24,7 +29,7 @@ /* * Board identifier. */ -#define BOARD_ST_STM32F3_DISCOVERY +#define BOARD_ST_STM32F3_DISCOVERY_REVC #define BOARD_NAME "STMicroelectronics STM32F3-Discovery" /* @@ -95,7 +100,7 @@ #define GPIOC_PIN2 2U #define GPIOC_PIN3 3U #define GPIOC_VCP_RX 4U -#define GPIOC_VCP_RX 5U +#define GPIOC_VCP_TX 5U #define GPIOC_PIN6 6U #define GPIOC_PIN7 7U #define GPIOC_PIN8 8U @@ -215,7 +220,7 @@ #define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 7U) #define LINE_VCP_RX PAL_LINE(GPIOC, 4U) -#define LINE_VCP_RX PAL_LINE(GPIOC, 5U) +#define LINE_VCP_TX PAL_LINE(GPIOC, 5U) #define LINE_OSC32_IN PAL_LINE(GPIOC, 14U) #define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U) @@ -363,22 +368,22 @@ PIN_ODR_HIGH(GPIOA_SWDIO) | \ PIN_ODR_HIGH(GPIOA_SWCLK) | \ PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0) | \ - PIN_AFIO_AF(GPIOA_PIN1, 0) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_PIN4, 0) | \ - PIN_AFIO_AF(GPIOA_SPI1_SCK, 5) | \ - PIN_AFIO_AF(GPIOA_SPI1_MISO, 5) | \ - PIN_AFIO_AF(GPIOA_SPI1_MOSI, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ - PIN_AFIO_AF(GPIOA_PIN9, 0) | \ - PIN_AFIO_AF(GPIOA_PIN10, 0) | \ - PIN_AFIO_AF(GPIOA_USB_DM, 14) | \ - PIN_AFIO_AF(GPIOA_USB_DP, 14) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0)) +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOA_SPI1_SCK, 5U) | \ + PIN_AFIO_AF(GPIOA_SPI1_MISO, 5U) | \ + PIN_AFIO_AF(GPIOA_SPI1_MOSI, 5U)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOA_USB_DM, 14U) | \ + PIN_AFIO_AF(GPIOA_USB_DP, 14U) | \ + PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ + PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ + PIN_AFIO_AF(GPIOA_PIN15, 0U)) /* * GPIOB setup: @@ -480,22 +485,22 @@ PIN_ODR_HIGH(GPIOB_PIN13) | \ PIN_ODR_HIGH(GPIOB_PIN14) | \ PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0) | \ - PIN_AFIO_AF(GPIOB_SWO, 0) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0) | \ - PIN_AFIO_AF(GPIOB_I2C1_SCL, 4) | \ - PIN_AFIO_AF(GPIOB_I2C1_SDA, 4)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_PIN9, 0) | \ - PIN_AFIO_AF(GPIOB_PIN10, 0) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0)) +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOB_SWO, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOB_I2C1_SCL, 4U) | \ + PIN_AFIO_AF(GPIOB_I2C1_SDA, 4U)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOB_PIN15, 0U)) /* * GPIOC setup: @@ -505,7 +510,7 @@ * PC2 - PIN2 (input pullup). * PC3 - PIN3 (input pullup). * PC4 - VCP_RX (alternate 7). - * PC5 - VCP_RX (alternate 7). + * PC5 - VCP_TX (alternate 7). * PC6 - PIN6 (input pullup). * PC7 - PIN7 (input pullup). * PC8 - PIN8 (input pullup). @@ -522,7 +527,7 @@ PIN_MODE_INPUT(GPIOC_PIN2) | \ PIN_MODE_INPUT(GPIOC_PIN3) | \ PIN_MODE_ALTERNATE(GPIOC_VCP_RX) | \ - PIN_MODE_ALTERNATE(GPIOC_VCP_RX) | \ + PIN_MODE_ALTERNATE(GPIOC_VCP_TX) | \ PIN_MODE_INPUT(GPIOC_PIN6) | \ PIN_MODE_INPUT(GPIOC_PIN7) | \ PIN_MODE_INPUT(GPIOC_PIN8) | \ @@ -538,7 +543,7 @@ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOC_VCP_RX) | \ - PIN_OTYPE_PUSHPULL(GPIOC_VCP_RX) | \ + PIN_OTYPE_PUSHPULL(GPIOC_VCP_TX) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ @@ -554,7 +559,7 @@ PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOC_VCP_RX) | \ - PIN_OSPEED_VERYLOW(GPIOC_VCP_RX) | \ + PIN_OSPEED_VERYLOW(GPIOC_VCP_TX) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \ @@ -570,7 +575,7 @@ PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ PIN_PUPDR_PULLUP(GPIOC_PIN3) | \ PIN_PUPDR_PULLUP(GPIOC_VCP_RX) | \ - PIN_PUPDR_PULLUP(GPIOC_VCP_RX) | \ + PIN_PUPDR_PULLUP(GPIOC_VCP_TX) | \ PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ PIN_PUPDR_PULLUP(GPIOC_PIN7) | \ PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ @@ -586,7 +591,7 @@ PIN_ODR_HIGH(GPIOC_PIN2) | \ PIN_ODR_HIGH(GPIOC_PIN3) | \ PIN_ODR_HIGH(GPIOC_VCP_RX) | \ - PIN_ODR_HIGH(GPIOC_VCP_RX) | \ + PIN_ODR_HIGH(GPIOC_VCP_TX) | \ PIN_ODR_HIGH(GPIOC_PIN6) | \ PIN_ODR_HIGH(GPIOC_PIN7) | \ PIN_ODR_HIGH(GPIOC_PIN8) | \ @@ -597,22 +602,22 @@ PIN_ODR_HIGH(GPIOC_PIN13) | \ PIN_ODR_HIGH(GPIOC_OSC32_IN) | \ PIN_ODR_HIGH(GPIOC_OSC32_OUT)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \ - PIN_AFIO_AF(GPIOC_PIN1, 0) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PIN3, 0) | \ - PIN_AFIO_AF(GPIOC_VCP_RX, 7) | \ - PIN_AFIO_AF(GPIOC_VCP_RX, 7) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_PIN7, 0)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_PIN10, 0) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_PIN12, 0) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_OSC32_IN, 0) | \ - PIN_AFIO_AF(GPIOC_OSC32_OUT, 0)) +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOC_VCP_RX, 7U) | \ + PIN_AFIO_AF(GPIOC_VCP_TX, 7U) | \ + PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN7, 0U)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOC_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \ + PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U)) /* * GPIOD setup: @@ -714,22 +719,22 @@ PIN_ODR_HIGH(GPIOD_PIN13) | \ PIN_ODR_HIGH(GPIOD_PIN14) | \ PIN_ODR_HIGH(GPIOD_PIN15)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_PIN4, 0) | \ - PIN_AFIO_AF(GPIOD_PIN5, 0) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0) | \ - PIN_AFIO_AF(GPIOD_PIN12, 0) | \ - PIN_AFIO_AF(GPIOD_PIN13, 0) | \ - PIN_AFIO_AF(GPIOD_PIN14, 0) | \ - PIN_AFIO_AF(GPIOD_PIN15, 0)) +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN7, 0U)) +#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOD_PIN15, 0U)) /* * GPIOE setup: @@ -831,22 +836,22 @@ PIN_ODR_LOW(GPIOE_LED10_RED) | \ PIN_ODR_LOW(GPIOE_LED8_ORANGE) | \ PIN_ODR_LOW(GPIOE_LED6_GREEN)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0) | \ - PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0) | \ - PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0) |\ - PIN_AFIO_AF(GPIOE_SPI1_CS, 0) | \ - PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0) |\ - PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0) |\ - PIN_AFIO_AF(GPIOE_PIN6, 0) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_LED4_BLUE, 0) | \ - PIN_AFIO_AF(GPIOE_LED3_RED, 0) | \ - PIN_AFIO_AF(GPIOE_LED5_ORANGE, 0) | \ - PIN_AFIO_AF(GPIOE_LED7_GREEN, 0) | \ - PIN_AFIO_AF(GPIOE_LED9_BLUE, 0) | \ - PIN_AFIO_AF(GPIOE_LED10_RED, 0) | \ - PIN_AFIO_AF(GPIOE_LED8_ORANGE, 0) | \ - PIN_AFIO_AF(GPIOE_LED6_GREEN, 0)) +#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | \ + PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | \ + PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0U) |\ + PIN_AFIO_AF(GPIOE_SPI1_CS, 0U) | \ + PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0U) |\ + PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0U) |\ + PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOE_PIN7, 0U)) +#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_LED4_BLUE, 0U) | \ + PIN_AFIO_AF(GPIOE_LED3_RED, 0U) | \ + PIN_AFIO_AF(GPIOE_LED5_ORANGE, 0U) | \ + PIN_AFIO_AF(GPIOE_LED7_GREEN, 0U) | \ + PIN_AFIO_AF(GPIOE_LED9_BLUE, 0U) | \ + PIN_AFIO_AF(GPIOE_LED10_RED, 0U) | \ + PIN_AFIO_AF(GPIOE_LED8_ORANGE, 0U) | \ + PIN_AFIO_AF(GPIOE_LED6_GREEN, 0U)) /* * GPIOF setup: @@ -948,22 +953,22 @@ PIN_ODR_HIGH(GPIOF_PIN13) | \ PIN_ODR_HIGH(GPIOF_PIN14) | \ PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0) | \ - PIN_AFIO_AF(GPIOF_OSC_OUT, 0) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0)) +#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \ + PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN7, 0U)) +#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOF_PIN15, 0U)) /* * GPIOG setup: @@ -1065,22 +1070,22 @@ PIN_ODR_HIGH(GPIOG_PIN13) | \ PIN_ODR_HIGH(GPIOG_PIN14) | \ PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ - PIN_AFIO_AF(GPIOG_PIN1, 0) | \ - PIN_AFIO_AF(GPIOG_PIN2, 0) | \ - PIN_AFIO_AF(GPIOG_PIN3, 0) | \ - PIN_AFIO_AF(GPIOG_PIN4, 0) | \ - PIN_AFIO_AF(GPIOG_PIN5, 0) | \ - PIN_AFIO_AF(GPIOG_PIN6, 0) | \ - PIN_AFIO_AF(GPIOG_PIN7, 0)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ - PIN_AFIO_AF(GPIOG_PIN9, 0) | \ - PIN_AFIO_AF(GPIOG_PIN10, 0) | \ - PIN_AFIO_AF(GPIOG_PIN11, 0) | \ - PIN_AFIO_AF(GPIOG_PIN12, 0) | \ - PIN_AFIO_AF(GPIOG_PIN13, 0) | \ - PIN_AFIO_AF(GPIOG_PIN14, 0) | \ - PIN_AFIO_AF(GPIOG_PIN15, 0)) +#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN7, 0U)) +#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOG_PIN15, 0U)) /* * GPIOH setup: @@ -1182,22 +1187,22 @@ PIN_ODR_HIGH(GPIOH_PIN13) | \ PIN_ODR_HIGH(GPIOH_PIN14) | \ PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \ - PIN_AFIO_AF(GPIOH_PIN1, 0) | \ - PIN_AFIO_AF(GPIOH_PIN2, 0) | \ - PIN_AFIO_AF(GPIOH_PIN3, 0) | \ - PIN_AFIO_AF(GPIOH_PIN4, 0) | \ - PIN_AFIO_AF(GPIOH_PIN5, 0) | \ - PIN_AFIO_AF(GPIOH_PIN6, 0) | \ - PIN_AFIO_AF(GPIOH_PIN7, 0)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ - PIN_AFIO_AF(GPIOH_PIN9, 0) | \ - PIN_AFIO_AF(GPIOH_PIN10, 0) | \ - PIN_AFIO_AF(GPIOH_PIN11, 0) | \ - PIN_AFIO_AF(GPIOH_PIN12, 0) | \ - PIN_AFIO_AF(GPIOH_PIN13, 0) | \ - PIN_AFIO_AF(GPIOH_PIN14, 0) | \ - PIN_AFIO_AF(GPIOH_PIN15, 0)) +#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN1, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN2, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN3, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN4, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN5, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN6, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN7, 0U)) +#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN9, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN10, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN11, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN12, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN13, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ + PIN_AFIO_AF(GPIOH_PIN15, 0U)) #if !defined(_FROM_ASM_) @@ -1210,4 +1215,4 @@ extern "C" { #endif #endif /* _FROM_ASM_ */ -#endif /* _BOARD_H_ */ +#endif /* BOARD_H */ diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk index 9b79f1f88..f20e06ec7 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk @@ -1,5 +1,5 @@ # List of all the board related files. -BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.c +BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c # Required include directories -BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY +BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY_REVC diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg index 718d4a7c4..37b1242ae 100644 --- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg +++ b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg @@ -5,11 +5,12 @@ xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f3xx_board.xsd"> resources/gencfg/processors/boards/stm32f3xx/templates + $(CHIBIOS)/os/hal/boards/ .. 3.0.x STMicroelectronics STM32F3-Discovery - ST_STM32F3_DISCOVERY + ST_STM32F3_DISCOVERY_REVC STM32F303xC