From 5e7988200ed01153074cf7b02e785fd9565611d9 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 7 Dec 2017 10:25:21 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11132 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- .../startup/e200/compilers/GHS/ld/SPC560B50.ld | 135 ++++++++++++++++++++- .../startup/e200/compilers/GHS/ld/SPC560B60.ld | 135 ++++++++++++++++++++- .../startup/e200/compilers/GHS/ld/SPC560B64.ld | 135 ++++++++++++++++++++- .../startup/e200/compilers/GHS/ld/SPC560D40.ld | 135 ++++++++++++++++++++- .../startup/e200/compilers/GHS/ld/SPC560P50.ld | 135 ++++++++++++++++++++- 5 files changed, 670 insertions(+), 5 deletions(-) (limited to 'os/common/startup/e200/compilers/GHS/ld') diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC560B50.ld b/os/common/startup/e200/compilers/GHS/ld/SPC560B50.ld index a7b6eabe1..5dd82f1fb 100644 --- a/os/common/startup/e200/compilers/GHS/ld/SPC560B50.ld +++ b/os/common/startup/e200/compilers/GHS/ld/SPC560B50.ld @@ -24,4 +24,137 @@ MEMORY ram : org = 0x40000000, len = 32k } -INCLUDE rules_z0.ld +OPTION ("-e=_reset_address") + +SECTIONS +{ + .boot0 ALIGN(16) : + { + *(.boot) + *(.handlers) + *(.crt0) + } > flash + + .vectors ALIGN(0x800) : + { + /* The vectors table requires a 2kB alignment.*/ + *(.vectors) + } > flash + + .ivors ALIGN(0x1000) : + { + /* The IVORs table requires a 4kB alignment.*/ + __ivpr_base__ = .; + *(.ivors) + } > flash + + constructors ALIGN(4) : + { + PROVIDE(__init_array_start = .); + "*(.init_array.*)" + *(.init_array) + PROVIDE(__init_array_end = .); + } > flash + + destructors ALIGN(4) : + { + PROVIDE(__fini_array_start = .); + *(.fini_array) + "*(.fini_array.*)" + PROVIDE(__fini_array_end = .); + } > flash + + .vletext ALIGN(16) : + { + *(.vletext) + "*(.vletext.*)" + } > flash + + .text ALIGN(16) : + { + *(.text) + "*(.text.*)" + } > flash + + .rodata ALIGN(16) : + { + *(.rodata) + "*(.rodata.*)" + *(.rodata1) + } > flash + + .sdata2 ALIGN(16) : + { + __sdata2_start__ = . + 0x8000; + *(.sdata2) + "*(.sdata2.*)" + *(.sbss2) + "*(.sbss2.*)" + } > flash + + .stacks ALIGN(16) : + { + . = ALIGN(8); + __irq_stack_base__ = .; + . += __irq_stack_size__; + . = ALIGN(8); + __irq_stack_end__ = .; + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > ram + + .romdatastart ALIGN(16) : + { + __romdata_start__ = .; + } > flash + + .data ALIGN(4) : AT(__romdata_start__) + { + . = ALIGN(4); + __data_start__ = .; + *(.data) + "*(.data.*)" + __sdata_start__ = . + 0x8000; + *(.sdata) + "*(.sdata.*)" + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + __data_end__ = .; + } > ram + + .sbss ALIGN(4) : + { + __bss_start__ = .; + *(.sbss) + "*(.sbss.*)" + *(.scommon) + } > ram + + .bss ALIGN(4) : + { + *(.bss) + "*(.bss.*)" + *(COMMON) + __bss_end__ = .; + } > ram + + __flash_size__ = SIZEOF(flash); + __flash_start__ = ADDR(flash); + __flash_end__ = ENDADDR(flash); + + __dataflash_size__ = SIZEOF(dataflash); + __dataflash_start__ = ADDR(dataflash); + __dataflash_end__ = ENDADDR(dataflash); + + __ram_size__ = SIZEOF(ram); + __ram_start__ = ADDR(ram); + __ram_end__ = ENDADDR(ram); + + __heap_base__ = __bss_end__; + __heap_end__ = __ram_end__; +} diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC560B60.ld b/os/common/startup/e200/compilers/GHS/ld/SPC560B60.ld index b2f85efbb..6d67434f0 100644 --- a/os/common/startup/e200/compilers/GHS/ld/SPC560B60.ld +++ b/os/common/startup/e200/compilers/GHS/ld/SPC560B60.ld @@ -24,4 +24,137 @@ MEMORY ram : org = 0x40000000, len = 80k } -INCLUDE rules_z0.ld +OPTION ("-e=_reset_address") + +SECTIONS +{ + .boot0 ALIGN(16) : + { + *(.boot) + *(.handlers) + *(.crt0) + } > flash + + .vectors ALIGN(0x800) : + { + /* The vectors table requires a 2kB alignment.*/ + *(.vectors) + } > flash + + .ivors ALIGN(0x1000) : + { + /* The IVORs table requires a 4kB alignment.*/ + __ivpr_base__ = .; + *(.ivors) + } > flash + + constructors ALIGN(4) : + { + PROVIDE(__init_array_start = .); + "*(.init_array.*)" + *(.init_array) + PROVIDE(__init_array_end = .); + } > flash + + destructors ALIGN(4) : + { + PROVIDE(__fini_array_start = .); + *(.fini_array) + "*(.fini_array.*)" + PROVIDE(__fini_array_end = .); + } > flash + + .vletext ALIGN(16) : + { + *(.vletext) + "*(.vletext.*)" + } > flash + + .text ALIGN(16) : + { + *(.text) + "*(.text.*)" + } > flash + + .rodata ALIGN(16) : + { + *(.rodata) + "*(.rodata.*)" + *(.rodata1) + } > flash + + .sdata2 ALIGN(16) : + { + __sdata2_start__ = . + 0x8000; + *(.sdata2) + "*(.sdata2.*)" + *(.sbss2) + "*(.sbss2.*)" + } > flash + + .stacks ALIGN(16) : + { + . = ALIGN(8); + __irq_stack_base__ = .; + . += __irq_stack_size__; + . = ALIGN(8); + __irq_stack_end__ = .; + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > ram + + .romdatastart ALIGN(16) : + { + __romdata_start__ = .; + } > flash + + .data ALIGN(4) : AT(__romdata_start__) + { + . = ALIGN(4); + __data_start__ = .; + *(.data) + "*(.data.*)" + __sdata_start__ = . + 0x8000; + *(.sdata) + "*(.sdata.*)" + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + __data_end__ = .; + } > ram + + .sbss ALIGN(4) : + { + __bss_start__ = .; + *(.sbss) + "*(.sbss.*)" + *(.scommon) + } > ram + + .bss ALIGN(4) : + { + *(.bss) + "*(.bss.*)" + *(COMMON) + __bss_end__ = .; + } > ram + + __flash_size__ = SIZEOF(flash); + __flash_start__ = ADDR(flash); + __flash_end__ = ENDADDR(flash); + + __dataflash_size__ = SIZEOF(dataflash); + __dataflash_start__ = ADDR(dataflash); + __dataflash_end__ = ENDADDR(dataflash); + + __ram_size__ = SIZEOF(ram); + __ram_start__ = ADDR(ram); + __ram_end__ = ENDADDR(ram); + + __heap_base__ = __bss_end__; + __heap_end__ = __ram_end__; +} diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC560B64.ld b/os/common/startup/e200/compilers/GHS/ld/SPC560B64.ld index 019dd939b..b769f1fe5 100644 --- a/os/common/startup/e200/compilers/GHS/ld/SPC560B64.ld +++ b/os/common/startup/e200/compilers/GHS/ld/SPC560B64.ld @@ -24,4 +24,137 @@ MEMORY ram : org = 0x40000000, len = 96k } -INCLUDE rules_z0.ld +OPTION ("-e=_reset_address") + +SECTIONS +{ + .boot0 ALIGN(16) : + { + *(.boot) + *(.handlers) + *(.crt0) + } > flash + + .vectors ALIGN(0x800) : + { + /* The vectors table requires a 2kB alignment.*/ + *(.vectors) + } > flash + + .ivors ALIGN(0x1000) : + { + /* The IVORs table requires a 4kB alignment.*/ + __ivpr_base__ = .; + *(.ivors) + } > flash + + constructors ALIGN(4) : + { + PROVIDE(__init_array_start = .); + "*(.init_array.*)" + *(.init_array) + PROVIDE(__init_array_end = .); + } > flash + + destructors ALIGN(4) : + { + PROVIDE(__fini_array_start = .); + *(.fini_array) + "*(.fini_array.*)" + PROVIDE(__fini_array_end = .); + } > flash + + .vletext ALIGN(16) : + { + *(.vletext) + "*(.vletext.*)" + } > flash + + .text ALIGN(16) : + { + *(.text) + "*(.text.*)" + } > flash + + .rodata ALIGN(16) : + { + *(.rodata) + "*(.rodata.*)" + *(.rodata1) + } > flash + + .sdata2 ALIGN(16) : + { + __sdata2_start__ = . + 0x8000; + *(.sdata2) + "*(.sdata2.*)" + *(.sbss2) + "*(.sbss2.*)" + } > flash + + .stacks ALIGN(16) : + { + . = ALIGN(8); + __irq_stack_base__ = .; + . += __irq_stack_size__; + . = ALIGN(8); + __irq_stack_end__ = .; + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > ram + + .romdatastart ALIGN(16) : + { + __romdata_start__ = .; + } > flash + + .data ALIGN(4) : AT(__romdata_start__) + { + . = ALIGN(4); + __data_start__ = .; + *(.data) + "*(.data.*)" + __sdata_start__ = . + 0x8000; + *(.sdata) + "*(.sdata.*)" + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + __data_end__ = .; + } > ram + + .sbss ALIGN(4) : + { + __bss_start__ = .; + *(.sbss) + "*(.sbss.*)" + *(.scommon) + } > ram + + .bss ALIGN(4) : + { + *(.bss) + "*(.bss.*)" + *(COMMON) + __bss_end__ = .; + } > ram + + __flash_size__ = SIZEOF(flash); + __flash_start__ = ADDR(flash); + __flash_end__ = ENDADDR(flash); + + __dataflash_size__ = SIZEOF(dataflash); + __dataflash_start__ = ADDR(dataflash); + __dataflash_end__ = ENDADDR(dataflash); + + __ram_size__ = SIZEOF(ram); + __ram_start__ = ADDR(ram); + __ram_end__ = ENDADDR(ram); + + __heap_base__ = __bss_end__; + __heap_end__ = __ram_end__; +} diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC560D40.ld b/os/common/startup/e200/compilers/GHS/ld/SPC560D40.ld index 2d3459fd4..494fa1259 100644 --- a/os/common/startup/e200/compilers/GHS/ld/SPC560D40.ld +++ b/os/common/startup/e200/compilers/GHS/ld/SPC560D40.ld @@ -24,4 +24,137 @@ MEMORY ram : org = 0x40000000, len = 16k } -INCLUDE rules_z0.ld +OPTION ("-e=_reset_address") + +SECTIONS +{ + .boot0 ALIGN(16) : + { + *(.boot) + *(.handlers) + *(.crt0) + } > flash + + .vectors ALIGN(0x800) : + { + /* The vectors table requires a 2kB alignment.*/ + *(.vectors) + } > flash + + .ivors ALIGN(0x1000) : + { + /* The IVORs table requires a 4kB alignment.*/ + __ivpr_base__ = .; + *(.ivors) + } > flash + + constructors ALIGN(4) : + { + PROVIDE(__init_array_start = .); + "*(.init_array.*)" + *(.init_array) + PROVIDE(__init_array_end = .); + } > flash + + destructors ALIGN(4) : + { + PROVIDE(__fini_array_start = .); + *(.fini_array) + "*(.fini_array.*)" + PROVIDE(__fini_array_end = .); + } > flash + + .vletext ALIGN(16) : + { + *(.vletext) + "*(.vletext.*)" + } > flash + + .text ALIGN(16) : + { + *(.text) + "*(.text.*)" + } > flash + + .rodata ALIGN(16) : + { + *(.rodata) + "*(.rodata.*)" + *(.rodata1) + } > flash + + .sdata2 ALIGN(16) : + { + __sdata2_start__ = . + 0x8000; + *(.sdata2) + "*(.sdata2.*)" + *(.sbss2) + "*(.sbss2.*)" + } > flash + + .stacks ALIGN(16) : + { + . = ALIGN(8); + __irq_stack_base__ = .; + . += __irq_stack_size__; + . = ALIGN(8); + __irq_stack_end__ = .; + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > ram + + .romdatastart ALIGN(16) : + { + __romdata_start__ = .; + } > flash + + .data ALIGN(4) : AT(__romdata_start__) + { + . = ALIGN(4); + __data_start__ = .; + *(.data) + "*(.data.*)" + __sdata_start__ = . + 0x8000; + *(.sdata) + "*(.sdata.*)" + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + __data_end__ = .; + } > ram + + .sbss ALIGN(4) : + { + __bss_start__ = .; + *(.sbss) + "*(.sbss.*)" + *(.scommon) + } > ram + + .bss ALIGN(4) : + { + *(.bss) + "*(.bss.*)" + *(COMMON) + __bss_end__ = .; + } > ram + + __flash_size__ = SIZEOF(flash); + __flash_start__ = ADDR(flash); + __flash_end__ = ENDADDR(flash); + + __dataflash_size__ = SIZEOF(dataflash); + __dataflash_start__ = ADDR(dataflash); + __dataflash_end__ = ENDADDR(dataflash); + + __ram_size__ = SIZEOF(ram); + __ram_start__ = ADDR(ram); + __ram_end__ = ENDADDR(ram); + + __heap_base__ = __bss_end__; + __heap_end__ = __ram_end__; +} diff --git a/os/common/startup/e200/compilers/GHS/ld/SPC560P50.ld b/os/common/startup/e200/compilers/GHS/ld/SPC560P50.ld index 2b591d4d8..a81ed55a3 100644 --- a/os/common/startup/e200/compilers/GHS/ld/SPC560P50.ld +++ b/os/common/startup/e200/compilers/GHS/ld/SPC560P50.ld @@ -24,4 +24,137 @@ MEMORY ram : org = 0x40000000, len = 40k } -INCLUDE rules_z0.ld +OPTION ("-e=_reset_address") + +SECTIONS +{ + .boot0 ALIGN(16) : + { + *(.boot) + *(.handlers) + *(.crt0) + } > flash + + .vectors ALIGN(0x800) : + { + /* The vectors table requires a 2kB alignment.*/ + *(.vectors) + } > flash + + .ivors ALIGN(0x1000) : + { + /* The IVORs table requires a 4kB alignment.*/ + __ivpr_base__ = .; + *(.ivors) + } > flash + + constructors ALIGN(4) : + { + PROVIDE(__init_array_start = .); + "*(.init_array.*)" + *(.init_array) + PROVIDE(__init_array_end = .); + } > flash + + destructors ALIGN(4) : + { + PROVIDE(__fini_array_start = .); + *(.fini_array) + "*(.fini_array.*)" + PROVIDE(__fini_array_end = .); + } > flash + + .vletext ALIGN(16) : + { + *(.vletext) + "*(.vletext.*)" + } > flash + + .text ALIGN(16) : + { + *(.text) + "*(.text.*)" + } > flash + + .rodata ALIGN(16) : + { + *(.rodata) + "*(.rodata.*)" + *(.rodata1) + } > flash + + .sdata2 ALIGN(16) : + { + __sdata2_start__ = . + 0x8000; + *(.sdata2) + "*(.sdata2.*)" + *(.sbss2) + "*(.sbss2.*)" + } > flash + + .stacks ALIGN(16) : + { + . = ALIGN(8); + __irq_stack_base__ = .; + . += __irq_stack_size__; + . = ALIGN(8); + __irq_stack_end__ = .; + __process_stack_base__ = .; + __main_thread_stack_base__ = .; + . += __process_stack_size__; + . = ALIGN(8); + __process_stack_end__ = .; + __main_thread_stack_end__ = .; + } > ram + + .romdatastart ALIGN(16) : + { + __romdata_start__ = .; + } > flash + + .data ALIGN(4) : AT(__romdata_start__) + { + . = ALIGN(4); + __data_start__ = .; + *(.data) + "*(.data.*)" + __sdata_start__ = . + 0x8000; + *(.sdata) + "*(.sdata.*)" + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + __data_end__ = .; + } > ram + + .sbss ALIGN(4) : + { + __bss_start__ = .; + *(.sbss) + "*(.sbss.*)" + *(.scommon) + } > ram + + .bss ALIGN(4) : + { + *(.bss) + "*(.bss.*)" + *(COMMON) + __bss_end__ = .; + } > ram + + __flash_size__ = SIZEOF(flash); + __flash_start__ = ADDR(flash); + __flash_end__ = ENDADDR(flash); + + __dataflash_size__ = SIZEOF(dataflash); + __dataflash_start__ = ADDR(dataflash); + __dataflash_end__ = ENDADDR(dataflash); + + __ram_size__ = SIZEOF(ram); + __ram_start__ = ADDR(ram); + __ram_end__ = ENDADDR(ram); + + __heap_base__ = __bss_end__; + __heap_end__ = __ram_end__; +} -- cgit v1.2.3