From 72590590cb302efc52788d11df5569db55e0be73 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 11 Mar 2015 09:57:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7756 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s | 268 ++++++++++++++++++++++++ os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s | 144 +++++++++++++ 2 files changed, 412 insertions(+) create mode 100644 os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s create mode 100644 os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s (limited to 'os/common/ports/ARMCMx/compilers') diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s b/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s new file mode 100644 index 000000000..962321cb2 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/crt0_v6m.s @@ -0,0 +1,268 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file crt0_v6m.s + * @brief Generic ARMv6-M (Cortex-M0/M1) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP + * @{ + */ + +/*===========================================================================*/ +/* Module constants. */ +/*===========================================================================*/ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define CONTROL_MODE_PRIVILEGED 0 +#define CONTROL_MODE_UNPRIVILEGED 1 +#define CONTROL_USE_MSP 0 +#define CONTROL_USE_PSP 2 + +/*===========================================================================*/ +/* Module pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Control special register initialization value. + * @details The system is setup to run in privileged mode using the PSP + * stack (dual stack mode). + */ +#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__) +#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \ + CONTROL_MODE_PRIVILEGED) +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__) +#define CRT0_STACKS_FILL_PATTERN 0x55555555 +#endif + +/** + * @brief Stack segments initialization switch. + */ +#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__) +#define CRT0_INIT_STACKS TRUE +#endif + +/** + * @brief DATA segment initialization switch. + */ +#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__) +#define CRT0_INIT_DATA TRUE +#endif + +/** + * @brief BSS segment initialization switch. + */ +#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__) +#define CRT0_INIT_BSS TRUE +#endif + +/** + * @brief Constructors invocation switch. + */ +#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_CONSTRUCTORS TRUE +#endif + +/** + * @brief Destructors invocation switch. + */ +#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__) +#define CRT0_CALL_DESTRUCTORS TRUE +#endif + +/*===========================================================================*/ +/* Code section. */ +/*===========================================================================*/ + +#if !defined(__DOXYGEN__) + + .cpu cortex-m0 + .fpu softvfp + + .thumb + .text + +/* + * Reset handler. + */ + .thumb_func + .global Reset_Handler + .weak Reset_Handler +Reset_Handler: + /* Interrupts are globally masked initially.*/ + cpsid i + + /* PSP stack pointers initialization.*/ + ldr r0, =__process_stack_end__ + msr PSP, r0 + + /* CPU mode initialization as configured.*/ + movs r0, #CRT0_CONTROL_INIT + msr CONTROL, r0 + isb + + /* Early initialization..*/ + bl __early_init + +#if CRT0_INIT_STACKS == TRUE + ldr r0, =CRT0_STACKS_FILL_PATTERN + /* Main Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__main_stack_base__ + ldr r2, =__main_stack_end__ +msloop: + cmp r1, r2 + bge endmsloop + str r0, [r1] + add r1, r1, #4 + b msloop +endmsloop: + /* Process Stack initialization. Note, it assumes that the + stack size is a multiple of 4 so the linker file must + ensure this.*/ + ldr r1, =__process_stack_base__ + ldr r2, =__process_stack_end__ +psloop: + cmp r1, r2 + bge endpsloop + str r0, [r1] + add r1, r1, #4 + b psloop +endpsloop: +#endif + +#if CRT0_INIT_DATA == TRUE + /* Data initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + ldr r1, =_textdata + ldr r2, =_data + ldr r3, =_edata +dloop: + cmp r2, r3 + bge enddloop + ldr r0, [r1] + str r0, [r2] + add r1, r1, #4 + add r2, r2, #4 + b dloop +enddloop: +#endif + +#if CRT0_INIT_BSS == TRUE + /* BSS initialization. Note, it assumes that the DATA size + is a multiple of 4 so the linker file must ensure this.*/ + movs r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bloop: + cmp r1, r2 + bge endbloop + str r0, [r1] + add r1, r1, #4 + b bloop +endbloop: +#endif + + /* Late initialization..*/ + bl __late_init + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Constructors invocation.*/ + ldr r4, =__init_array_start + ldr r5, =__init_array_end +initloop: + cmp r4, r5 + bge endinitloop + ldr r1, [r4] + blx r1 + add r4, r4, #4 + b initloop +endinitloop: +#endif + + /* Main program invocation, r0 contains the returned value.*/ + bl main + +#if CRT0_CALL_CONSTRUCTORS == TRUE + /* Destructors invocation.*/ + ldr r4, =__fini_array_start + ldr r5, =__fini_array_end +finiloop: + cmp r4, r5 + bge endfiniloop + ldr r1, [r4] + blx r1 + add r4, r4, #4 + b finiloop +endfiniloop: +#endif + + /* Branching to the defined exit handler.*/ + b __default_exit + +/*--------------------------------------------------------------------------* + * Default main exit code, the system is halted. + * It is a weak symbol, the application code can redefine the behavior. + * R0 contains the value returned by the main function. + *--------------------------------------------------------------------------*/ + .thumb_func + .weak __default_exit +__default_exit: + cpsid i +.loop: b .loop + +/*--------------------------------------------------------------------------* + * Default early initialization code. It is declared weak in order to be + * replaced by the real initialization code. + * The early initialization is performed just after stacks setup RAM areas + * initialization. + *--------------------------------------------------------------------------*/ + .thumb_func + .weak __early_init +__early_init: + bx lr + +/*--------------------------------------------------------------------------* + * Default late initialization code. It is declared weak in order to be + * replaced by the real initialization code. + * The late initialization is performed just after RAM areas initialization + * and before invoking the static constructors. + *--------------------------------------------------------------------------*/ + .thumb_func + .weak __late_init +__late_init: + bx lr + +#endif + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s b/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s new file mode 100644 index 000000000..5aebe0e23 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/crt0_v7m.s @@ -0,0 +1,144 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file crt0_v7m.s + * @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS. + * + * @addtogroup ARMCMx_GCC_STARTUP + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#if !defined(__DOXYGEN__) + + .set CONTROL_MODE_PRIVILEGED, 0 + .set CONTROL_MODE_UNPRIVILEGED, 1 + .set CONTROL_USE_MSP, 0 + .set CONTROL_USE_PSP, 2 + + .cpu cortex-m0 + .fpu softvfp + + .thumb + .text + +/* + * Reset handler. + */ + .thumb_func + .global ResetHandler + .weak ResetHandler +ResetHandler: + /* + * Interrupts are globally masked initially. + */ + cpsid i + /* + * Stack pointers initialization. + */ + ldr r0, =__ram_end__ + ldr r1, =__main_stack_size__ + subs r0, r0, r1 + /* + * Note that r0 is the main stack low boundary address and process + * stack initial top address. + */ + msr PSP, r0 + /* + * Early initialization phase, it is empty by default. + */ + bl __early_init + /* + * Data initialization. + * NOTE: It assumes that the DATA size is a multiple of 4. + */ + ldr r1, =_textdata + ldr r2, =_data + ldr r3, =_edata +dloop: + cmp r2, r3 + ittt lo + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo dloop + /* + * BSS initialization. + * NOTE: It assumes that the BSS size is a multiple of 4. + */ + movs r0, #0 + ldr r1, =_bss_start + ldr r2, =_bss_end +bloop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo bloop + /* + * Switches to the Process Stack and uses a barrier just to be safe. + */ + movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP + msr CONTROL, r0 + isb + /* + * Main program invocation. + */ + bl main + b _main_exit_handler + +/* + * Default main exit code, just a loop. + * It is a weak symbol, the application code can redefine the behavior. + */ + .thumb_func + .global _main_exit_handler + .weak _main_exit_handler +_main_exit_handler: +.loop: b .loop + +/* + * Default early initialization code. It is declared weak in order to be + * replaced by the real initialization code. + * The arly initialization is performed just after stacks setup and before BSS + * and DATA segments initialization. + */ + .thumb_func + .global __early_init + .weak __early_init +__early_init: + bx lr + +#endif + +/** @} */ -- cgit v1.2.3