From 641f2c372605cf405f0dda8536b45a78e0e5e2e2 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 16 Feb 2016 09:59:21 +0000 Subject: Tree reorganization. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8899 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- .../ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s | 152 +++++++++++++++++++ .../ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s | 164 +++++++++++++++++++++ os/common/ports/ARMCMx/compilers/GCC/chtypes.h | 103 +++++++++++++ .../ports/ARMCMx/compilers/GCC/mk/port_v6m.mk | 8 + .../ports/ARMCMx/compilers/GCC/mk/port_v7m.mk | 8 + .../ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s | 142 ++++++++++++++++++ .../ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s | 150 +++++++++++++++++++ os/common/ports/ARMCMx/compilers/IAR/chtypes.h | 98 ++++++++++++ .../ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s | 139 +++++++++++++++++ .../ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s | 148 +++++++++++++++++++ os/common/ports/ARMCMx/compilers/RVCT/chtypes.h | 98 ++++++++++++ 11 files changed, 1210 insertions(+) create mode 100644 os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s create mode 100644 os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s create mode 100644 os/common/ports/ARMCMx/compilers/GCC/chtypes.h create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk create mode 100644 os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk create mode 100644 os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s create mode 100644 os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s create mode 100644 os/common/ports/ARMCMx/compilers/IAR/chtypes.h create mode 100644 os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s create mode 100644 os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s create mode 100644 os/common/ports/ARMCMx/compilers/RVCT/chtypes.h (limited to 'os/common/ports/ARMCMx/compilers') diff --git a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s new file mode 100644 index 000000000..935c7630f --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s @@ -0,0 +1,152 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/GCC/chcoreasm_v6m.s + * @brief ARMv6-M architecture port low level code. + * + * @addtogroup ARMCMx_GCC_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + + .set SCB_ICSR, 0xE000ED04 + .set ICSR_PENDSVSET, 0x10000000 + .set ICSR_NMIPENDSET, 0x80000000 + + .cpu cortex-m0 + .fpu softvfp + + .thumb + .text + +/*--------------------------------------------------------------------------* + * Performs a context switch between two threads. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch +_port_switch: + push {r4, r5, r6, r7, lr} + mov r4, r8 + mov r5, r9 + mov r6, r10 + mov r7, r11 + push {r4, r5, r6, r7} + + mov r3, sp + str r3, [r1, #CONTEXT_OFFSET] + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 + + pop {r4, r5, r6, r7} + mov r8, r4 + mov r9, r5 + mov r10, r6 + mov r11, r7 + pop {r4, r5, r6, r7, pc} + +/*--------------------------------------------------------------------------* + * Start a thread by invoking its work function. + * + * Threads execution starts here, the code leaves the system critical zone + * and then jumps into the thread function passed in register R4. The + * register R5 contains the thread parameter. The function chThdExit() is + * called on thread function return. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_thread_start +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + cpsie i + mov r0, r5 + blx r4 + movs r0, #0 /* MSG_OK */ + bl chThdExit + +/*--------------------------------------------------------------------------* + * Post-IRQ switch code. + * + * Exception handlers return here for context switching. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch_from_isr +_port_switch_from_isr: +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + .globl _port_exit_from_isr +_port_exit_from_isr: + ldr r2, .L2 + ldr r3, .L3 + str r3, [r2, #0] +#if CORTEX_ALTERNATE_SWITCH + cpsie i +#endif +.L1: b .L1 + + .align 2 +.L2: .word SCB_ICSR +#if CORTEX_ALTERNATE_SWITCH +.L3: .word ICSR_PENDSVSET +#else +.L3: .word ICSR_NMIPENDSET +#endif + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s new file mode 100644 index 000000000..7a77ba406 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s @@ -0,0 +1,164 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/GCC/chcoreasm_v7m.s + * @brief ARMv7-M architecture port low level code. + * + * @addtogroup ARMCMx_GCC_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +/* + * RTOS-specific context offset. + */ +#if defined(_CHIBIOS_RT_CONF_) +#define CONTEXT_OFFSET 12 +#elif defined(_CHIBIOS_NIL_CONF_) +#define CONTEXT_OFFSET 0 +#else +#error "invalid chconf.h" +#endif + + .set SCB_ICSR, 0xE000ED04 + .set ICSR_PENDSVSET, 0x10000000 + + .syntax unified + .cpu cortex-m4 +#if CORTEX_USE_FPU + .fpu fpv4-sp-d16 +#else + .fpu softvfp +#endif + + .thumb + .text + +/*--------------------------------------------------------------------------* + * Performs a context switch between two threads. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch +_port_switch: + push {r4, r5, r6, r7, r8, r9, r10, r11, lr} +#if CORTEX_USE_FPU + vpush {s16-s31} +#endif + + str sp, [r1, #CONTEXT_OFFSET] +#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \ + ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)) + /* Workaround for ARM errata 752419, only applied if + condition exists for it to be triggered.*/ + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 +#else + ldr sp, [r0, #CONTEXT_OFFSET] +#endif + +#if CORTEX_USE_FPU + vpop {s16-s31} +#endif + pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} + +/*--------------------------------------------------------------------------* + * Start a thread by invoking its work function. + * + * Threads execution starts here, the code leaves the system critical zone + * and then jumps into the thread function passed in register R4. The + * register R5 contains the thread parameter. The function chThdExit() is + * called on thread function return. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_thread_start +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +#if CORTEX_SIMPLIFIED_PRIORITY + cpsie i +#else + movs r3, #0 /* CORTEX_BASEPRI_DISABLED */ + msr BASEPRI, r3 +#endif + mov r0, r5 + blx r4 +#if defined(_CHIBIOS_RT_CONF_) + movs r0, #0 /* MSG_OK */ + bl chThdExit +#endif +#if defined(_CHIBIOS_NIL_CONF_) + mov r3, #0 + bl chSysHalt +#endif + +/*--------------------------------------------------------------------------* + * Post-IRQ switch code. + * + * Exception handlers return here for context switching. + *--------------------------------------------------------------------------*/ + .thumb_func + .globl _port_switch_from_isr +_port_switch_from_isr: +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + .globl _port_exit_from_isr +_port_exit_from_isr: +#if CORTEX_SIMPLIFIED_PRIORITY + movw r3, #:lower16:SCB_ICSR + movt r3, #:upper16:SCB_ICSR + mov r2, ICSR_PENDSVSET + str r2, [r3, #0] + cpsie i +#else /* !CORTEX_SIMPLIFIED_PRIORITY */ + svc #0 +#endif /* !CORTEX_SIMPLIFIED_PRIORITY */ +.L1: b .L1 + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/chtypes.h b/os/common/ports/ARMCMx/compilers/GCC/chtypes.h new file mode 100644 index 000000000..15ab05a62 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/chtypes.h @@ -0,0 +1,103 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARMCMx/compilers/GCC/chtypes.h + * @brief ARM Cortex-Mx port system types. + * + * @addtogroup ARMCMx_GCC_CORE + * @{ + */ + +#ifndef _CHTYPES_H_ +#define _CHTYPES_H_ + +#include +#include +#include + +/** + * @name Common constants + */ +/** + * @brief Generic 'false' boolean constant. + */ +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +/** + * @brief Generic 'true' boolean constant. + */ +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif +/** @} */ + +/** + * @name Kernel types + * @{ + */ +typedef uint32_t rtcnt_t; /**< Realtime counter. */ +typedef uint64_t rttime_t; /**< Realtime accumulator. */ +typedef uint32_t syssts_t; /**< System status word. */ +typedef uint8_t tmode_t; /**< Thread flags. */ +typedef uint8_t tstate_t; /**< Thread state. */ +typedef uint8_t trefs_t; /**< Thread references counter. */ +typedef uint8_t tslices_t; /**< Thread time slices counter.*/ +typedef uint32_t tprio_t; /**< Thread priority. */ +typedef int32_t msg_t; /**< Inter-thread message. */ +typedef int32_t eventid_t; /**< Numeric event identifier. */ +typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ +typedef uint32_t eventflags_t; /**< Mask of event flags. */ +typedef int32_t cnt_t; /**< Generic signed counter. */ +typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** @} */ + +/** + * @brief ROM constant modifier. + * @note It is set to use the "const" keyword in this port. + */ +#define ROMCONST const + +/** + * @brief Makes functions not inlineable. + * @note If the compiler does not support such attribute then the + * realtime counter precision could be degraded. + */ +#define NOINLINE __attribute__((noinline)) + +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + +/** + * @brief Packed variable specifier. + */ +#define PACKED_VAR __attribute__((packed)) + +/** + * @brief Memory alignment enforcement for variables. + */ +#define ALIGNED_VAR(n) __attribute__((aligned(n))) + +#endif /* _CHTYPES_H_ */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk new file mode 100644 index 000000000..383457de6 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk @@ -0,0 +1,8 @@ +# List of the ChibiOS/RT Cortex-M0 STM32F0xx port files. +PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/chcore.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/chcore_v6m.c + +PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v6m.s + +PORTINC = $(CHIBIOS)/os/common/ports/ARMCMx \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC diff --git a/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk new file mode 100644 index 000000000..86bf45e7b --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk @@ -0,0 +1,8 @@ +# List of the ChibiOS/RT ARMv7M generic port files. +PORTSRC = $(CHIBIOS)/os/common/ports/ARMCMx/chcore.c \ + $(CHIBIOS)/os/common/ports/ARMCMx/chcore_v7m.c + +PORTASM = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/chcoreasm_v7m.s + +PORTINC = $(CHIBIOS)/os/common/ports/ARMCMx \ + $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC diff --git a/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s new file mode 100644 index 000000000..ad2820dfa --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v6m.s @@ -0,0 +1,142 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/IAR/chcoreasm_v6m.s + * @brief ARMv6-M architecture port low level code. + * + * @addtogroup ARMCMx_IAR_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + + MODULE ?chcoreasm_v6m + + AAPCS INTERWORK, VFP_COMPATIBLE + PRESERVE8 + +CONTEXT_OFFSET SET 12 +SCB_ICSR SET 0xE000ED04 + + SECTION .text:CODE:NOROOT(2) + + EXTERN chThdExit + EXTERN chSchDoReschedule +#if CH_DBG_STATISTICS + EXTERN _stats_start_measure_crit_thd + EXTERN _stats_stop_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + EXTERN _dbg_check_unlock + EXTERN _dbg_check_lock +#endif + + THUMB + +/* + * Performs a context switch between two threads. + */ + PUBLIC _port_switch +_port_switch: + push {r4, r5, r6, r7, lr} + mov r4, r8 + mov r5, r9 + mov r6, r10 + mov r7, r11 + push {r4, r5, r6, r7} + mov r3, sp + str r3, [r1, #CONTEXT_OFFSET] + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 + pop {r4, r5, r6, r7} + mov r8, r4 + mov r9, r5 + mov r10, r6 + mov r11, r7 + pop {r4, r5, r6, r7, pc} + +/* + * Start a thread by invoking its work function. + * If the work function returns @p chThdExit() is automatically invoked. + */ + PUBLIC _port_thread_start +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + cpsie i + mov r0, r5 + blx r4 + bl chThdExit + +/* + * Post-IRQ switch code. + * Exception handlers return here for context switching. + */ + PUBLIC _port_switch_from_isr + PUBLIC _port_exit_from_isr +_port_switch_from_isr: +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +_port_exit_from_isr: + ldr r2, =SCB_ICSR + movs r3, #128 +#if CORTEX_ALTERNATE_SWITCH + lsls r3, r3, #21 + str r3, [r2, #0] + cpsie i +#else + lsls r3, r3, #24 + str r3, [r2, #0] +#endif +waithere: + b waithere + + END + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s new file mode 100644 index 000000000..2f58a73aa --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/IAR/chcoreasm_v7m.s @@ -0,0 +1,150 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/IAR/chcoreasm_v7m.s + * @brief ARMv7-M architecture port low level code. + * + * @addtogroup ARMCMx_IAR_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + + MODULE ?chcoreasm_v7m + + AAPCS INTERWORK, VFP_COMPATIBLE + PRESERVE8 + +CONTEXT_OFFSET SET 12 +SCB_ICSR SET 0xE000ED04 +ICSR_PENDSVSET SET 0x10000000 + + SECTION .text:CODE:NOROOT(2) + + EXTERN chThdExit + EXTERN chSchDoReschedule +#if CH_DBG_STATISTICS + EXTERN _stats_start_measure_crit_thd + EXTERN _stats_stop_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + EXTERN _dbg_check_unlock + EXTERN _dbg_check_lock +#endif + + THUMB + +/* + * Performs a context switch between two threads. + */ + PUBLIC _port_switch +_port_switch: + push {r4, r5, r6, r7, r8, r9, r10, r11, lr} +#if CORTEX_USE_FPU + vpush {s16-s31} +#endif + + str sp, [r1, #CONTEXT_OFFSET] +#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \ + ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)) + /* Workaround for ARM errata 752419, only applied if + condition exists for it to be triggered.*/ + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 +#else + ldr sp, [r0, #CONTEXT_OFFSET] +#endif + +#if CORTEX_USE_FPU + vpop {s16-s31} +#endif + pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} + +/* + * Start a thread by invoking its work function. + * If the work function returns @p chThdExit() is automatically invoked. + */ + PUBLIC _port_thread_start +_port_thread_start: +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +#if CORTEX_SIMPLIFIED_PRIORITY + cpsie i +#else + movs r3, #0 /* CORTEX_BASEPRI_DISABLED */ + msr BASEPRI, r3 +#endif + mov r0, r5 + blx r4 + bl chThdExit + +/* + * Post-IRQ switch code. + * Exception handlers return here for context switching. + */ + PUBLIC _port_switch_from_isr + PUBLIC _port_exit_from_isr +_port_switch_from_isr: +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +_port_exit_from_isr: +#if CORTEX_SIMPLIFIED_PRIORITY + mov r3, #LWRD SCB_ICSR + movt r3, #HWRD SCB_ICSR + mov r2, #ICSR_PENDSVSET + str r2, [r3] + cpsie i +#else + svc #0 +#endif +.L3: b .L3 + + END + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/IAR/chtypes.h b/os/common/ports/ARMCMx/compilers/IAR/chtypes.h new file mode 100644 index 000000000..2078217da --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/IAR/chtypes.h @@ -0,0 +1,98 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARMCMx/compilers/IAR/chtypes.h + * @brief ARM Cortex-Mx port system types. + * + * @addtogroup ARMCMx_IAR_CORE + * @{ + */ + +#ifndef _CHTYPES_H_ +#define _CHTYPES_H_ + +#include +#include +#include + +/** + * @name Common constants + */ +/** + * @brief Generic 'false' boolean constant. + */ +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +/** + * @brief Generic 'true' boolean constant. + */ +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE (!FALSE) +#endif +/** @} */ + +/** + * @name Kernel types + * @{ + */ +typedef uint32_t rtcnt_t; /**< Realtime counter. */ +typedef uint64_t rttime_t; /**< Realtime accumulator. */ +typedef uint32_t syssts_t; /**< System status word. */ +typedef uint8_t tmode_t; /**< Thread flags. */ +typedef uint8_t tstate_t; /**< Thread state. */ +typedef uint8_t trefs_t; /**< Thread references counter. */ +typedef uint8_t tslices_t; /**< Thread time slices counter.*/ +typedef uint32_t tprio_t; /**< Thread priority. */ +typedef int32_t msg_t; /**< Inter-thread message. */ +typedef int32_t eventid_t; /**< Numeric event identifier. */ +typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ +typedef uint32_t eventflags_t; /**< Mask of event flags. */ +typedef int32_t cnt_t; /**< Generic signed counter. */ +typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** @} */ + +/** + * @brief ROM constant modifier. + * @note It is set to use the "const" keyword in this port. + */ +#define ROMCONST const + +/** + * @brief Makes functions not inlineable. + * @note If the compiler does not support such attribute then the + * realtime counter precision could be degraded. + */ +#define NOINLINE + +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + +/** + * @brief Packed variable specifier. + */ +#define PACKED_VAR __packed + +#endif /* _CHTYPES_H_ */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s b/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s new file mode 100644 index 000000000..e61662f38 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v6m.s @@ -0,0 +1,139 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/RVCT/chcoreasm_v6m.s + * @brief ARMv6-M architecture port low level code. + * + * @addtogroup ARMCMx_RVCT_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +CONTEXT_OFFSET EQU 12 +SCB_ICSR EQU 0xE000ED04 + + PRESERVE8 + THUMB + AREA |.text|, CODE, READONLY + + IMPORT chThdExit + IMPORT chSchDoReschedule +#if CH_DBG_STATISTICS + IMPORT _stats_start_measure_crit_thd + IMPORT _stats_stop_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + IMPORT _dbg_check_unlock + IMPORT _dbg_check_lock +#endif + +/* + * Performs a context switch between two threads. + */ + EXPORT _port_switch +_port_switch PROC + push {r4, r5, r6, r7, lr} + mov r4, r8 + mov r5, r9 + mov r6, r10 + mov r7, r11 + push {r4, r5, r6, r7} + mov r3, sp + str r3, [r1, #CONTEXT_OFFSET] + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 + pop {r4, r5, r6, r7} + mov r8, r4 + mov r9, r5 + mov r10, r6 + mov r11, r7 + pop {r4, r5, r6, r7, pc} + ENDP + +/* + * Start a thread by invoking its work function. + * If the work function returns @p chThdExit() is automatically invoked. + */ + EXPORT _port_thread_start +_port_thread_start PROC +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif + cpsie i + mov r0, r5 + blx r4 + bl chThdExit + ENDP + +/* + * Post-IRQ switch code. + * Exception handlers return here for context switching. + */ + EXPORT _port_switch_from_isr + EXPORT _port_exit_from_isr +_port_switch_from_isr PROC +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +_port_exit_from_isr + ldr r2, =SCB_ICSR + movs r3, #128 +#if CORTEX_ALTERNATE_SWITCH + lsls r3, r3, #21 + str r3, [r2, #0] + cpsie i +#else + lsls r3, r3, #24 + str r3, [r2, #0] +#endif +waithere b waithere + ENDP + + END + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s b/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s new file mode 100644 index 000000000..69bfaa59c --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/RVCT/chcoreasm_v7m.s @@ -0,0 +1,148 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file compilers/RVCT/chcoreasm_v7m.s + * @brief ARMv7-M architecture port low level code. + * + * @addtogroup ARMCMx_RVCT_CORE + * @{ + */ + +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE 1 +#endif + +#define _FROM_ASM_ +#include "chconf.h" +#include "chcore.h" + +#if !defined(__DOXYGEN__) + +CONTEXT_OFFSET EQU 12 +SCB_ICSR EQU 0xE000ED04 +ICSR_PENDSVSET EQU 0x10000000 + + PRESERVE8 + THUMB + AREA |.text|, CODE, READONLY + + IMPORT chThdExit + IMPORT chSchDoReschedule +#if CH_DBG_STATISTICS + IMPORT _stats_start_measure_crit_thd + IMPORT _stats_stop_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + IMPORT _dbg_check_unlock + IMPORT _dbg_check_lock +#endif + +/* + * Performs a context switch between two threads. + */ + EXPORT _port_switch +_port_switch PROC + push {r4, r5, r6, r7, r8, r9, r10, r11, lr} +#if CORTEX_USE_FPU + vpush {s16-s31} +#endif + + str sp, [r1, #CONTEXT_OFFSET] +#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \ + ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)) + /* Workaround for ARM errata 752419, only applied if + condition exists for it to be triggered.*/ + ldr r3, [r0, #CONTEXT_OFFSET] + mov sp, r3 +#else + ldr sp, [r0, #CONTEXT_OFFSET] +#endif + +#if CORTEX_USE_FPU + vpop {s16-s31} +#endif + pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} + ENDP + +/* + * Start a thread by invoking its work function. + * If the work function returns @p chThdExit() is automatically invoked. + */ + EXPORT _port_thread_start +_port_thread_start PROC +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +#if CORTEX_SIMPLIFIED_PRIORITY + cpsie i +#else + movs r3, #0 /* CORTEX_BASEPRI_DISABLED */ + msr BASEPRI, r3 +#endif + mov r0, r5 + blx r4 + bl chThdExit + ENDP + +/* + * Post-IRQ switch code. + * Exception handlers return here for context switching. + */ + EXPORT _port_switch_from_isr + EXPORT _port_exit_from_isr +_port_switch_from_isr PROC +#if CH_DBG_STATISTICS + bl _stats_start_measure_crit_thd +#endif +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_lock +#endif + bl chSchDoReschedule +#if CH_DBG_SYSTEM_STATE_CHECK + bl _dbg_check_unlock +#endif +#if CH_DBG_STATISTICS + bl _stats_stop_measure_crit_thd +#endif +_port_exit_from_isr +#if CORTEX_SIMPLIFIED_PRIORITY + mov r3, #SCB_ICSR :AND: 0xFFFF + movt r3, #SCB_ICSR :SHR: 16 + mov r2, #ICSR_PENDSVSET + str r2, [r3, #0] + cpsie i +#else + svc #0 +#endif +waithere b waithere + ENDP + + END + +#endif /* !defined(__DOXYGEN__) */ + +/** @} */ diff --git a/os/common/ports/ARMCMx/compilers/RVCT/chtypes.h b/os/common/ports/ARMCMx/compilers/RVCT/chtypes.h new file mode 100644 index 000000000..ce846a912 --- /dev/null +++ b/os/common/ports/ARMCMx/compilers/RVCT/chtypes.h @@ -0,0 +1,98 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. + + This file is part of ChibiOS. + + ChibiOS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file ARMCMx/compilers/RVCT/chtypes.h + * @brief ARM Cortex-Mx port system types. + * + * @addtogroup ARMCMx_RVCT_CORE + * @{ + */ + +#ifndef _CHTYPES_H_ +#define _CHTYPES_H_ + +#include +#include +#include + +/** + * @name Common constants + */ +/** + * @brief Generic 'false' boolean constant. + */ +#if !defined(FALSE) || defined(__DOXYGEN__) +#define FALSE 0 +#endif + +/** + * @brief Generic 'true' boolean constant. + */ +#if !defined(TRUE) || defined(__DOXYGEN__) +#define TRUE (!FALSE) +#endif +/** @} */ + +/** + * @name Kernel types + * @{ + */ +typedef uint32_t rtcnt_t; /**< Realtime counter. */ +typedef uint64_t rttime_t; /**< Realtime accumulator. */ +typedef uint32_t syssts_t; /**< System status word. */ +typedef uint8_t tmode_t; /**< Thread flags. */ +typedef uint8_t tstate_t; /**< Thread state. */ +typedef uint8_t trefs_t; /**< Thread references counter. */ +typedef uint8_t tslices_t; /**< Thread time slices counter.*/ +typedef uint32_t tprio_t; /**< Thread priority. */ +typedef int32_t msg_t; /**< Inter-thread message. */ +typedef int32_t eventid_t; /**< Numeric event identifier. */ +typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ +typedef uint32_t eventflags_t; /**< Mask of event flags. */ +typedef int32_t cnt_t; /**< Generic signed counter. */ +typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** @} */ + +/** + * @brief ROM constant modifier. + * @note It is set to use the "const" keyword in this port. + */ +#define ROMCONST const + +/** + * @brief Makes functions not inlineable. + * @note If the compiler does not support such attribute then the + * realtime counter precision could be degraded. + */ +#define NOINLINE + +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + +/** + * @brief Packed variable specifier. + */ +#define PACKED_VAR __packed + +#endif /* _CHTYPES_H_ */ + +/** @} */ -- cgit v1.2.3