1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
|
/*
* Hypercall and fault low-level handling routines.
*
* Copyright (c) 2005, K A Fraser
*/
#include <xen/config.h>
#include <xen/errno.h>
#include <xen/softirq.h>
#include <asm/asm_defns.h>
#include <asm/apicdef.h>
#include <asm/page.h>
#include <public/xen.h>
#define GET_GUEST_REGS(reg) \
movq $~(STACK_SIZE-1),reg; \
andq %rsp,reg; \
orq $(STACK_SIZE-CPUINFO_sizeof),reg;
#define GET_CURRENT(reg) \
movq $STACK_SIZE-8, reg; \
orq %rsp, reg; \
andq $~7,reg; \
movq (reg),reg;
ALIGN
/* %rbx: struct vcpu */
switch_to_kernel:
leaq VCPU_trap_bounce(%rbx),%rdx
movq VCPU_syscall_addr(%rbx),%rax
movq %rax,TRAPBOUNCE_eip(%rdx)
movb $0,TRAPBOUNCE_flags(%rdx)
bt $_VGCF_syscall_disables_events,VCPU_guest_context_flags(%rbx)
jnc 1f
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
1: call create_bounce_frame
andl $~X86_EFLAGS_DF,UREGS_eflags(%rsp)
jmp test_all_events
/* %rbx: struct vcpu, interrupts disabled */
restore_all_guest:
ASSERT_INTERRUPTS_DISABLED
RESTORE_ALL
testw $TRAP_syscall,4(%rsp)
jz iret_exit_to_guest
addq $8,%rsp
popq %rcx # RIP
popq %r11 # CS
cmpw $FLAT_KERNEL_CS32,%r11
popq %r11 # RFLAGS
popq %rsp # RSP
je 1f
sysretq
1: sysretl
ALIGN
/* No special register assumptions. */
iret_exit_to_guest:
addq $8,%rsp
.Lft0: iretq
.section .fixup,"ax"
.Lfx0: sti
SAVE_ALL
movq UREGS_error_code(%rsp),%rsi
movq %rsp,%rax
andq $~0xf,%rsp
pushq $__HYPERVISOR_DS # SS
pushq %rax # RSP
pushfq # RFLAGS
pushq $__HYPERVISOR_CS # CS
leaq .Ldf0(%rip),%rax
pushq %rax # RIP
pushq %rsi # error_code/entry_vector
jmp handle_exception
.Ldf0: GET_CURRENT(%rbx)
jmp test_all_events
failsafe_callback:
GET_CURRENT(%rbx)
leaq VCPU_trap_bounce(%rbx),%rdx
movq VCPU_failsafe_addr(%rbx),%rax
movq %rax,TRAPBOUNCE_eip(%rdx)
movb $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
bt $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%rbx)
jnc 1f
orb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
1: call create_bounce_frame
jmp test_all_events
.previous
.section __pre_ex_table,"a"
.quad .Lft0,.Lfx0
.previous
.section __ex_table,"a"
.quad .Ldf0,failsafe_callback
.previous
ALIGN
/* No special register assumptions. */
restore_all_xen:
RESTORE_ALL
addq $8,%rsp
iretq
/*
* When entering SYSCALL from kernel mode:
* %rax = hypercall vector
* %rdi, %rsi, %rdx, %r10, %r8, %9 = hypercall arguments
* %r11, %rcx = SYSCALL-saved %rflags and %rip
* NB. We must move %r10 to %rcx for C function-calling ABI.
*
* When entering SYSCALL from user mode:
* Vector directly to the registered arch.syscall_addr.
*
* Initial work is done by per-CPU stack trampolines. At this point %rsp
* has been initialised to point at the correct Xen stack, and %rsp, %rflags
* and %cs have been saved. All other registers are still to be saved onto
* the stack, starting with %rip, and an appropriate %ss must be saved into
* the space left by the trampoline.
*/
ALIGN
ENTRY(syscall_enter)
sti
movl $FLAT_KERNEL_SS,24(%rsp)
pushq %rcx
pushq $0
movl $TRAP_syscall,4(%rsp)
SAVE_ALL
GET_CURRENT(%rbx)
testb $TF_kernel_mode,VCPU_thread_flags(%rbx)
jz switch_to_kernel
/*hypercall:*/
movq %r10,%rcx
cmpq $NR_hypercalls,%rax
jae bad_hypercall
#ifndef NDEBUG
/* Deliberately corrupt parameter regs not used by this hypercall. */
pushq %rdi; pushq %rsi; pushq %rdx; pushq %rcx; pushq %r8 ; pushq %r9
leaq hypercall_args_table(%rip),%r10
movq $6,%rcx
sub (%r10,%rax,1),%cl
movq %rsp,%rdi
movl $0xDEADBEEF,%eax
rep stosq
popq %r9 ; popq %r8 ; popq %rcx; popq %rdx; popq %rsi; popq %rdi
movq UREGS_rax(%rsp),%rax
pushq %rax
pushq UREGS_rip+8(%rsp)
#endif
leaq hypercall_table(%rip),%r10
PERFC_INCR(PERFC_hypercalls, %rax, %rbx)
callq *(%r10,%rax,8)
#ifndef NDEBUG
/* Deliberately corrupt parameter regs used by this hypercall. */
popq %r10 # Shadow RIP
cmpq %r10,UREGS_rip+8(%rsp)
popq %rcx # Shadow hypercall index
jne skip_clobber /* If RIP has changed then don't clobber. */
leaq hypercall_args_table(%rip),%r10
movb (%r10,%rcx,1),%cl
movl $0xDEADBEEF,%r10d
cmpb $1,%cl; jb skip_clobber; movq %r10,UREGS_rdi(%rsp)
cmpb $2,%cl; jb skip_clobber; movq %r10,UREGS_rsi(%rsp)
cmpb $3,%cl; jb skip_clobber; movq %r10,UREGS_rdx(%rsp)
cmpb $4,%cl; jb skip_clobber; movq %r10,UREGS_r10(%rsp)
cmpb $5,%cl; jb skip_clobber; movq %r10,UREGS_r8(%rsp)
cmpb $6,%cl; jb skip_clobber; movq %r10,UREGS_r9(%rsp)
skip_clobber:
#endif
movq %rax,UREGS_rax(%rsp) # save the return value
/* %rbx: struct vcpu */
test_all_events:
cli # tests must not race interrupts
/*test_softirqs:*/
movl VCPU_processor(%rbx),%eax
shl $IRQSTAT_shift,%rax
leaq irq_stat(%rip),%rcx
testl $~0,(%rcx,%rax,1)
jnz process_softirqs
testb $1,VCPU_nmi_pending(%rbx)
jnz process_nmi
test_guest_events:
movq VCPU_vcpu_info(%rbx),%rax
testb $0xFF,VCPUINFO_upcall_mask(%rax)
jnz restore_all_guest
testb $0xFF,VCPUINFO_upcall_pending(%rax)
jz restore_all_guest
/*process_guest_events:*/
sti
leaq VCPU_trap_bounce(%rbx),%rdx
movq VCPU_event_addr(%rbx),%rax
movq %rax,TRAPBOUNCE_eip(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
call create_bounce_frame
jmp test_all_events
ALIGN
/* %rbx: struct vcpu */
process_softirqs:
sti
call do_softirq
jmp test_all_events
ALIGN
/* %rbx: struct vcpu */
process_nmi:
testb $1,VCPU_nmi_masked(%rbx)
jnz test_guest_events
movb $0,VCPU_nmi_pending(%rbx)
movq VCPU_nmi_addr(%rbx),%rax
test %rax,%rax
jz test_guest_events
movb $1,VCPU_nmi_masked(%rbx)
sti
leaq VCPU_trap_bounce(%rbx),%rdx
movq %rax,TRAPBOUNCE_eip(%rdx)
movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
call create_bounce_frame
jmp test_all_events
bad_hypercall:
movq $-ENOSYS,UREGS_rax(%rsp)
jmp test_all_events
|