From 414e79257505a58f85b27ceb50f987a5011bd9d1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 24 Dec 2010 21:07:11 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2528 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.ewp | 2152 +++++++++++++++++++++++ demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.eww | 10 + demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.icf | 37 + demos/ARMCM3-STM32F100-DISCOVERY-GCC/main.c | 15 +- 4 files changed, 2206 insertions(+), 8 deletions(-) create mode 100644 demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.ewp create mode 100644 demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.eww create mode 100644 demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.icf (limited to 'demos') diff --git a/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.ewp b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.ewp new file mode 100644 index 000000000..287b56a00 --- /dev/null +++ b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.ewp @@ -0,0 +1,2152 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 18 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 26 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 18 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 26 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 11 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + board + + $PROJ_DIR$\..\..\..\boards\ST_STM32VL_DISCOVERY\board.c + + + $PROJ_DIR$\..\..\..\boards\ST_STM32VL_DISCOVERY\board.h + + + + os + + hal + + include + + $PROJ_DIR$\..\..\..\os\hal\include\adc.h + + + $PROJ_DIR$\..\..\..\os\hal\include\can.h + + + $PROJ_DIR$\..\..\..\os\hal\include\hal.h + + + $PROJ_DIR$\..\..\..\os\hal\include\i2c.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mac.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mii.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mmc_spi.h + + + $PROJ_DIR$\..\..\..\os\hal\include\pal.h + + + $PROJ_DIR$\..\..\..\os\hal\include\pwm.h + + + $PROJ_DIR$\..\..\..\os\hal\include\serial.h + + + $PROJ_DIR$\..\..\..\os\hal\include\spi.h + + + $PROJ_DIR$\..\..\..\os\hal\include\uart.h + + + + src + + $PROJ_DIR$\..\..\..\os\hal\src\adc.c + + + $PROJ_DIR$\..\..\..\os\hal\src\can.c + + + $PROJ_DIR$\..\..\..\os\hal\src\hal.c + + + $PROJ_DIR$\..\..\..\os\hal\src\i2c.c + + + $PROJ_DIR$\..\..\..\os\hal\src\mac.c + + + $PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c + + + $PROJ_DIR$\..\..\..\os\hal\src\pal.c + + + $PROJ_DIR$\..\..\..\os\hal\src\pwm.c + + + $PROJ_DIR$\..\..\..\os\hal\src\serial.c + + + $PROJ_DIR$\..\..\..\os\hal\src\spi.c + + + $PROJ_DIR$\..\..\..\os\hal\src\uart.c + + + + + kernel + + include + + $PROJ_DIR$\..\..\..\os\kernel\include\ch.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chcond.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chdebug.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chdynamic.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chevents.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chheap.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chinline.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chioch.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chlists.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmboxes.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmemcore.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmempools.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmsg.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmtx.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chqueues.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chregistry.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chschd.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chsem.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chstreams.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chsys.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chthreads.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chvt.h + + + + src + + $PROJ_DIR$\..\..\..\os\kernel\src\chcond.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chevents.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chheap.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chlists.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chschd.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chsem.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chsys.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chvt.c + + + + + platform + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\adc_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\can_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\core_cm3.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f100.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f103.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\hal_lld_f105_f107.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pal_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\pwm_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\serial_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\spi_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32_dma.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\stm32f10x.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32\uart_lld.h + + + + port + + STM32 + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\cmparams.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32\vectors.s + + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chtypes.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\cstartup.s + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.h + + + + + test + + $PROJ_DIR$\..\..\..\test\test.c + + + $PROJ_DIR$\..\..\..\test\test.h + + + $PROJ_DIR$\..\..\..\test\testbmk.c + + + $PROJ_DIR$\..\..\..\test\testbmk.h + + + $PROJ_DIR$\..\..\..\test\testdyn.c + + + $PROJ_DIR$\..\..\..\test\testdyn.h + + + $PROJ_DIR$\..\..\..\test\testevt.c + + + $PROJ_DIR$\..\..\..\test\testevt.h + + + $PROJ_DIR$\..\..\..\test\testheap.c + + + $PROJ_DIR$\..\..\..\test\testheap.h + + + $PROJ_DIR$\..\..\..\test\testmbox.c + + + $PROJ_DIR$\..\..\..\test\testmbox.h + + + $PROJ_DIR$\..\..\..\test\testmsg.c + + + $PROJ_DIR$\..\..\..\test\testmsg.h + + + $PROJ_DIR$\..\..\..\test\testmtx.c + + + $PROJ_DIR$\..\..\..\test\testmtx.h + + + $PROJ_DIR$\..\..\..\test\testpools.c + + + $PROJ_DIR$\..\..\..\test\testpools.h + + + $PROJ_DIR$\..\..\..\test\testqueues.c + + + $PROJ_DIR$\..\..\..\test\testqueues.h + + + $PROJ_DIR$\..\..\..\test\testsem.c + + + $PROJ_DIR$\..\..\..\test\testsem.h + + + $PROJ_DIR$\..\..\..\test\testthd.c + + + $PROJ_DIR$\..\..\..\test\testthd.h + + + + $PROJ_DIR$\..\chconf.h + + + $PROJ_DIR$\..\halconf.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\mcuconf.h + + + + diff --git a/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.eww b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\ch.ewp + + + + + diff --git a/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.icf b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.icf new file mode 100644 index 000000000..138f1a1a3 --- /dev/null +++ b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/iar/ch.icf @@ -0,0 +1,37 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20001FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x400; +/**** End of ICF editor section. ###ICF###*/ + +/* Size of the Process Stack.*/ +define symbol __ICFEDIT_size_pstack__ = 0x400; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block PSTACK with alignment = 8, size = __ICFEDIT_size_pstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; +define block SYSHEAP with alignment = 8, size = 0 { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section .intvec }; +place at address mem:__ICFEDIT_intvec_start__ { section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { block PSTACK, block CSTACK, readwrite, block HEAP, block SYSHEAP}; + +define exported symbol __heap_end__ = end(RAM_region) + 1; \ No newline at end of file diff --git a/demos/ARMCM3-STM32F100-DISCOVERY-GCC/main.c b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/main.c index 9e2ee3a6b..f27371742 100644 --- a/demos/ARMCM3-STM32F100-DISCOVERY-GCC/main.c +++ b/demos/ARMCM3-STM32F100-DISCOVERY-GCC/main.c @@ -196,6 +196,13 @@ int main(void) { */ spiStart(&SPID1, &spicfg); + /* + * Initializes the ADC driver 1. + * The pin PC0 on the port GPIOC is programmed as analog input. + */ + adcStart(&ADCD1, NULL); + palSetGroupMode(GPIOC, PAL_PORT_BIT(0), PAL_MODE_INPUT_ANALOG); + /* * Initializes the PWM driver 1, re-routes the TIM3 outputs, programs the * pins as alternate functions. @@ -207,14 +214,6 @@ int main(void) { palSetGroupMode(GPIOC, PAL_PORT_BIT(GPIOC_LED3) | PAL_PORT_BIT(GPIOC_LED4), PAL_MODE_STM32_ALTERNATE_PUSHPULL); - /* - * Initializes the ADC driver 1 and performs a conversion. - * The pin PC0 on the port GPIOC is programmed as analog input. - */ - adcStart(&ADCD1, NULL); - palSetGroupMode(GPIOC, PAL_PORT_BIT(0), PAL_MODE_INPUT_ANALOG); - adcConvert(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); - /* * Creates the example thread. */ -- cgit v1.2.3