From 1245e8e3c2198d529263b01fd5dd215a3b84b4d5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 10 Nov 2012 08:20:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4807 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/MSP430-MSP430F5437/Makefile | 157 ++ demos/MSP430-MSP430F5437/chconf.h | 542 +++++ demos/MSP430-MSP430F5437/halconf.h | 342 ++++ demos/MSP430-MSP430F5437/iar/asmdefines.s43 | 45 + demos/MSP430-MSP430F5437/iar/ch.dep | 1061 ++++++++++ demos/MSP430-MSP430F5437/iar/ch.ewd | 659 ++++++ demos/MSP430-MSP430F5437/iar/ch.ewp | 2229 +++++++++++++++++++++ demos/MSP430-MSP430F5437/iar/ch.eww | 10 + demos/MSP430-MSP430F5437/iar/settings/ch.cspy.bat | 33 + demos/MSP430-MSP430F5437/iar/settings/ch.dbgdt | 84 + demos/MSP430-MSP430F5437/iar/settings/ch.dni | 63 + demos/MSP430-MSP430F5437/iar/settings/ch.wsdt | 67 + demos/MSP430-MSP430F5437/main.c | 188 ++ demos/MSP430-MSP430F5437/mcuconf.h | 58 + demos/MSP430-MSP430F5437/memory.x | 29 + demos/MSP430-MSP430F5437/msp430.x | 184 ++ demos/MSP430-MSP430F5437/periph.x | 579 ++++++ demos/MSP430-MSP430F5437/readme.txt | 29 + 18 files changed, 6359 insertions(+) create mode 100644 demos/MSP430-MSP430F5437/Makefile create mode 100644 demos/MSP430-MSP430F5437/chconf.h create mode 100644 demos/MSP430-MSP430F5437/halconf.h create mode 100644 demos/MSP430-MSP430F5437/iar/asmdefines.s43 create mode 100644 demos/MSP430-MSP430F5437/iar/ch.dep create mode 100644 demos/MSP430-MSP430F5437/iar/ch.ewd create mode 100644 demos/MSP430-MSP430F5437/iar/ch.ewp create mode 100644 demos/MSP430-MSP430F5437/iar/ch.eww create mode 100644 demos/MSP430-MSP430F5437/iar/settings/ch.cspy.bat create mode 100644 demos/MSP430-MSP430F5437/iar/settings/ch.dbgdt create mode 100644 demos/MSP430-MSP430F5437/iar/settings/ch.dni create mode 100644 demos/MSP430-MSP430F5437/iar/settings/ch.wsdt create mode 100644 demos/MSP430-MSP430F5437/main.c create mode 100644 demos/MSP430-MSP430F5437/mcuconf.h create mode 100644 demos/MSP430-MSP430F5437/memory.x create mode 100644 demos/MSP430-MSP430F5437/msp430.x create mode 100644 demos/MSP430-MSP430F5437/periph.x create mode 100644 demos/MSP430-MSP430F5437/readme.txt (limited to 'demos') diff --git a/demos/MSP430-MSP430F5437/Makefile b/demos/MSP430-MSP430F5437/Makefile new file mode 100644 index 000000000..555794276 --- /dev/null +++ b/demos/MSP430-MSP430F5437/Makefile @@ -0,0 +1,157 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = no +endif + +# Enable register caching optimization (read documentation). +# Option not tested on MSP430, DO NOT USE. +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT = msp430.x + +# Imported source files +CHIBIOS = ../.. +include $(CHIBIOS)/boards/NONSTANDARD_MSP430_F5437/board.mk +include $(CHIBIOS)/os/hal/platforms/MSP430X/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/common/MSP430X/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/various/shell.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = msp430x5437 + +TRGT = msp430- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -D__MSP430F5437__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/common/MSP430X/rules.mk diff --git a/demos/MSP430-MSP430F5437/chconf.h b/demos/MSP430-MSP430F5437/chconf.h new file mode 100644 index 000000000..f6eb2e4fd --- /dev/null +++ b/demos/MSP430-MSP430F5437/chconf.h @@ -0,0 +1,542 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file chconf.h + * @brief Configuration file. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 250 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 /* 2048 byte RAM seems to be ok in case of not providing @p __heap_base__ and @p __heap_end__ symbols */ +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/demos/MSP430-MSP430F5437/halconf.h b/demos/MSP430-MSP430F5437/halconf.h new file mode 100644 index 000000000..c9b3ad25a --- /dev/null +++ b/demos/MSP430-MSP430F5437/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/demos/MSP430-MSP430F5437/iar/asmdefines.s43 b/demos/MSP430-MSP430F5437/iar/asmdefines.s43 new file mode 100644 index 000000000..de97d9fb7 --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/asmdefines.s43 @@ -0,0 +1,45 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +#define _FROM_ASM_ + +PUBLIC __heap_base__ +PUBLIC __heap_end__ + +#if defined(__MSP430F5437__) +// Read/write memory (RAM) on MSP430F5437: 0x01C00-0x05BFF + +ORG 0x01C00 +__heap_base__: + +ORG 0x05BFF +__heap_end__: +#else +#error "Unspecified __heap_base__ and __heap_end__ symbols." +#endif + +END diff --git a/demos/MSP430-MSP430F5437/iar/ch.dep b/demos/MSP430-MSP430F5437/iar/ch.dep new file mode 100644 index 000000000..1999cfd6e --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/ch.dep @@ -0,0 +1,1061 @@ + + + + 2 + 3699204469 + + Debug + + $PROJ_DIR$\Debug\Obj\HAL_PMAP.r43 + $PROJ_DIR$\Debug\Obj\pal_lld.pbi + $PROJ_DIR$\Debug\Obj\serial_lld.pbi + $PROJ_DIR$\Debug\Obj\mmc_spi.pbi + $PROJ_DIR$\Debug\Obj\serial_usb.pbi + $PROJ_DIR$\Debug\Obj\chevents.pbi + $PROJ_DIR$\Debug\Obj\adc.pbi + $PROJ_DIR$\Debug\Obj\can.pbi + $PROJ_DIR$\Debug\Obj\ext.pbi + $PROJ_DIR$\Debug\Obj\gpt.pbi + $PROJ_DIR$\Debug\Obj\hal.pbi + $PROJ_DIR$\Debug\Obj\i2c.pbi + $PROJ_DIR$\Debug\Obj\icu.pbi + $PROJ_DIR$\Debug\Obj\mac.pbi + $PROJ_DIR$\Debug\Obj\chmtx.r43 + $PROJ_DIR$\Debug\Obj\chregistry.r43 + $PROJ_DIR$\Debug\Obj\chsem.r43 + $PROJ_DIR$\Debug\Obj\chsys.r43 + $PROJ_DIR$\Debug\Obj\chvt.r43 + $PROJ_DIR$\Debug\Obj\chschd.r43 + $PROJ_DIR$\Debug\Obj\chprintf.r43 + $PROJ_DIR$\Debug\Obj\testbmk.r43 + $PROJ_DIR$\Debug\Obj\serial_lld.r43 + $PROJ_DIR$\Debug\Obj\mmc_spi.r43 + $PROJ_DIR$\Debug\Obj\pal.r43 + $PROJ_DIR$\Debug\Obj\testevt.pbi + $PROJ_DIR$\Debug\Obj\shell.pbi + $PROJ_DIR$\Debug\Obj\test.pbi + $PROJ_DIR$\Debug\Obj\testheap.pbi + $PROJ_DIR$\Debug\Obj\testmbox.pbi + $PROJ_DIR$\Debug\Obj\testmsg.pbi + $PROJ_DIR$\Debug\Obj\testmtx.pbi + $PROJ_DIR$\Debug\Obj\testpools.pbi + $PROJ_DIR$\Debug\Obj\testqueues.pbi + $PROJ_DIR$\Debug\Obj\testsem.pbi + $PROJ_DIR$\Debug\Obj\testthd.pbi + $PROJ_DIR$\Debug\Obj\ch.pbd + $PROJ_DIR$\Debug\Exe\ch.d43 + $PROJ_DIR$\Debug\Obj\main.pbi + $PROJ_DIR$\Debug\Obj\can.r43 + $PROJ_DIR$\Debug\Obj\ext.r43 + $PROJ_DIR$\Debug\Obj\gpt.r43 + $PROJ_DIR$\Debug\Obj\hal.r43 + $PROJ_DIR$\Debug\Obj\i2c.r43 + $PROJ_DIR$\Debug\Obj\pwm.r43 + $PROJ_DIR$\Debug\Obj\serial.r43 + $PROJ_DIR$\Debug\Obj\sdc.r43 + $PROJ_DIR$\Debug\Obj\chdebug.r43 + $PROJ_DIR$\Debug\Obj\chmemcore.r43 + $PROJ_DIR$\Debug\Obj\chheap.r43 + $PROJ_DIR$\Debug\Obj\chqueues.r43 + $PROJ_DIR$\Debug\Obj\chmsg.r43 + $PROJ_DIR$\Debug\Obj\chthreads.r43 + $PROJ_DIR$\Debug\Obj\tm.r43 + $PROJ_DIR$\Debug\Obj\chcond.r43 + $PROJ_DIR$\Debug\Obj\uart.r43 + $PROJ_DIR$\Debug\Obj\asmdefines.r43 + $PROJ_DIR$\Debug\Obj\main.r43 + $PROJ_DIR$\Debug\Obj\HAL_PMAP.pbi + $PROJ_DIR$\Debug\Obj\HAL_FLASH.pbi + $PROJ_DIR$\Debug\Obj\board.pbi + $PROJ_DIR$\Debug\Obj\HAL_PMM.pbi + $PROJ_DIR$\Debug\Obj\HAL_TLV.pbi + $PROJ_DIR$\Debug\Obj\HAL_UCS.pbi + $PROJ_DIR$\Debug\Obj\hal_lld.pbi + $PROJ_DIR$\Debug\Obj\chdebug.pbi + $PROJ_DIR$\Debug\Obj\pal.pbi + $PROJ_DIR$\Debug\Obj\pwm.pbi + $PROJ_DIR$\Debug\Obj\rtc.pbi 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$PROJ_DIR$\Debug\Obj\hal_lld.r43 + $PROJ_DIR$\Debug\Obj\pal_lld.r43 + $PROJ_DIR$\Debug\Obj\HAL_PMM.r43 + $PROJ_DIR$\Debug\Obj\HAL_FLASH.r43 + $PROJ_DIR$\Debug\Obj\spi.r43 + $PROJ_DIR$\Debug\Obj\testmbox.r43 + $PROJ_DIR$\Debug\Obj\testmsg.r43 + $PROJ_DIR$\Debug\Obj\testmtx.r43 + $PROJ_DIR$\Debug\Obj\testpools.r43 + $PROJ_DIR$\Debug\Obj\testqueues.r43 + $PROJ_DIR$\Debug\Obj\testsem.r43 + $PROJ_DIR$\Debug\Obj\testthd.r43 + $PROJ_DIR$\Debug\Obj\chlists.r43 + $PROJ_DIR$\Debug\Obj\chmboxes.r43 + $PROJ_DIR$\Debug\Obj\chmempools.r43 + $PROJ_DIR$\Debug\Obj\usb.pbi + $PROJ_DIR$\Debug\Obj\chcond.pbi + $PROJ_DIR$\Debug\Obj\chlists.pbi + $PROJ_DIR$\Debug\Obj\chmemcore.pbi + $PROJ_DIR$\Debug\Obj\chmboxes.pbi + $PROJ_DIR$\Debug\Obj\chheap.pbi + $PROJ_DIR$\Debug\Obj\chmempools.pbi + $PROJ_DIR$\Debug\Obj\chqueues.pbi + $PROJ_DIR$\Debug\Obj\chregistry.pbi + $PROJ_DIR$\Debug\Obj\usb.r43 + $PROJ_DIR$\Debug\Obj\chdynamic.r43 + $PROJ_DIR$\Debug\Obj\chevents.r43 + $PROJ_DIR$\..\..\..\os\kernel\src\chcond.c + $PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c + $PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c + $PROJ_DIR$\..\..\..\os\kernel\src\chevents.c + $PROJ_DIR$\..\..\..\os\kernel\src\chheap.c + $PROJ_DIR$\..\..\..\os\kernel\src\chlists.c + $PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c + $PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c + $PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c + $PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c + $PROJ_DIR$\..\..\..\boards\NONSTANDARD_MSP430_F5437\board.h + $PROJ_DIR$\..\..\..\os\hal\src\can.c + $PROJ_DIR$\..\..\..\os\hal\src\ext.c + $PROJ_DIR$\..\..\..\os\hal\src\gpt.c + $PROJ_DIR$\..\..\..\os\hal\src\hal.c + $PROJ_DIR$\..\..\..\os\hal\src\i2c.c + $PROJ_DIR$\..\..\..\os\hal\src\icu.c + $PROJ_DIR$\..\..\..\os\hal\src\mac.c + $PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c + $PROJ_DIR$\..\..\..\os\hal\src\pal.c + $PROJ_DIR$\..\..\..\os\hal\src\pwm.c + $PROJ_DIR$\..\..\..\os\hal\src\rtc.c + $PROJ_DIR$\..\..\..\os\hal\src\sdc.c + $PROJ_DIR$\..\..\..\os\hal\src\serial.c + $PROJ_DIR$\..\..\..\os\hal\src\serial_usb.c + $PROJ_DIR$\..\..\..\os\hal\src\spi.c + $PROJ_DIR$\..\..\..\os\hal\src\tm.c + $PROJ_DIR$\..\..\..\os\hal\src\uart.c + $PROJ_DIR$\..\..\..\os\hal\src\usb.c + $PROJ_DIR$\Debug\Obj\icu.r43 + $PROJ_DIR$\Debug\Obj\mac.r43 + $PROJ_DIR$\Debug\Obj\serial_usb.r43 + $PROJ_DIR$\Debug\Obj\rtc.r43 + $PROJ_DIR$\..\..\..\boards\NONSTANDARD_MSP430_F5437\board.c + $PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c + $PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c + $PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c + $PROJ_DIR$\..\..\..\os\kernel\src\chschd.c + $PROJ_DIR$\..\..\..\os\kernel\src\chsem.c + $PROJ_DIR$\..\..\..\os\kernel\src\chsys.c + $PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c + $PROJ_DIR$\..\..\..\os\kernel\src\chvt.c + $PROJ_DIR$\..\..\..\os\ports\common\MSP430X\chcore.c + $PROJ_DIR$\..\..\..\os\ports\common\MSP430X\chcore.h + $PROJ_DIR$\..\..\..\os\ports\common\MSP430X\chtypes.h + $PROJ_DIR$\..\..\..\os\various\chprintf.c + $PROJ_DIR$\..\..\..\os\various\evtimer.c + $PROJ_DIR$\..\..\..\os\various\shell.c + $PROJ_DIR$\..\..\..\test\test.c + $PROJ_DIR$\..\..\..\test\testbmk.c + $PROJ_DIR$\..\..\..\test\testdyn.c + $PROJ_DIR$\..\..\..\test\testevt.c + $PROJ_DIR$\..\..\..\test\testheap.c + $PROJ_DIR$\..\..\..\test\testmbox.c + $PROJ_DIR$\..\..\..\test\testmsg.c + $PROJ_DIR$\..\..\..\test\testmtx.c + $PROJ_DIR$\..\..\..\test\testpools.c + $PROJ_DIR$\..\..\..\test\testqueues.c + $PROJ_DIR$\..\..\..\test\testsem.c + $PROJ_DIR$\..\..\..\test\testthd.c + $PROJ_DIR$\..\asmdefines.s43 + $PROJ_DIR$\..\chconf.h + $PROJ_DIR$\..\halconf.h + $PROJ_DIR$\..\main.c + $PROJ_DIR$\..\mcuconf.h + $PROJ_DIR$\..\readme.txt + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\F5xx_F6xx_Core_Lib\HAL_FLASH.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\F5xx_F6xx_Core_Lib\HAL_PMAP.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\F5xx_F6xx_Core_Lib\HAL_PMM.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\F5xx_F6xx_Core_Lib\HAL_TLV.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\F5xx_F6xx_Core_Lib\HAL_UCS.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\hal_lld.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\pal_lld.c + $PROJ_DIR$\..\..\..\os\hal\platforms\MSP430X\serial_lld.c + $PROJ_DIR$\..\..\..\os\hal\src\adc.c + + + [ROOT_NODE] + + + XLINK + 37 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chcond.c + + + BICOMP + 114 + + + ICC430 + 54 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c + + + BICOMP + 65 + + + ICC430 + 47 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c + + + BICOMP + 71 + + + ICC430 + 123 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chevents.c + + + BICOMP + 5 + + + ICC430 + 124 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chheap.c + + + BICOMP + 118 + + + ICC430 + 49 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chlists.c + + + BICOMP + 115 + + + ICC430 + 110 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c + + + BICOMP + 117 + + + ICC430 + 111 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c + + + BICOMP + 116 + + + ICC430 + 48 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c + + + BICOMP + 119 + + + ICC430 + 112 + + + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c + + + BICOMP + 77 + + + ICC430 + 51 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\can.c + + + BICOMP + 7 + + + ICC430 + 39 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\ext.c + + + BICOMP + 8 + + + ICC430 + 40 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\gpt.c + + + BICOMP + 9 + + + ICC430 + 41 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\hal.c + + + BICOMP + 10 + + + ICC430 + 42 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\i2c.c + + + BICOMP + 11 + + + ICC430 + 43 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\icu.c + + + BICOMP + 12 + + + ICC430 + 154 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\mac.c + + + BICOMP + 13 + + + ICC430 + 155 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c + + + BICOMP + 3 + + + ICC430 + 23 + + + + + $PROJ_DIR$\..\..\..\os\hal\src\pal.c + + + BICOMP + 66 + + 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$PROJ_DIR$\..\readme.txt + + + + diff --git a/demos/MSP430-MSP430F5437/iar/ch.eww b/demos/MSP430-MSP430F5437/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/ch.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\ch.ewp + + + + + diff --git a/demos/MSP430-MSP430F5437/iar/settings/ch.cspy.bat b/demos/MSP430-MSP430F5437/iar/settings/ch.cspy.bat new file mode 100644 index 000000000..78da19ea7 --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/settings/ch.cspy.bat @@ -0,0 +1,33 @@ +@REM This bat file has been generated by the IAR Embeddded Workbench +@REM C-SPY interactive debugger,as an aid to preparing a command +@REM line for running the cspybat command line utility with the +@REM appropriate settings. +@REM +@REM After making some adjustments to this file, you can launch cspybat +@REM by typing the name of this file followed by the name of the debug +@REM file (usually an ubrof file). Note that this file is generated +@REM every time a new debug session is initialized, so you may want to +@REM move or rename the file before making changes. +@REM +@REM Note: some command line arguments cannot be properly generated +@REM by this process. Specifically, the plugin which is responsible +@REM for the Terminal I/O window (and other C runtime functionality) +@REM comes in a special version for cspybat, and the name of that +@REM plugin dll is not known when generating this file. It resides in +@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or +@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding +@REM tool chain. Replace the '' parameter +@REM below with the appropriate file name. Other plugins loaded by +@REM C-SPY are usually not needed by, or will not work in, cspybat +@REM but they are listed at the end of this file for reference. + + +"D:\Programme\IAR510\common\bin\cspybat" "D:\Programme\IAR510\430\bin\430proc.dll" "D:\Programme\IAR510\430\bin\430fet.dll" %1 --plugin "D:\Programme\IAR510\430\bin\" --backend -B "--hardware_multiplier" "32" "--hwmult_type" "8" "-p" "D:\Programme\IAR510\430\config\MSP430F5437.ddf" "--core=430Xv2" "--data_model=large" "--iv_base" "0xFF80" "-d" "fet" "--erase_main_and_info" "--derivative" "MSP430F5437" "--protocol" "automatic" "--eem" "EMEX_LARGE_5XX" "--port" "Automatic" "--connection" "ti_usb" "--settlingtime=0" "--msp430_dll" "msp430.dll" + + +@REM Loaded plugins: +@REM D:\Programme\IAR510\430\bin\430libsupport.dll +@REM D:\Programme\IAR510\common\plugins\CodeCoverage\CodeCoverage.dll +@REM D:\Programme\IAR510\common\plugins\Profiling\Profiling.dll +@REM D:\Programme\IAR510\common\plugins\stack\stack.dll +@REM D:\Programme\IAR510\common\plugins\SymList\SymList.dll diff --git a/demos/MSP430-MSP430F5437/iar/settings/ch.dbgdt b/demos/MSP430-MSP430F5437/iar/settings/ch.dbgdt new file mode 100644 index 000000000..e1754ffe0 --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/settings/ch.dbgdt @@ -0,0 +1,84 @@ + + + + + + + + + 201622 + + + + + + 20121632481 + + + + + + + 308272727 + + + + + + 100 + 10296443142100 + + + + + + + + TabID-16802-28427 + Debug Log + Debug-Log + + + + TabID-16280-28437 + Build + Build + + + + + 0 + + + TabID-27551-28430 + Workspace + Workspace + + + chch/test + + + + 0TabID-17279-4530MemoryMemory091069106100000560TabID-26585-5379WatchWatchp*(char *)pwa[0]tpntpotpwsppSD102964431421001TabID-2411-5013RegisterRegister0001WDTCTL0 + TabID-5531-28434 + Disassembly + Disassembly + + 0 + + + + + + TextEditor$WS_DIR$\..\main.c0128377337730TextEditor$WS_DIR$\..\..\..\test\test.c031464596469TextEditor$WS_DIR$\..\..\..\os\kernel\src\chdynamic.c012448234823TextEditor$WS_DIR$\..\..\..\os\kernel\src\chthreads.c063334833480100000010000001 + + + + + + + iaridepm.enu1debuggergui.enu1430fet1-2-2533398-2-2200200119048203666238095544807-2-2533536-2-2200200119048203666320238544807-2-2301682-2-216843210023813258711904820366628-2357952-22895432956785733503111904820366628950357168295028732329435714335031209524505092 + + + + diff --git a/demos/MSP430-MSP430F5437/iar/settings/ch.dni b/demos/MSP430-MSP430F5437/iar/settings/ch.dni new file mode 100644 index 000000000..c1f375596 --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/settings/ch.dni @@ -0,0 +1,63 @@ +[DebugChecksum] +Checksum=831366 +[DisAssemblyWindow] +NumStates=_ 1 +State 1=_ 1 +[InstructionProfiling] +Enabled=_ 0 +[CodeCoverage] +Enabled=_ 0 +[State Storage] +Control Register=771 +[Sequencer] +Control Register=0 +NextState0=0 +NextState1=0 +[Action Register] +Break=1 +State Storage=0 +[Profiling] +Enabled=0 +[StackPlugin] +Enabled=1 +OverflowWarningsEnabled=1 +WarningThreshold=90 +SpWarningsEnabled=1 +WarnHow=0 +UseTrigger=1 +TriggerName=main +LimitSize=0 +ByteLimit=50 +[Log file] +LoggingEnabled=_ 0 +LogFile=_ "" +Category=_ 0 +[TermIOLog] +LoggingEnabled=_ 0 +LogFile=_ "" +[Breakpoints] +Bp0=_ "STD_CODE" "{$PROJ_DIR$\..\..\..\test\test.c}.365.3@1" 0 0 0 0 "" 0 "" +Count=1 +[FET] +Clock mode=14 +Extended Clock mode=-1 +Secure Password= +Extended Clock Control Enable=1 +Advanced Extended Clock Control=0 +Emulation mode=0 +Free running=0 +Shutting Down=3 +[Memory Dump] +Start address= +Lenghth= +Address info=0 +Format=0 +Dump registers=0 +PC=0 +SP=0 +SR=0 +all registers=0 +File name= +[Aliases] +Count=0 +SuppressDialog=0 diff --git a/demos/MSP430-MSP430F5437/iar/settings/ch.wsdt b/demos/MSP430-MSP430F5437/iar/settings/ch.wsdt new file mode 100644 index 000000000..12cb61786 --- /dev/null +++ b/demos/MSP430-MSP430F5437/iar/settings/ch.wsdt @@ -0,0 +1,67 @@ + + + + + + ch/Debug + + + + + + + + + 242272727 + + + + + + + 20121632481 + + + + + + + + + TabID-11-28332 + Workspace + Workspace + + + chch/boardch/osch/os/ports + + + + 0 + + + TabID-10236-28346 + Build + Build + + + + + 0 + + + + + + TextEditor$WS_DIR$\..\main.c0128377337730TextEditor$WS_DIR$\..\..\..\test\test.c031464596469TextEditor$WS_DIR$\..\..\..\os\kernel\src\chdynamic.c012448234823TextEditor$WS_DIR$\..\..\..\os\kernel\src\chthreads.c063334833480100000010000001 + + + + + + + iaridepm.enu1-2-2767316-2-214914388690145621189286783096-2-21711682-2-21684173100238117617188690145621 + + + + diff --git a/demos/MSP430-MSP430F5437/main.c b/demos/MSP430-MSP430F5437/main.c new file mode 100644 index 000000000..3ad58cdda --- /dev/null +++ b/demos/MSP430-MSP430F5437/main.c @@ -0,0 +1,188 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "test.h" +#include "chprintf.h" +#include "shell.h" + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 64); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("red blinker"); + + while (TRUE) { + palSetPad(IOPORT6, P6_O_RED_LED); + chThdSleepMilliseconds(500); + palClearPad(IOPORT6, P6_O_RED_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Green LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread2, 64); +static msg_t Thread2(void *arg) { + + (void)arg; + chRegSetThreadName("green blinker"); + + while (TRUE) { + palSetPad(IOPORT6, P6_O_GREEN_LED); + chThdSleepMilliseconds(1500); + palClearPad(IOPORT6, P6_O_GREEN_LED); + chThdSleepMilliseconds(1500); + } + return 0; +} + +static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.sp, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + + TestThread(chp); +} + +static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){ + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: rboot\r\n"); + return; + } + chprintf(chp, "rebooting...\r\n"); + chThdSleepMilliseconds(100); + + WDTCTL = 0; /* Giving invalid value to watchdog cause reboot. */ +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {"reboot", cmd_reboot}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg[] = { + {(BaseChannel *)&SD1, commands}, + {(BaseChannel *)&SD2, commands}, +}; + +/* + * Application entry point. + */ +int main(void) { + + /* RTC initially stopped.*/ + WDTCTL = WDTPW | WDTHOLD; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * The main() function becomes a thread here then the interrupts are + * enabled and ChibiOS/RT goes live. + */ + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD1, NULL); + sdStart(&SD2, NULL); + + /* Shell manager initialization.*/ + shellInit(); + static WORKING_AREA(waShell1, 512); + shellCreateStatic(&shell_cfg[0], waShell1, sizeof(waShell1), NORMALPRIO); + static WORKING_AREA(waShell2, 512); + shellCreateStatic(&shell_cfg[1], waShell2, sizeof(waShell2), NORMALPRIO); + + /* Creates the blinker thread. */ + Thread *th[] = { + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO+1, Thread1, NULL), + chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO+2, Thread2, NULL), + }; + + cnt_t idx; + for( idx = 0; idx < sizeof(th)/sizeof(th[0]); ++idx ) { + msg_t msg = chThdWait(th[idx]); + } + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/demos/MSP430-MSP430F5437/mcuconf.h b/demos/MSP430-MSP430F5437/mcuconf.h new file mode 100644 index 000000000..feab7d1e6 --- /dev/null +++ b/demos/MSP430-MSP430F5437/mcuconf.h @@ -0,0 +1,58 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * MSP430 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + */ + +/* + * HAL driver system settings. + */ +#define MSP430_USE_CLOCK MSP430_CLOCK_SOURCE_DCOCLK + +/* + * ADC driver system settings. + */ + +/* + * CAN driver system settings. + */ + +/* + * MAC driver system settings. + */ + +/* + * PWM driver system settings. + */ + +/* + * SERIAL driver system settings. + */ +#define USE_MSP430_USART0 TRUE +#define USE_MSP430_USART1 TRUE + +/* + * SPI driver system settings. + */ diff --git a/demos/MSP430-MSP430F5437/memory.x b/demos/MSP430-MSP430F5437/memory.x new file mode 100644 index 000000000..63d41777c --- /dev/null +++ b/demos/MSP430-MSP430F5437/memory.x @@ -0,0 +1,29 @@ +MEMORY { + sfr : ORIGIN = 0x0000, LENGTH = 0x0010 /* END=0x0010, size 16 */ + peripheral_8bit : ORIGIN = 0x0010, LENGTH = 0x00f0 /* END=0x0100, size 240 */ + peripheral_16bit : ORIGIN = 0x0100, LENGTH = 0x0100 /* END=0x0200, size 256 */ + bsl : ORIGIN = 0x1000, LENGTH = 0x0800 /* END=0x1800, size 2K as 4 512-byte segments */ + infomem : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x1a00, size 512 as 4 128-byte segments */ + infod : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x1880, size 128 */ + infoc : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x1900, size 128 */ + infob : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x1980, size 128 */ + infoa : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x1a00, size 128 */ + ram (wx) : ORIGIN = 0x1c00, LENGTH = 0x4000 /* END=0x5c00, size 16K */ + rom (rx) : ORIGIN = 0x5c00, LENGTH = 0xa380 /* END=0xff80, size 41856 */ + vectors : ORIGIN = 0xff80, LENGTH = 0x0080 /* END=0x10000, size 128 as 64 2-byte segments */ + far_rom : ORIGIN = 0x00010000, LENGTH = 0x00035c00 /* END=0x00045c00, size 215K */ + /* Remaining banks are absent */ + ram2 (wx) : ORIGIN = 0x0000, LENGTH = 0x0000 + ram_mirror (wx) : ORIGIN = 0x0000, LENGTH = 0x0000 + usbram (wx) : ORIGIN = 0x0000, LENGTH = 0x0000 +} +REGION_ALIAS("REGION_TEXT", rom); +REGION_ALIAS("REGION_DATA", ram); +REGION_ALIAS("REGION_FAR_ROM", far_rom); +PROVIDE (__info_segment_size = 0x80); +PROVIDE (__infod = 0x1800); +PROVIDE (__infoc = 0x1880); +PROVIDE (__infob = 0x1900); +PROVIDE (__infoa = 0x1980); +PROVIDE (__heap_base__ = 0x01C00); +PROVIDE (__heap_end__ = 0x05BFF); diff --git a/demos/MSP430-MSP430F5437/msp430.x b/demos/MSP430-MSP430F5437/msp430.x new file mode 100644 index 000000000..f314f76c3 --- /dev/null +++ b/demos/MSP430-MSP430F5437/msp430.x @@ -0,0 +1,184 @@ +/* Default linker script, for normal executables */ +OUTPUT_FORMAT("elf32-msp430") +OUTPUT_ARCH("msp430") +INCLUDE memory.x +INCLUDE periph.x +SECTIONS +{ + /* Read-only sections, merged into text segment. */ + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } + .rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } + .rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } + .rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } + .rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } + .rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } + .rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } + .rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .text : + { + . = ALIGN(2); + KEEP(*(.init .init.*)) + KEEP(*(.init0)) /* Start here after reset. */ + KEEP(*(.init1)) /* User definable. */ + KEEP(*(.init2)) /* Initialize stack. */ + KEEP(*(.init3)) /* Initialize hardware, user definable. */ + KEEP(*(.init4)) /* Copy data to .data, clear bss. */ + KEEP(*(.init5)) /* User definable. */ + KEEP(*(.init6)) /* C++ constructors. */ + KEEP(*(.init7)) /* User definable. */ + KEEP(*(.init8)) /* User definable. */ + KEEP(*(.init9)) /* Call main(). */ + KEEP(*(.fini9)) /* Falls into here after main(). User definable. */ + KEEP(*(.fini8)) /* User definable. */ + KEEP(*(.fini7)) /* User definable. */ + KEEP(*(.fini6)) /* C++ destructors. */ + KEEP(*(.fini5)) /* User definable. */ + KEEP(*(.fini4)) /* User definable. */ + KEEP(*(.fini3)) /* User definable. */ + KEEP(*(.fini2)) /* User definable. */ + KEEP(*(.fini1)) /* User definable. */ + KEEP(*(.fini0)) /* Infinite loop after program termination. */ + KEEP(*(.fini .fini.*)) + . = ALIGN(2); + __ctors_start = . ; + KEEP(*(.ctors)) + __ctors_end = . ; + __dtors_start = . ; + KEEP(*(.dtors)) + __dtors_end = . ; + . = ALIGN(2); + *(.text .text.* .gnu.linkonce.t.*) + . = ALIGN(2); + } > REGION_TEXT + .rodata : + { + . = ALIGN(2); + *(.rodata .rodata.* .gnu.linkonce.r.*) + . = ALIGN(2); + } > REGION_TEXT + _etext = .; /* Past last read-only (loadable) segment */ + .data : + { + . = ALIGN(2); + PROVIDE (__data_start = .) ; + *(.data .data.* .gnu.linkonce.d.*) + . = ALIGN(2); + _edata = . ; /* Past last read-write (loadable) segment */ + } > REGION_DATA AT > REGION_TEXT + PROVIDE (__data_load_start = LOADADDR(.data) ); + PROVIDE (__data_size = SIZEOF(.data) ); + .bss : + { + PROVIDE (__bss_start = .) ; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(2); + PROVIDE (__bss_end = .) ; + } > REGION_DATA + PROVIDE (__bss_size = SIZEOF(.bss) ); + .noinit : + { + PROVIDE (__noinit_start = .) ; + *(.noinit .noinit.*) + . = ALIGN(2); + PROVIDE (__noinit_end = .) ; + } > REGION_DATA + . = ALIGN(2); + _end = . ; /* Past last write (loadable) segment */ + .infomem : + { + *(.infomem) + . = ALIGN(2); + *(.infomem.*) + } > infomem + .infomemnobits : + { + *(.infomemnobits) + . = ALIGN(2); + *(.infomemnobits.*) + } > infomem + .infoa : + { + *(.infoa .infoa.*) + } > infoa + .infob : + { + *(.infob .infob.*) + } > infob + .infoc : + { + *(.infoc .infoc.*) + } > infoc + .infod : + { + *(.infod .infod.*) + } > infod + .vectors : + { + PROVIDE (__vectors_start = .) ; + KEEP(*(.vectors*)) + _vectors_end = . ; + } > vectors + .fartext : + { + . = ALIGN(2); + *(.fartext) + . = ALIGN(2); + *(.fartext.*) + _efartext = .; + } > REGION_FAR_ROM + /* Stabs for profiling information*/ + .profiler 0 : { *(.profiler) } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + PROVIDE (__stack = ORIGIN(ram) + LENGTH(ram)); + PROVIDE (__data_start_rom = _etext); + PROVIDE (__data_end_rom = _etext + SIZEOF (.data)); +} diff --git a/demos/MSP430-MSP430F5437/periph.x b/demos/MSP430-MSP430F5437/periph.x new file mode 100644 index 000000000..6df73045c --- /dev/null +++ b/demos/MSP430-MSP430F5437/periph.x @@ -0,0 +1,579 @@ +__ADC12CTL0_L = 0x0700; +__ADC12CTL0_H = 0x0701; +__ADC12CTL0 = 0x0700; +__ADC12CTL1_L = 0x0702; +__ADC12CTL1_H = 0x0703; +__ADC12CTL1 = 0x0702; +__ADC12CTL2_L = 0x0704; +__ADC12CTL2_H = 0x0705; +__ADC12CTL2 = 0x0704; +__ADC12IFG_L = 0x070A; +__ADC12IFG_H = 0x070B; +__ADC12IFG = 0x070A; +__ADC12IE_L = 0x070C; +__ADC12IE_H = 0x070D; +__ADC12IE = 0x070C; +__ADC12IV_L = 0x070E; +__ADC12IV_H = 0x070F; +__ADC12IV = 0x070E; +__ADC12MEM0_L = 0x0720; +__ADC12MEM0_H = 0x0721; +__ADC12MEM0 = 0x0720; +__ADC12MEM1_L = 0x0722; +__ADC12MEM1_H = 0x0723; +__ADC12MEM1 = 0x0722; +__ADC12MEM2_L = 0x0724; +__ADC12MEM2_H = 0x0725; +__ADC12MEM2 = 0x0724; +__ADC12MEM3_L = 0x0726; +__ADC12MEM3_H = 0x0727; +__ADC12MEM3 = 0x0726; +__ADC12MEM4_L = 0x0728; +__ADC12MEM4_H = 0x0729; +__ADC12MEM4 = 0x0728; +__ADC12MEM5_L = 0x072A; +__ADC12MEM5_H = 0x072B; +__ADC12MEM5 = 0x072A; +__ADC12MEM6_L = 0x072C; +__ADC12MEM6_H = 0x072D; +__ADC12MEM6 = 0x072C; +__ADC12MEM7_L = 0x072E; +__ADC12MEM7_H = 0x072F; +__ADC12MEM7 = 0x072E; +__ADC12MEM8_L = 0x0730; +__ADC12MEM8_H = 0x0731; +__ADC12MEM8 = 0x0730; +__ADC12MEM9_L = 0x0732; +__ADC12MEM9_H = 0x0733; +__ADC12MEM9 = 0x0732; +__ADC12MEM10_L = 0x0734; +__ADC12MEM10_H = 0x0735; +__ADC12MEM10 = 0x0734; +__ADC12MEM11_L = 0x0736; +__ADC12MEM11_H = 0x0737; +__ADC12MEM11 = 0x0736; +__ADC12MEM12_L = 0x0738; +__ADC12MEM12_H = 0x0739; +__ADC12MEM12 = 0x0738; +__ADC12MEM13_L = 0x073A; +__ADC12MEM13_H = 0x073B; +__ADC12MEM13 = 0x073A; +__ADC12MEM14_L = 0x073C; +__ADC12MEM14_H = 0x073D; +__ADC12MEM14 = 0x073C; +__ADC12MEM15_L = 0x073E; +__ADC12MEM15_H = 0x073F; +__ADC12MEM15 = 0x073E; +__ADC12MCTL0 = 0x0710; +__ADC12MCTL1 = 0x0711; +__ADC12MCTL2 = 0x0712; +__ADC12MCTL3 = 0x0713; +__ADC12MCTL4 = 0x0714; +__ADC12MCTL5 = 0x0715; +__ADC12MCTL6 = 0x0716; +__ADC12MCTL7 = 0x0717; +__ADC12MCTL8 = 0x0718; +__ADC12MCTL9 = 0x0719; +__ADC12MCTL10 = 0x071A; +__ADC12MCTL11 = 0x071B; +__ADC12MCTL12 = 0x071C; +__ADC12MCTL13 = 0x071D; +__ADC12MCTL14 = 0x071E; +__ADC12MCTL15 = 0x071F; +__CRCDI_L = 0x0150; +__CRCDI_H = 0x0151; +__CRCDI = 0x0150; +__CRCINIRES_L = 0x0154; +__CRCINIRES_H = 0x0155; +__CRCINIRES = 0x0154; +__DMACTL0_L = 0x0500; +__DMACTL0_H = 0x0501; +__DMACTL0 = 0x0500; +__DMACTL1_L = 0x0502; +__DMACTL1_H = 0x0503; +__DMACTL1 = 0x0502; +__DMACTL2_L = 0x0504; +__DMACTL2_H = 0x0505; +__DMACTL2 = 0x0504; +__DMACTL3_L = 0x0506; +__DMACTL3_H = 0x0507; +__DMACTL3 = 0x0506; +__DMACTL4_L = 0x0508; +__DMACTL4_H = 0x0509; +__DMACTL4 = 0x0508; +__DMAIV_L = 0x050E; +__DMAIV_H = 0x050F; +__DMAIV = 0x050E; +__DMA0CTL_L = 0x0510; +__DMA0CTL_H = 0x0511; +__DMA0CTL = 0x0510; +__DMA0SA = 0x0512; +__DMA0DA = 0x0516; +__DMA0SZ = 0x051A; +__DMA1CTL_L = 0x0520; +__DMA1CTL_H = 0x0521; +__DMA1CTL = 0x0520; +__DMA1SA = 0x0522; +__DMA1DA = 0x0526; +__DMA1SZ = 0x052A; +__DMA2CTL_L = 0x0530; +__DMA2CTL_H = 0x0531; +__DMA2CTL = 0x0530; +__DMA2SA = 0x0532; +__DMA2DA = 0x0536; +__DMA2SZ = 0x053A; +__FCTL1_L = 0x0140; +__FCTL1_H = 0x0141; +__FCTL1 = 0x0140; +__FCTL3_L = 0x0144; +__FCTL3_H = 0x0145; +__FCTL3 = 0x0144; +__FCTL4_L = 0x0146; +__FCTL4_H = 0x0147; +__FCTL4 = 0x0146; +__MPY_L = 0x04C0; +__MPY_H = 0x04C1; +__MPY = 0x04C0; +__MPYS_L = 0x04C2; +__MPYS_H = 0x04C3; +__MPYS = 0x04C2; +__MAC_L = 0x04C4; +__MAC_H = 0x04C5; +__MAC = 0x04C4; +__MACS_L = 0x04C6; +__MACS_H = 0x04C7; +__MACS = 0x04C6; +__OP2_L = 0x04C8; +__OP2_H = 0x04C9; +__OP2 = 0x04C8; +__RESLO_L = 0x04CA; +__RESLO_H = 0x04CB; +__RESLO = 0x04CA; +__RESHI_L = 0x04CC; +__RESHI_H = 0x04CD; +__RESHI = 0x04CC; +__SUMEXT_L = 0x04CE; +__SUMEXT_H = 0x04CF; +__SUMEXT = 0x04CE; +__MPY32L_L = 0x04D0; +__MPY32L_H = 0x04D1; +__MPY32L = 0x04D0; +__MPY32H_L = 0x04D2; +__MPY32H_H = 0x04D3; +__MPY32H = 0x04D2; +__MPYS32L_L = 0x04D4; +__MPYS32L_H = 0x04D5; +__MPYS32L = 0x04D4; +__MPYS32H_L = 0x04D6; +__MPYS32H_H = 0x04D7; +__MPYS32H = 0x04D6; +__MAC32L_L = 0x04D8; +__MAC32L_H = 0x04D9; +__MAC32L = 0x04D8; +__MAC32H_L = 0x04DA; +__MAC32H_H = 0x04DB; +__MAC32H = 0x04DA; +__MACS32L_L = 0x04DC; +__MACS32L_H = 0x04DD; +__MACS32L = 0x04DC; +__MACS32H_L = 0x04DE; +__MACS32H_H = 0x04DF; +__MACS32H = 0x04DE; +__OP2L_L = 0x04E0; +__OP2L_H = 0x04E1; +__OP2L = 0x04E0; +__OP2H_L = 0x04E2; +__OP2H_H = 0x04E3; +__OP2H = 0x04E2; +__RES0_L = 0x04E4; +__RES0_H = 0x04E5; +__RES0 = 0x04E4; +__RES1_L = 0x04E6; +__RES1_H = 0x04E7; +__RES1 = 0x04E6; +__RES2_L = 0x04E8; +__RES2_H = 0x04E9; +__RES2 = 0x04E8; +__RES3_L = 0x04EA; +__RES3_H = 0x04EB; +__RES3 = 0x04EA; +__MPY32CTL0_L = 0x04EC; +__MPY32CTL0_H = 0x04ED; +__MPY32CTL0 = 0x04EC; +__PAIN_L = 0x0200; +__PAIN_H = 0x0201; +__PAIN = 0x0200; +__PAOUT_L = 0x0202; +__PAOUT_H = 0x0203; +__PAOUT = 0x0202; +__PADIR_L = 0x0204; +__PADIR_H = 0x0205; +__PADIR = 0x0204; +__PAREN_L = 0x0206; +__PAREN_H = 0x0207; +__PAREN = 0x0206; +__PADS_L = 0x0208; +__PADS_H = 0x0209; +__PADS = 0x0208; +__PASEL_L = 0x020A; +__PASEL_H = 0x020B; +__PASEL = 0x020A; +__PAIES_L = 0x0218; +__PAIES_H = 0x0219; +__PAIES = 0x0218; +__PAIE_L = 0x021A; +__PAIE_H = 0x021B; +__PAIE = 0x021A; +__PAIFG_L = 0x021C; +__PAIFG_H = 0x021D; +__PAIFG = 0x021C; +__P1IV = 0x020E; +__P2IV = 0x021E; +__PBIN_L = 0x0220; +__PBIN_H = 0x0221; +__PBIN = 0x0220; +__PBOUT_L = 0x0222; +__PBOUT_H = 0x0223; +__PBOUT = 0x0222; +__PBDIR_L = 0x0224; +__PBDIR_H = 0x0225; +__PBDIR = 0x0224; +__PBREN_L = 0x0226; +__PBREN_H = 0x0227; +__PBREN = 0x0226; +__PBDS_L = 0x0228; +__PBDS_H = 0x0229; +__PBDS = 0x0228; +__PBSEL_L = 0x022A; +__PBSEL_H = 0x022B; +__PBSEL = 0x022A; +__PCIN_L = 0x0240; +__PCIN_H = 0x0241; +__PCIN = 0x0240; +__PCOUT_L = 0x0242; +__PCOUT_H = 0x0243; +__PCOUT = 0x0242; +__PCDIR_L = 0x0244; +__PCDIR_H = 0x0245; +__PCDIR = 0x0244; +__PCREN_L = 0x0246; +__PCREN_H = 0x0247; +__PCREN = 0x0246; +__PCDS_L = 0x0248; +__PCDS_H = 0x0249; +__PCDS = 0x0248; +__PCSEL_L = 0x024A; +__PCSEL_H = 0x024B; +__PCSEL = 0x024A; +__PDIN_L = 0x0260; +__PDIN_H = 0x0261; +__PDIN = 0x0260; +__PDOUT_L = 0x0262; +__PDOUT_H = 0x0263; +__PDOUT = 0x0262; +__PDDIR_L = 0x0264; +__PDDIR_H = 0x0265; +__PDDIR = 0x0264; +__PDREN_L = 0x0266; +__PDREN_H = 0x0267; +__PDREN = 0x0266; +__PDDS_L = 0x0268; +__PDDS_H = 0x0269; +__PDDS = 0x0268; +__PDSEL_L = 0x026A; +__PDSEL_H = 0x026B; +__PDSEL = 0x026A; +__PEIN_L = 0x0280; +__PEIN_H = 0x0281; +__PEIN = 0x0280; +__PEOUT_L = 0x0282; +__PEOUT_H = 0x0283; +__PEOUT = 0x0282; +__PEDIR_L = 0x0284; +__PEDIR_H = 0x0285; +__PEDIR = 0x0284; +__PEREN_L = 0x0286; +__PEREN_H = 0x0287; +__PEREN = 0x0286; +__PEDS_L = 0x0288; +__PEDS_H = 0x0289; +__PEDS = 0x0288; +__PESEL_L = 0x028A; +__PESEL_H = 0x028B; +__PESEL = 0x028A; +__PFIN_L = 0x02A0; +__PFIN_H = 0x02A1; +__PFIN = 0x02A0; +__PFOUT_L = 0x02A2; +__PFOUT_H = 0x02A3; +__PFOUT = 0x02A2; +__PFDIR_L = 0x02A4; +__PFDIR_H = 0x02A5; +__PFDIR = 0x02A4; +__PFREN_L = 0x02A6; +__PFREN_H = 0x02A7; +__PFREN = 0x02A6; +__PFDS_L = 0x02A8; +__PFDS_H = 0x02A9; +__PFDS = 0x02A8; +__PFSEL_L = 0x02AA; +__PFSEL_H = 0x02AB; +__PFSEL = 0x02AA; +__PJIN_L = 0x0320; +__PJIN_H = 0x0321; +__PJIN = 0x0320; +__PJOUT_L = 0x0322; +__PJOUT_H = 0x0323; +__PJOUT = 0x0322; +__PJDIR_L = 0x0324; +__PJDIR_H = 0x0325; +__PJDIR = 0x0324; +__PJREN_L = 0x0326; +__PJREN_H = 0x0327; +__PJREN = 0x0326; +__PJDS_L = 0x0328; +__PJDS_H = 0x0329; +__PJDS = 0x0328; +__PMMCTL0_L = 0x0120; +__PMMCTL0_H = 0x0121; +__PMMCTL0 = 0x0120; +__PMMCTL1_L = 0x0122; +__PMMCTL1_H = 0x0123; +__PMMCTL1 = 0x0122; +__SVSMHCTL_L = 0x0124; +__SVSMHCTL_H = 0x0125; +__SVSMHCTL = 0x0124; +__SVSMLCTL_L = 0x0126; +__SVSMLCTL_H = 0x0127; +__SVSMLCTL = 0x0126; +__SVSMIO_L = 0x0128; +__SVSMIO_H = 0x0129; +__SVSMIO = 0x0128; +__PMMIFG_L = 0x012C; +__PMMIFG_H = 0x012D; +__PMMIFG = 0x012C; +__PMMRIE_L = 0x012E; +__PMMRIE_H = 0x012F; +__PMMRIE = 0x012E; +__RCCTL0_L = 0x0158; +__RCCTL0_H = 0x0159; +__RCCTL0 = 0x0158; +__RTCCTL01_L = 0x04A0; +__RTCCTL01_H = 0x04A1; +__RTCCTL01 = 0x04A0; +__RTCCTL23_L = 0x04A2; +__RTCCTL23_H = 0x04A3; +__RTCCTL23 = 0x04A2; +__RTCPS0CTL_L = 0x04A8; +__RTCPS0CTL_H = 0x04A9; +__RTCPS0CTL = 0x04A8; +__RTCPS1CTL_L = 0x04AA; +__RTCPS1CTL_H = 0x04AB; +__RTCPS1CTL = 0x04AA; +__RTCPS_L = 0x04AC; +__RTCPS_H = 0x04AD; +__RTCPS = 0x04AC; +__RTCIV = 0x04AE; +__RTCTIM0_L = 0x04B0; +__RTCTIM0_H = 0x04B1; +__RTCTIM0 = 0x04B0; +__RTCTIM1_L = 0x04B2; +__RTCTIM1_H = 0x04B3; +__RTCTIM1 = 0x04B2; +__RTCDATE_L = 0x04B4; +__RTCDATE_H = 0x04B5; +__RTCDATE = 0x04B4; +__RTCYEAR_L = 0x04B6; +__RTCYEAR_H = 0x04B7; +__RTCYEAR = 0x04B6; +__RTCAMINHR_L = 0x04B8; +__RTCAMINHR_H = 0x04B9; +__RTCAMINHR = 0x04B8; +__RTCADOWDAY_L = 0x04BA; +__RTCADOWDAY_H = 0x04BB; +__RTCADOWDAY = 0x04BA; +__SFRIE1_L = 0x0100; +__SFRIE1_H = 0x0101; +__SFRIE1 = 0x0100; +__SFRIFG1_L = 0x0102; +__SFRIFG1_H = 0x0103; +__SFRIFG1 = 0x0102; +__SFRRPCR_L = 0x0104; +__SFRRPCR_H = 0x0105; +__SFRRPCR = 0x0104; +__SYSCTL_L = 0x0180; +__SYSCTL_H = 0x0181; +__SYSCTL = 0x0180; +__SYSBSLC_L = 0x0182; +__SYSBSLC_H = 0x0183; +__SYSBSLC = 0x0182; +__SYSJMBC_L = 0x0186; +__SYSJMBC_H = 0x0187; +__SYSJMBC = 0x0186; +__SYSJMBI0_L = 0x0188; +__SYSJMBI0_H = 0x0189; +__SYSJMBI0 = 0x0188; +__SYSJMBI1_L = 0x018A; +__SYSJMBI1_H = 0x018B; +__SYSJMBI1 = 0x018A; +__SYSJMBO0_L = 0x018C; +__SYSJMBO0_H = 0x018D; +__SYSJMBO0 = 0x018C; +__SYSJMBO1_L = 0x018E; +__SYSJMBO1_H = 0x018F; +__SYSJMBO1 = 0x018E; +__SYSUNIV_L = 0x019A; +__SYSUNIV_H = 0x019B; +__SYSUNIV = 0x019A; +__SYSSNIV_L = 0x019C; +__SYSSNIV_H = 0x019D; +__SYSSNIV = 0x019C; +__SYSRSTIV_L = 0x019E; +__SYSRSTIV_H = 0x019F; +__SYSRSTIV = 0x019E; +__TA0CTL = 0x0340; +__TA0CCTL0 = 0x0342; +__TA0CCTL1 = 0x0344; +__TA0CCTL2 = 0x0346; +__TA0CCTL3 = 0x0348; +__TA0CCTL4 = 0x034A; +__TA0R = 0x0350; +__TA0CCR0 = 0x0352; +__TA0CCR1 = 0x0354; +__TA0CCR2 = 0x0356; +__TA0CCR3 = 0x0358; +__TA0CCR4 = 0x035A; +__TA0IV = 0x036E; +__TA0EX0 = 0x0360; +__TA1CTL = 0x0380; +__TA1CCTL0 = 0x0382; +__TA1CCTL1 = 0x0384; +__TA1CCTL2 = 0x0386; +__TA1R = 0x0390; +__TA1CCR0 = 0x0392; +__TA1CCR1 = 0x0394; +__TA1CCR2 = 0x0396; +__TA1IV = 0x03AE; +__TA1EX0 = 0x03A0; +__TB0CTL = 0x03C0; +__TB0CCTL0 = 0x03C2; +__TB0CCTL1 = 0x03C4; +__TB0CCTL2 = 0x03C6; +__TB0CCTL3 = 0x03C8; +__TB0CCTL4 = 0x03CA; +__TB0CCTL5 = 0x03CC; +__TB0CCTL6 = 0x03CE; +__TB0R = 0x03D0; +__TB0CCR0 = 0x03D2; +__TB0CCR1 = 0x03D4; +__TB0CCR2 = 0x03D6; +__TB0CCR3 = 0x03D8; +__TB0CCR4 = 0x03DA; +__TB0CCR5 = 0x03DC; +__TB0CCR6 = 0x03DE; +__TB0EX0 = 0x03E0; +__TB0IV = 0x03EE; +__UCSCTL0_L = 0x0160; +__UCSCTL0_H = 0x0161; +__UCSCTL0 = 0x0160; +__UCSCTL1_L = 0x0162; +__UCSCTL1_H = 0x0163; +__UCSCTL1 = 0x0162; +__UCSCTL2_L = 0x0164; +__UCSCTL2_H = 0x0165; +__UCSCTL2 = 0x0164; +__UCSCTL3_L = 0x0166; +__UCSCTL3_H = 0x0167; +__UCSCTL3 = 0x0166; +__UCSCTL4_L = 0x0168; +__UCSCTL4_H = 0x0169; +__UCSCTL4 = 0x0168; +__UCSCTL5_L = 0x016A; +__UCSCTL5_H = 0x016B; +__UCSCTL5 = 0x016A; +__UCSCTL6_L = 0x016C; +__UCSCTL6_H = 0x016D; +__UCSCTL6 = 0x016C; +__UCSCTL7_L = 0x016E; +__UCSCTL7_H = 0x016F; +__UCSCTL7 = 0x016E; +__UCSCTL8_L = 0x0170; +__UCSCTL8_H = 0x0171; +__UCSCTL8 = 0x0170; +__UCA0CTLW0_L = 0x05C0; +__UCA0CTLW0_H = 0x05C1; +__UCA0CTLW0 = 0x05C0; +__UCA0BRW_L = 0x05C6; +__UCA0BRW_H = 0x05C7; +__UCA0BRW = 0x05C6; +__UCA0MCTL = 0x05C8; +__UCA0STAT = 0x05CA; +__UCA0RXBUF = 0x05CC; +__UCA0TXBUF = 0x05CE; +__UCA0ABCTL = 0x05D0; +__UCA0IRCTL_L = 0x05D2; +__UCA0IRCTL_H = 0x05D3; +__UCA0IRCTL = 0x05D2; +__UCA0ICTL_L = 0x05DC; +__UCA0ICTL_H = 0x05DD; +__UCA0ICTL = 0x05DC; +__UCA0IV = 0x05DE; +__UCB0CTLW0_L = 0x05E0; +__UCB0CTLW0_H = 0x05E1; +__UCB0CTLW0 = 0x05E0; +__UCB0BRW_L = 0x05E6; +__UCB0BRW_H = 0x05E7; +__UCB0BRW = 0x05E6; +__UCB0STAT = 0x05EA; +__UCB0RXBUF = 0x05EC; +__UCB0TXBUF = 0x05EE; +__UCB0I2COA_L = 0x05F0; +__UCB0I2COA_H = 0x05F1; +__UCB0I2COA = 0x05F0; +__UCB0I2CSA_L = 0x05F2; +__UCB0I2CSA_H = 0x05F3; +__UCB0I2CSA = 0x05F2; +__UCB0ICTL_L = 0x05FC; +__UCB0ICTL_H = 0x05FD; +__UCB0ICTL = 0x05FC; +__UCB0IV = 0x05FE; +__UCA1CTLW0_L = 0x0600; +__UCA1CTLW0_H = 0x0601; +__UCA1CTLW0 = 0x0600; +__UCA1BRW_L = 0x0606; +__UCA1BRW_H = 0x0607; +__UCA1BRW = 0x0606; +__UCA1MCTL = 0x0608; +__UCA1STAT = 0x060A; +__UCA1RXBUF = 0x060C; +__UCA1TXBUF = 0x060E; +__UCA1ABCTL = 0x0610; +__UCA1IRCTL_L = 0x0612; +__UCA1IRCTL_H = 0x0613; +__UCA1IRCTL = 0x0612; +__UCA1ICTL_L = 0x061C; +__UCA1ICTL_H = 0x061D; +__UCA1ICTL = 0x061C; +__UCA1IV = 0x061E; +__UCB1CTLW0_L = 0x0620; +__UCB1CTLW0_H = 0x0621; +__UCB1CTLW0 = 0x0620; +__UCB1BRW_L = 0x0626; +__UCB1BRW_H = 0x0627; +__UCB1BRW = 0x0626; +__UCB1STAT = 0x062A; +__UCB1RXBUF = 0x062C; +__UCB1TXBUF = 0x062E; +__UCB1I2COA_L = 0x0630; +__UCB1I2COA_H = 0x0631; +__UCB1I2COA = 0x0630; +__UCB1I2CSA_L = 0x0632; +__UCB1I2CSA_H = 0x0633; +__UCB1I2CSA = 0x0632; +__UCB1ICTL_L = 0x063C; +__UCB1ICTL_H = 0x063D; +__UCB1ICTL = 0x063C; +__UCB1IV = 0x063E; +__WDTCTL_L = 0x015C; +__WDTCTL_H = 0x015D; +__WDTCTL = 0x015C; diff --git a/demos/MSP430-MSP430F5437/readme.txt b/demos/MSP430-MSP430F5437/readme.txt new file mode 100644 index 000000000..164002431 --- /dev/null +++ b/demos/MSP430-MSP430F5437/readme.txt @@ -0,0 +1,29 @@ +***************************************************************************** +** ChibiOS/RT port for Texas Instruments MSP430X. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an customized MSP430-F5437 board with a 32768kHz XTAL1 +installed. DCOCLK (=MCLK, =SMCLK) is set up to 20Mhz. From mcuconf.h: +#define MSP430_USE_CLOCK MSP430_CLOCK_SOURCE_DCOCLK + +UART0 (38400/8N1) ist used for printing some board information. + +** The Demo ** + +The demo runs first some tests, just to check port correctness. Meanwhile, +green led light. After that the board red and green leds will flash in the +cycle of ~0.5 and ~1.5 seconds respectively. + +** Build Procedure ** + +The demo was built using the +a) IAR for MSP430 5.10.1 (5.10.1.50144) toolchain; +b) GCC version 4.6.3 20120301 (mspgcc LTS 20120406 unpatched). + +*** Notes *** + +On porting to an another MSP430X-MCU remember to check your linker settings +for __heap_base__ and __heap_end__ symbols (or redefine these in +asmdefines.s43). -- cgit v1.2.3