From 6db6291bd2b1fb83ecfadeaf32750f1d6f8404b2 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sat, 6 Oct 2018 10:27:12 +0000 Subject: Generator for STM32F72x/73x of mcuconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12337 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- demos/STM32/RT-STM32F722ZE-NUCLEO144/mcuconf.h | 41 +++++++------------------- 1 file changed, 11 insertions(+), 30 deletions(-) (limited to 'demos/STM32') diff --git a/demos/STM32/RT-STM32F722ZE-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32F722ZE-NUCLEO144/mcuconf.h index 339be343e..74b252f7a 100644 --- a/demos/STM32/RT-STM32F722ZE-NUCLEO144/mcuconf.h +++ b/demos/STM32/RT-STM32F722ZE-NUCLEO144/mcuconf.h @@ -32,6 +32,10 @@ */ #define STM32F7xx_MCUCONF +#define STM32F722_MCUCONF +#define STM32F732_MCUCONF +#define STM32F723_MCUCONF +#define STM32F733_MCUCONF /* * HAL driver system settings. @@ -86,11 +90,10 @@ #define STM32_I2C1SEL STM32_I2C1SEL_PCLK1 #define STM32_I2C2SEL STM32_I2C2SEL_PCLK1 #define STM32_I2C3SEL STM32_I2C3SEL_PCLK1 -#define STM32_I2C4SEL STM32_I2C4SEL_PCLK1 #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 -#define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL #define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK +#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE /* @@ -133,11 +136,7 @@ * CAN driver system settings. */ #define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_USE_CAN2 FALSE -#define STM32_CAN_USE_CAN3 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 -#define STM32_CAN_CAN2_IRQ_PRIORITY 11 -#define STM32_CAN_CAN3_IRQ_PRIORITY 11 /* * DAC driver system settings. @@ -186,7 +185,6 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_USE_I2C4 FALSE #define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) @@ -194,16 +192,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C4_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 #define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C4_DMA_PRIORITY 3 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* @@ -224,17 +218,6 @@ #define STM32_ICU_TIM8_IRQ_PRIORITY 7 #define STM32_ICU_TIM9_IRQ_PRIORITY 7 -/* - * MAC driver system settings. - */ -#define STM32_MAC_TRANSMIT_BUFFERS 2 -#define STM32_MAC_RECEIVE_BUFFERS 4 -#define STM32_MAC_BUFFERS_SIZE 1522 -#define STM32_MAC_PHY_TIMEOUT 100 -#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE -#define STM32_MAC_ETH1_IRQ_PRIORITY 13 -#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 - /* * PWM driver system settings. */ @@ -258,13 +241,17 @@ * SDC driver system settings. */ #define STM32_SDC_USE_SDMMC1 FALSE +#define STM32_SDC_USE_SDMMC2 FALSE #define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE #define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000 #define STM32_SDC_SDMMC_READ_TIMEOUT 1000 #define STM32_SDC_SDMMC_CLOCK_DELAY 10 #define STM32_SDC_SDMMC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SDC_SDMMC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SDC_SDMMC1_DMA_PRIORITY 3 +#define STM32_SDC_SDMMC2_DMA_PRIORITY 3 #define STM32_SDC_SDMMC1_IRQ_PRIORITY 9 +#define STM32_SDC_SDMMC2_IRQ_PRIORITY 9 /* * SERIAL driver system settings. @@ -294,7 +281,6 @@ #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_USE_SPI4 FALSE #define STM32_SPI_USE_SPI5 FALSE -#define STM32_SPI_USE_SPI6 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -305,20 +291,16 @@ #define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) -#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI4_DMA_PRIORITY 1 #define STM32_SPI_SPI5_DMA_PRIORITY 1 -#define STM32_SPI_SPI6_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_SPI4_IRQ_PRIORITY 10 #define STM32_SPI_SPI5_IRQ_PRIORITY 10 -#define STM32_SPI_SPI6_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* @@ -360,6 +342,8 @@ #define STM32_UART_UART4_IRQ_PRIORITY 12 #define STM32_UART_UART5_IRQ_PRIORITY 12 #define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_UART7_IRQ_PRIORITY 12 +#define STM32_UART_UART8_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 @@ -379,9 +363,6 @@ #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 #define STM32_USB_OTG2_RX_FIFO_SIZE 1024 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 /* * WDG driver system settings. -- cgit v1.2.3