From 1f207578bdba8cd4358ec3e1e3b8e6a68730f18c Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 20 Dec 2017 14:19:59 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11152 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/STM32/RT-STM32H743I-NUCLEO144/mcuconf.h | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) (limited to 'demos/STM32/RT-STM32H743I-NUCLEO144') diff --git a/demos/STM32/RT-STM32H743I-NUCLEO144/mcuconf.h b/demos/STM32/RT-STM32H743I-NUCLEO144/mcuconf.h index 771168c40..984569aeb 100644 --- a/demos/STM32/RT-STM32H743I-NUCLEO144/mcuconf.h +++ b/demos/STM32/RT-STM32H743I-NUCLEO144/mcuconf.h @@ -31,17 +31,32 @@ * 0...3 Lowest...Highest. */ -#define STM32F7xx_MCUCONF +#define STM32H7xx_MCUCONF /* - * HAL driver system settings. + * General settins. */ #define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE +#define STM32_HCLK_ENFORCED_VALUE STM32_HSICLK + +/* + * PWR system settings. + * Constants are taken from the ST header, reading manual is required. + */ +#define STM32_PWR_CR1 (PWR_CR1_SVOS_1 | PWR_CR1_SVOS_0) +#define STM32_PWR_CR2 (PWR_CR2_BREN) +#define STM32_PWR_CR3 (PWR_CR3_SCUEN | PWR_CR3_LDOEN) +#define STM32_PWR_CPUCR 0 +#define STM32_PWR_D3CR (PWR_D3CR_VOS_0) + +/* + * Clock tree settings. + * Constants are taken from the ST header, reading manual is required. + */ #define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE +#define STM32_LSI_ENABLED TRUE +#define STM32_CSI_ENABLED TRUE +#define STM32_HSI48_ENABLED TRUE #define STM32_HSE_ENABLED TRUE #define STM32_LSE_ENABLED TRUE #define STM32_CLOCK48_REQUIRED TRUE -- cgit v1.2.3