From e8cd09482172ce6ef2bc4e56f6258f3747ad06cc Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 22 Oct 2015 13:07:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8378 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h | 4 +- ...32F091RC-NUCLEO (OpenOCD, Flash and Run).launch | 6 +-- demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h | 51 +++++++++++++++++++++- 3 files changed, 55 insertions(+), 6 deletions(-) (limited to 'demos/STM32/RT-STM32F091RC-NUCLEO') diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h b/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h index 3efdfc677..b92ecea4b 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h @@ -39,14 +39,14 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ -#define CH_CFG_ST_RESOLUTION 16 +#define CH_CFG_ST_RESOLUTION 32 /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ -#define CH_CFG_ST_FREQUENCY 1000 +#define CH_CFG_ST_FREQUENCY 10000 /** * @brief Time delta constant for the tick-less mode. diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch b/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch index 0a8beb859..42557a089 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch @@ -1,6 +1,6 @@ - + @@ -37,11 +37,11 @@ - + - + diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h index 73a87484f..f81a23857 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h @@ -41,6 +41,7 @@ #define STM32_PLS STM32_PLS_LEV0 #define STM32_HSI_ENABLED TRUE #define STM32_HSI14_ENABLED TRUE +#define STM32_HSI48_ENABLED FALSE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE @@ -78,9 +79,11 @@ * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 #define STM32_GPT_TIM14_IRQ_PRIORITY 2 @@ -105,8 +108,10 @@ * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* @@ -114,8 +119,10 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 #define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* @@ -123,8 +130,20 @@ */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USE_UART7 FALSE +#define STM32_SERIAL_USE_UART8 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 +#define STM32_SERIAL_USART3_PRIORITY 3 +#define STM32_SERIAL_UART4_PRIORITY 3 +#define STM32_SERIAL_UART5_PRIORITY 3 +#define STM32_SERIAL_USART6_PRIORITY 3 +#define STM32_SERIAL_UART7_PRIORITY 3 +#define STM32_SERIAL_UART8_PRIORITY 3 /* * SPI driver system settings. @@ -145,21 +164,51 @@ * ST driver system settings. */ #define STM32_ST_IRQ_PRIORITY 2 -#define STM32_ST_USE_TIMER 3 +#define STM32_ST_USE_TIMER 2 /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USE_UART7 FALSE +#define STM32_UART_USE_UART8 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART3_IRQ_PRIORITY 3 +#define STM32_UART_UART4_IRQ_PRIORITY 3 +#define STM32_UART_UART5_IRQ_PRIORITY 3 +#define STM32_UART_USART6_IRQ_PRIORITY 3 +#define STM32_UART_UART7_IRQ_PRIORITY 3 +#define STM32_UART_UART8_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_UART7_DMA_PRIORITY 0 +#define STM32_UART_UART8_DMA_PRIORITY 0 #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART7_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") #endif /* _MCUCONF_H_ */ -- cgit v1.2.3