From 9ff0ca5826c624542a767045c149b5b9bd2e42e7 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Sun, 2 Dec 2018 08:41:28 +0000 Subject: mcuconf.h files mass update. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12454 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- .../NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h | 59 ++++++++++++++-------- 1 file changed, 37 insertions(+), 22 deletions(-) (limited to 'demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY') diff --git a/demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h b/demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h index 5ecb499dd..b4f3922fd 100644 --- a/demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h +++ b/demos/STM32/NASA-OSAL-STM32F746G-DISCOVERY/cfg/mcuconf.h @@ -33,6 +33,7 @@ #define STM32F7xx_MCUCONF #define STM32F746_MCUCONF +#define STM32F756_MCUCONF /* * HAL driver system settings. @@ -66,6 +67,7 @@ #define STM32_PLLI2SP_VALUE 4 #define STM32_PLLI2SQ_VALUE 4 #define STM32_PLLI2SR_VALUE 4 +#define STM32_PLLI2SDIVQ_VALUE 2 #define STM32_PLLSAIN_VALUE 192 #define STM32_PLLSAIP_VALUE 4 #define STM32_PLLSAIQ_VALUE 4 @@ -90,9 +92,27 @@ #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_CECSEL STM32_CECSEL_LSE #define STM32_CK48MSEL STM32_CK48MSEL_PLL -#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK +#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK #define STM32_SRAM2_NOCACHE FALSE +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 + /* * ADC driver system settings. */ @@ -134,24 +154,6 @@ #define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 - /* * GPT driver system settings. */ @@ -254,6 +256,14 @@ #define STM32_PWM_TIM8_IRQ_PRIORITY 7 #define STM32_PWM_TIM9_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + /* * SDC driver system settings. */ @@ -360,6 +370,8 @@ #define STM32_UART_UART4_IRQ_PRIORITY 12 #define STM32_UART_UART5_IRQ_PRIORITY 12 #define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_UART7_IRQ_PRIORITY 12 +#define STM32_UART_UART8_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 @@ -379,13 +391,16 @@ #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 #define STM32_USB_OTG2_RX_FIFO_SIZE 1024 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 /* * WDG driver system settings. */ #define STM32_WDG_USE_IWDG FALSE +/* + * WSPI driver system settings. + */ +#define STM32_WSPI_USE_QUADSPI1 FALSE +#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) + #endif /* MCUCONF_H */ -- cgit v1.2.3