From dd8d02ae8e27372ddb3d35a207b5a58fb9b83577 Mon Sep 17 00:00:00 2001 From: utzig Date: Tue, 19 Aug 2014 12:02:36 +0000 Subject: [KINETIS] Config option for FEI mode + PEE config moved git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7179 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'demos/KINETIS') diff --git a/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h b/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h index b9870b60f..a39e553f4 100644 --- a/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h +++ b/demos/KINETIS/RT-FREEDOM-K20D50M/mcuconf.h @@ -22,10 +22,22 @@ /* Select the MCU clocking mode below by enabling the appropriate block. */ -/* FEI mode */ +/* Disable all clock intialization */ +#define KINETIS_NO_INIT FALSE + +/* PEE mode - external 8 MHz crystal with PLL for 48 MHz core/system clock. */ +#if 1 +#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE +#define KINETIS_XTAL_FREQUENCY 8000000UL +#define KINETIS_SYSCLK_FREQUENCY 48000000UL +#endif + +/* FEI mode - 48 MHz with internal 32.768 kHz crystal */ #if 0 #define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI -#define KINETIS_SYSCLK_FREQUENCY 21000000UL +#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */ +#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */ +#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */ #endif /* 0 */ /* FEE mode - 24 MHz with external 32.768 kHz crystal */ -- cgit v1.2.3