From d82f92151f7d0fbc6b34aad78e0e02da0a619057 Mon Sep 17 00:00:00 2001 From: areviu Date: Mon, 19 Mar 2018 19:40:09 +0000 Subject: update hal crypto sha lld, added integration with wolfcrypt git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11824 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- .../.cproject | 53 ++ .../RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project | 96 ++++ .../RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile | 249 +++++++++ .../cfg/chconf.h | 615 +++++++++++++++++++++ .../cfg/chibioshal.h | 11 + .../cfg/halconf.h | 437 +++++++++++++++ .../cfg/lwip.mk | 20 + .../cfg/mcuconf.h | 144 +++++ .../cfg/user_settings.h | 104 ++++ .../cfg/wolfssl.mk | 96 ++++ .../RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c | 85 +++ .../readme.txt | 39 ++ .../web/cert.c | 83 +++ .../web/web.c | 217 ++++++++ .../web/web.h | 55 ++ .../wolfssl_chibios.c | 116 ++++ .../wolfssl_chibios.h | 57 ++ 17 files changed, 2477 insertions(+) create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c create mode 100644 demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h (limited to 'demos/ATSAMA5D2') diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject new file mode 100644 index 000000000..7b9aba018 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.cproject @@ -0,0 +1,53 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project new file mode 100644 index 000000000..3292de249 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/.project @@ -0,0 +1,96 @@ + + + RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + org.eclipse.cdt.core.ccnature + + + + board + 2 + CHIBIOS/os/hal/boards/ATSAMA5D2_XULT + + + os + 2 + CHIBIOS/os + + + wolfssl + 2 + CHIBIOS/ext/wolfssl + + + diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile new file mode 100644 index 000000000..b4602a9f1 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/Makefile @@ -0,0 +1,249 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = -DWOLFSSL_USER_SETTINGS +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO) +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = no +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the ARM System/User stack. This +# stack is the stack used by the main() thread. +ifeq ($(USE_SYSTEM_STACKSIZE),) + USE_SYSTEM_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the ARM IRQ stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_IRQ_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the ARM FIQ stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_FIQ_STACKSIZE),) + USE_FIQ_STACKSIZE = 64 +endif + +# Stack size to the allocated to the ARM Supervisor stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_SUPERVISOR_STACKSIZE),) + USE_SUPERVISOR_STACKSIZE = 8 +endif + +# Stack size to the allocated to the ARM Undefined stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_UND_STACKSIZE),) + USE_UND_STACKSIZE = 8 +endif + +# Stack size to the allocated to the ARM Abort stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_ABT_STACKSIZE),) + USE_ABT_STACKSIZE = 8 +endif + +# Enables the use of FPU. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch +CONFDIR := ./cfg + +# Imported source files and paths +CHIBIOS = ../../.. +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/SAMA/SAMA5D2x/platform.mk +include $(CHIBIOS)/os/hal/boards/ATSAMA5D2_XULT/board.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk +# Other files (optional). +include $(CHIBIOS)/os/hal/lib/streams/streams.mk + +include cfg/wolfssl.mk + +# Define linker script file here +#LDSCRIPT= $(STARTUPLD)/SAMA5D2.ld +LDSCRIPT= $(STARTUPLD)/SAMA5D2ddr.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(LWSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + wolfssl_chibios.c main.c $(WOLFSSL)/wolfcrypt/src/testwolf.c + +CSRC += $(CHIBIOS)/os/various/syscalls.c +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(ALLASMSRC) +ASMXSRC = $(ALLXASMSRC) + +INCDIR = $(ALLINC) \ + $(LWINC) $(STREAMSINC) \ + $(CHIBIOS)/os/various $(WOLFINC) $(CONFDIR) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-a5 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar +OD = $(TRGT)objdump +SZ = $(TRGT)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra -Wundef + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -DPLATFORM_CRY_USE_CRY1=1 -DSAMA_DMA_REQUIRED + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC +include $(RULESPATH)/rules.mk + +############################################################################## +# MISRA check rule, requires PCLint and the setup files, not provided. +# +misra: + @lint-nt -v -w3 $(DEFS) pclint/co-gcc.lnt pclint/au-misra3.lnt pclint/waivers.lnt $(IINCDIR) $(CSRC) &> misra.txt diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h new file mode 100644 index 000000000..8093b6f33 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chconf.h @@ -0,0 +1,615 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_RT_CONF_ +#define _CHIBIOS_RT_CONF_VER_5_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 32 + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#define CH_CFG_ST_FREQUENCY 1000 + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +#define CH_CFG_INTERVALS_SIZE 32 + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_TIME_TYPES_SIZE 32 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 0 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +#define CH_CFG_TIME_QUANTUM 0 + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +#define CH_CFG_NO_IDLE_THREAD FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#define CH_CFG_OPTIMIZE_SPEED TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_TM FALSE + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_REGISTRY TRUE + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_WAITEXIT TRUE + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MUTEXES TRUE + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_CONDVARS TRUE + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MESSAGES TRUE + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_OBJ_FIFOS TRUE + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +#define CH_CFG_USE_DYNAMIC TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_FACTORY TRUE + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 + +/** + * @brief Enables the registry of generic objects. + */ +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE + +/** + * @brief Enables factory for generic buffers. + */ +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE + +/** + * @brief Enables factory for semaphores. + */ +#define CH_CFG_FACTORY_SEMAPHORES TRUE + +/** + * @brief Enables factory for mailboxes. + */ +#define CH_CFG_FACTORY_MAILBOXES TRUE + +/** + * @brief Enables factory for objects FIFOs. + */ +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK TRUE + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS TRUE + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS TRUE + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +#define CH_DBG_TRACE_BUFFER_SIZE 128 + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#define CH_DBG_ENABLE_STACK_CHECK FALSE + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_FILL_THREADS FALSE + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +#define CH_DBG_THREADS_PROFILING FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +#define CH_CFG_SYSTEM_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXTRA_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief ISR enter hook. + */ +#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ + /* IRQ prologue code here.*/ \ +} + +/** + * @brief ISR exit hook. + */ +#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ + /* IRQ epilogue code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ + /* Idle-enter code here.*/ \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ + /* Idle-leave code here.*/ \ +} + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#define CH_CFG_IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ + /* System tick event code here.*/ \ +} + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ + /* System halt code here.*/ \ +} + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +#define CH_CFG_TRACE_HOOK(tep) { \ + /* Trace code here.*/ \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +/** + * @brief Trust zone configuration. + * @details If enabled the kernel is configured for the secure world + * and can access specific devices. + */ +#define CH_CFG_SEC_WORLD TRUE + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h new file mode 100644 index 000000000..6ef23e9dc --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/chibioshal.h @@ -0,0 +1,11 @@ +#ifndef CFG_CHIBIOSHAL_H_ +#define CFG_CHIBIOSHAL_H_ + + +#if HAL_USE_CRY == TRUE +#define _SAMA5D2_AES_COMPONENT_ +#include "hal.h" +#endif + + +#endif /* CFG_CHIBIOSHAL_H_ */ diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h new file mode 100644 index 000000000..c9e38322e --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/halconf.h @@ -0,0 +1,437 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY TRUE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC TRUE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk new file mode 100644 index 000000000..18ad2ead1 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/lwip.mk @@ -0,0 +1,20 @@ +# List of the required lwIP files. +LWIPDIR = $(CHIBIOS)/ext/lwip/src + +# The various blocks of files are outlined in Filelists.mk. +include $(LWIPDIR)/Filelists.mk + +LWBINDSRC = \ + $(CHIBIOS)/os/various/lwip_bindings/arch/sys_arch.c + + +# Add blocks of files from Filelists.mk as required for enabled options +LWSRC = $(COREFILES) $(CORE4FILES) $(APIFILES) $(LWBINDSRC) $(NETIFFILES) $(HTTPDFILES) + +LWINC = \ + $(CHIBIOS)/os/various/lwip_bindings \ + $(LWIPDIR)/include + +# Shared variables +ALLCSRC += $(LWIPSRC) +ALLINC += $(LWIPINC) diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h new file mode 100644 index 000000000..2faf9952f --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/mcuconf.h @@ -0,0 +1,144 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +#define SAMA5D2x_MCUCONF + +/* + * HAL driver system settings. + */ +#define SAMA_HAL_IS_SECURE TRUE +#define SAMA_NO_INIT TRUE +#define SAMA_MOSCRC_ENABLED FALSE +#define SAMA_MOSCXT_ENABLED TRUE +#define SAMA_MOSC_SEL SAMA_MOSC_MOSCXT +#define SAMA_OSC_SEL SAMA_OSC_OSCXT +#define SAMA_MCK_SEL SAMA_MCK_PLLA_CLK +#define SAMA_MCK_PRES_VALUE 1 +#define SAMA_MCK_MDIV_VALUE 3 +#define SAMA_PLLA_MUL_VALUE 83 +#define SAMA_PLLADIV2_EN TRUE +#define SAMA_H64MX_H32MX_RATIO 2 + +/* + * SPI driver system settings. + */ +#define SAMA_SPI_USE_SPI0 FALSE +#define SAMA_SPI_USE_SPI1 FALSE +#define SAMA_SPI_USE_FLEXCOM0 FALSE +#define SAMA_SPI_USE_FLEXCOM1 FALSE +#define SAMA_SPI_USE_FLEXCOM2 FALSE +#define SAMA_SPI_USE_FLEXCOM3 FALSE +#define SAMA_SPI_USE_FLEXCOM4 FALSE +#define SAMA_SPI_SPI0_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_SPI1_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM0_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM1_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM2_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM3_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_FLEXCOM4_DMA_IRQ_PRIORITY 4 +#define SAMA_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") +#define SPI_SELECT_MODE SPI_SELECT_MODE_NONE + +/* + * SECUMOD driver system settings. + */ +#define HAL_USE_SECUMOD FALSE + +/* + * SDMMC driver system settings. + */ +#define HAL_USE_SDMMC FALSE + +/* + * SERIAL driver system settings. + */ +#define SAMA_SERIAL_USE_UART0 FALSE +#define SAMA_SERIAL_USE_UART1 TRUE +#define SAMA_SERIAL_USE_UART2 FALSE +#define SAMA_SERIAL_USE_UART3 FALSE +#define SAMA_SERIAL_USE_UART4 FALSE +#define SAMA_SERIAL_USE_UART5 FALSE +#define SAMA_SERIAL_USE_FLEXCOM0 FALSE +#define SAMA_SERIAL_USE_FLEXCOM1 FALSE +#define SAMA_SERIAL_USE_FLEXCOM2 FALSE +#define SAMA_SERIAL_USE_FLEXCOM3 FALSE +#define SAMA_SERIAL_USE_FLEXCOM4 FALSE +#define SAMA_SERIAL_UART0_IRQ_PRIORITY 4 +#define SAMA_SERIAL_UART1_IRQ_PRIORITY 4 +#define SAMA_SERIAL_UART2_IRQ_PRIORITY 4 +#define SAMA_SERIAL_UART3_IRQ_PRIORITY 4 +#define SAMA_SERIAL_UART4_IRQ_PRIORITY 4 +#define SAMA_SERIAL_FLEXCOM0_IRQ_PRIORITY 4 +#define SAMA_SERIAL_FLEXCOM1_IRQ_PRIORITY 4 +#define SAMA_SERIAL_FLEXCOM2_IRQ_PRIORITY 4 +#define SAMA_SERIAL_FLEXCOM3_IRQ_PRIORITY 4 +#define SAMA_SERIAL_FLEXCOM4_IRQ_PRIORITY 4 + +/* + * ST driver settings. + */ +#define SAMA_ST_USE_PIT FALSE +#define SAMA_ST_USE_TC0 FALSE +#define SAMA_ST_USE_TC1 TRUE + +/* + * TC driver system settings. + */ +#define HAL_USE_TC FALSE +#define SAMA_USE_TC0 FALSE +#define SAMA_USE_TC1 FALSE +#define SAMA_TC0_IRQ_PRIORITY 2 +#define SAMA_TC1_IRQ_PRIORITY 2 + +/* + * UART driver system settings. + */ +#define SAMA_UART_USE_UART0 FALSE +#define SAMA_UART_USE_UART1 FALSE +#define SAMA_UART_USE_UART2 FALSE +#define SAMA_UART_USE_UART3 FALSE +#define SAMA_UART_USE_UART4 FALSE +#define SAMA_UART_USE_FLEXCOM0 FALSE +#define SAMA_UART_USE_FLEXCOM1 FALSE +#define SAMA_UART_USE_FLEXCOM2 FALSE +#define SAMA_UART_USE_FLEXCOM3 FALSE +#define SAMA_UART_USE_FLEXCOM4 FALSE +#define SAMA_UART_UART0_IRQ_PRIORITY 4 +#define SAMA_UART_UART1_IRQ_PRIORITY 4 +#define SAMA_UART_UART2_IRQ_PRIORITY 4 +#define SAMA_UART_UART3_IRQ_PRIORITY 4 +#define SAMA_UART_UART4_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM0_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM1_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM2_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM3_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM4_IRQ_PRIORITY 4 +#define SAMA_UART_UART0_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_UART1_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_UART2_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_UART3_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_UART4_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM0_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM1_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM2_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM3_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_FLEXCOM4_DMA_IRQ_PRIORITY 4 +#define SAMA_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +#endif /* MCUCONF_H */ diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h new file mode 100644 index 000000000..8a00e7a97 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/user_settings.h @@ -0,0 +1,104 @@ +#include "chtypes.h" +#include "halconf.h" +/* Configuration */ + +#define CRY_DRV CRYD1 +#define CRYD_KEY 0 +#define HAL_CRY_WOLF_SHABUFF_SIZE 2*128 + + +#define WOLFSSL_GENERAL_ALIGNMENT 4 +#define HAVE_TM_TYPE + +/* ChibiOS + Lwip */ +#define HAVE_LWIP_NATIVE +#define WOLFSSL_CHIBIOS + +#define USER_TICKS +#define WOLFSSL_USER_CURRTIME +#define XMALLOC_OVERRIDE +#define USE_WOLF_TIME_T +#define XTIME(tl) (LowResTimer()) + +//#define WOLFCRYPT_ONLY + +/* ARM */ + +#define RSA_LOW_MEM +#define NO_OLD_RNGNAME +#define NO_OLD_WC_NAMES +#define SMALL_SESSION_CACHE +#define WOLFSSL_SMALL_STACK + +#define TFM_ARM +#define SINGLE_THREADED +#define NO_SIG_WRAPPER + +/* Cipher features */ +#define HAVE_AES_ECB +#define WOLFSSL_AES_DIRECT +#define HAVE_AES_DECRYPT +#define WOLFSSL_SHA512 + +//#define USE_FAST_MATH +//#define ALT_ECC_SIZE + +//#define HAVE_FFDHE_2048 +//#define HAVE_CHACHA +//#define HAVE_POLY1305 +//#define HAVE_ECC +//#define HAVE_CURVE25519 +//#define CURVED25519_SMALL +//#define HAVE_ONE_TIME_AUTH +//#define WOLFSSL_DH_CONST + +/* HW RNG support */ + +//unsigned int chibios_rand_generate(void); +//int custom_rand_generate_block(unsigned char* output, unsigned int sz); + +//#define CUSTOM_RAND_GENERATE chibios_rand_generate +//#define CUSTOM_RAND_TYPE uint32_t + +//#define HAVE_ED25519 +//#define HAVE_POLY1305 +#define HAVE_SHA512 +#define WOLFSSL_SHA512 + +/* Size/speed config */ +//#define USE_SLOW_SHA2 + +/* Robustness */ +#define TFM_TIMING_RESISTANT +#define ECC_TIMING_RESISTANT +#define WC_RSA_BLINDING + +/* Remove Features */ +#define NO_WRITEV +//#define NO_DEV_RANDOM +#define NO_FILESYSTEM +#define NO_MAIN_DRIVER +#define NO_MD4 +#define NO_RABBIT +#define NO_HC128 +#define NO_DSA +#define NO_PWDBASED +#define NO_PSK +#define NO_64BIT +#define NO_DH +#define NO_RC4 +#define NO_HMAC +//test purpose +#define NO_RSA +#define NO_CODING +#define NO_ASN +#define NO_MD5 +#define NO_MD4 +#define NO_OLD_TLS +#define NO_CERTS +#define WOLFSSL_DH_CONST + +/* Realloc (to use without USE_FAST_MATH) */ + +void *chHeapRealloc (void *addr, uint32_t size); +#define XREALLOC(p,n,h,t) chHeapRealloc( (p) , (n) ) diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk new file mode 100644 index 000000000..c18944845 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/cfg/wolfssl.mk @@ -0,0 +1,96 @@ +# List of the required lwIP files. +WOLFSSL = $(CHIBIOS)/ext/wolfssl + +WOLFBINDSRC = \ + +WOLFCRYPTSRC = \ + $(WOLFSSL)/wolfcrypt/src/sha.c \ + $(WOLFSSL)/wolfcrypt/src/ge_low_mem.c \ + $(WOLFSSL)/wolfcrypt/src/compress.c \ + $(WOLFSSL)/wolfcrypt/src/chacha20_poly1305.c \ + $(WOLFSSL)/wolfcrypt/src/des3.c \ + $(WOLFSSL)/wolfcrypt/src/fe_low_mem.c \ + $(WOLFSSL)/wolfcrypt/src/hmac.c \ + $(WOLFSSL)/wolfcrypt/src/asm.c \ + $(WOLFSSL)/wolfcrypt/src/camellia.c \ + $(WOLFSSL)/wolfcrypt/src/ecc.c \ + $(WOLFSSL)/wolfcrypt/src/ecc_fp.c \ + $(WOLFSSL)/wolfcrypt/src/ripemd.c \ + $(WOLFSSL)/wolfcrypt/src/rsa.c \ + $(WOLFSSL)/wolfcrypt/src/wc_port.c \ + $(WOLFSSL)/wolfcrypt/src/arc4.c \ + $(WOLFSSL)/wolfcrypt/src/srp.c \ + $(WOLFSSL)/wolfcrypt/src/random.c \ + $(WOLFSSL)/wolfcrypt/src/idea.c \ + $(WOLFSSL)/wolfcrypt/src/blake2b.c \ + $(WOLFSSL)/wolfcrypt/src/error.c \ + $(WOLFSSL)/wolfcrypt/src/dh.c \ + $(WOLFSSL)/wolfcrypt/src/asn.c \ + $(WOLFSSL)/wolfcrypt/src/cmac.c \ + $(WOLFSSL)/wolfcrypt/src/signature.c \ + $(WOLFSSL)/wolfcrypt/src/pwdbased.c \ + $(WOLFSSL)/wolfcrypt/src/chacha.c \ + $(WOLFSSL)/wolfcrypt/src/md5.c \ + $(WOLFSSL)/wolfcrypt/src/aes.c \ + $(WOLFSSL)/wolfcrypt/src/wolfmath.c \ + $(WOLFSSL)/wolfcrypt/src/memory.c \ + $(WOLFSSL)/wolfcrypt/src/logging.c \ + $(WOLFSSL)/wolfcrypt/src/tfm.c \ + $(WOLFSSL)/wolfcrypt/src/coding.c \ + $(WOLFSSL)/wolfcrypt/src/rabbit.c \ + $(WOLFSSL)/wolfcrypt/src/pkcs12.c \ + $(WOLFSSL)/wolfcrypt/src/md2.c \ + $(WOLFSSL)/wolfcrypt/src/ge_operations.c \ + $(WOLFSSL)/wolfcrypt/src/sha512.c \ + $(WOLFSSL)/wolfcrypt/src/sha3.c \ + $(WOLFSSL)/wolfcrypt/src/port/nrf51.c \ + $(WOLFSSL)/wolfcrypt/src/port/pic32/pic32mz-crypt.c \ + $(WOLFSSL)/wolfcrypt/src/port/atmel/atmel.c \ + $(WOLFSSL)/wolfcrypt/src/port/nxp/ksdk_port.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-des3.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-ccm.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-hash.c \ + $(WOLFSSL)/wolfcrypt/src/port/ti/ti-aes.c \ + $(WOLFSSL)/wolfcrypt/src/port/arm/armv8-aes.c \ + $(WOLFSSL)/wolfcrypt/src/port/arm/armv8-sha256.c \ + $(WOLFSSL)/wolfcrypt/src/port/xilinx/xil-aesgcm.c \ + $(WOLFSSL)/wolfcrypt/src/port/xilinx/xil-sha3.c \ + $(WOLFSSL)/wolfcrypt/src/hash.c \ + $(WOLFSSL)/wolfcrypt/src/curve25519.c \ + $(WOLFSSL)/wolfcrypt/src/integer.c \ + $(WOLFSSL)/wolfcrypt/src/wolfevent.c \ + $(WOLFSSL)/wolfcrypt/src/dsa.c \ + $(WOLFSSL)/wolfcrypt/src/pkcs7.c \ + $(WOLFSSL)/wolfcrypt/src/wc_encrypt.c \ + $(WOLFSSL)/wolfcrypt/src/cpuid.c \ + $(WOLFSSL)/wolfcrypt/src/sha256.c \ + $(WOLFSSL)/wolfcrypt/src/md4.c \ + $(WOLFSSL)/wolfcrypt/src/fe_operations.c \ + $(WOLFSSL)/wolfcrypt/src/ed25519.c \ + $(WOLFSSL)/wolfcrypt/src/poly1305.c \ + $(WOLFSSL)/wolfcrypt/src/hc128.c + +WOLFSSLSRC = + +# $(WOLFSSL)/src/internal.c \ +# $(WOLFSSL)/src/tls.c \ +# $(WOLFSSL)/src/keys.c \ +# $(WOLFSSL)/src/crl.c \ +# $(WOLFSSL)/src/ssl.c \ +# $(WOLFSSL)/src/wolfio.c \ +# $(WOLFSSL)/src/sniffer.c \ +# $(WOLFSSL)/src/ocsp.c \ +# $(WOLFSSL)/src/tls13.c + + +WOLFSRC = $(WOLFBINDSRC) $(WOLFCRYPTSRC) $(WOLFSSLSRC) + +WOLFINC = \ + $(WOLFSSL)/wolfcrypt/include \ + $(WOLFSSL)/wolfssl/include \ + $(WOLFSSL) + +# Shared variables +ALLCSRC += $(WOLFSRC) +ALLINC += $(WOLFINC) + diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c new file mode 100644 index 000000000..48525faea --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/main.c @@ -0,0 +1,85 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + + +BaseSequentialStream *serialp; + +extern void wolfCrypt_Init(void); +extern void wolfcrypt_test(void); +/* + * Green LED blinker thread, times are in milliseconds. + */ +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearLine(LINE_LED_BLUE); + chThdSleepMilliseconds(500); + palSetLine(LINE_LED_BLUE); + chThdSleepMilliseconds(500); + } +} + +static const SerialConfig sdcfg = { 115200, 0,UART_MR_PAR_NO }; +static const CRYConfig cryptoconf = { + TRANSFER_POLLING, + AES_CFBS_128, //cfbs +}; +/* + * Application entry point. + */ +int main(void) { + + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + sdStart(&SD1, &sdcfg); + + serialp =(BaseSequentialStream *)&SD1; + + /* Redirecting UART0 RX on PD2 and UART0 TX on PD3. */ + palSetGroupMode(PIOD, PAL_PORT_BIT(2) | PAL_PORT_BIT(3), 0U, + PAL_SAMA_FUNC_PERIPH_A | PAL_MODE_SECURE); + + cryStart(&CRYD1, &cryptoconf); + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + wolfCrypt_Init(); + wolfcrypt_test(); + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (true) { + chThdSleepMilliseconds(500); + } +} diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt new file mode 100644 index 000000000..a1d3961ac --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/readme.txt @@ -0,0 +1,39 @@ +***************************************************************************** +** ChibiOS/RT port for ARM-Cortex-M7 STM32F746. ** +***************************************************************************** + +** TARGET ** + +The demo runs on SAMA5D2-XPLAINED + +** The Demo ** + +The demo flashes a LED to indicate that is running properly. + +An example HTTPS server is implemented to serve "GET /" requests at address +192.168.0.5 on port 443. + +Use curl command line to verify DEMO +>>curl -k https://192.168.0.5 + +SSL certificate and server key that are compiled in are the example keys +taken from the wolfSSL repository. To use different keys, regenerate cert.c +using "xxd -i" from your certificate and keys. + + +** Build Procedure ** + +This build has been tested using arm-none-eabi-gcc and make. +Just type 'make' from this directory to create the image. + + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com + +WolfSSL is Copyright (c) by WolfSSL Inc. diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c new file mode 100644 index 000000000..63941a373 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/cert.c @@ -0,0 +1,83 @@ +const unsigned char server_cert[] = { + 0x30, 0x82, 0x03, 0x10, 0x30, 0x82, 0x02, 0xb5, 0xa0, 0x03, 0x02, 0x01, + 0x02, 0x02, 0x09, 0x00, 0xef, 0x46, 0xc7, 0xa4, 0x9b, 0xbb, 0x60, 0xd3, + 0x30, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x04, 0x03, 0x02, + 0x30, 0x81, 0x8f, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, + 0x13, 0x02, 0x55, 0x53, 0x31, 0x13, 0x30, 0x11, 0x06, 0x03, 0x55, 0x04, + 0x08, 0x0c, 0x0a, 0x57, 0x61, 0x73, 0x68, 0x69, 0x6e, 0x67, 0x74, 0x6f, + 0x6e, 0x31, 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x07, + 0x53, 0x65, 0x61, 0x74, 0x74, 0x6c, 0x65, 0x31, 0x10, 0x30, 0x0e, 0x06, + 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x07, 0x45, 0x6c, 0x69, 0x70, 0x74, 0x69, + 0x63, 0x31, 0x0c, 0x30, 0x0a, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x03, + 0x45, 0x43, 0x43, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x03, + 0x0c, 0x0f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, + 0x6c, 0x2e, 0x63, 0x6f, 0x6d, 0x31, 0x1f, 0x30, 0x1d, 0x06, 0x09, 0x2a, + 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x09, 0x01, 0x16, 0x10, 0x69, 0x6e, + 0x66, 0x6f, 0x40, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, 0x2e, 0x63, + 0x6f, 0x6d, 0x30, 0x1e, 0x17, 0x0d, 0x31, 0x36, 0x30, 0x38, 0x31, 0x31, + 0x32, 0x30, 0x30, 0x37, 0x33, 0x38, 0x5a, 0x17, 0x0d, 0x31, 0x39, 0x30, + 0x35, 0x30, 0x38, 0x32, 0x30, 0x30, 0x37, 0x33, 0x38, 0x5a, 0x30, 0x81, + 0x8f, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02, + 0x55, 0x53, 0x31, 0x13, 0x30, 0x11, 0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, + 0x0a, 0x57, 0x61, 0x73, 0x68, 0x69, 0x6e, 0x67, 0x74, 0x6f, 0x6e, 0x31, + 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x07, 0x53, 0x65, + 0x61, 0x74, 0x74, 0x6c, 0x65, 0x31, 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, + 0x04, 0x0a, 0x0c, 0x07, 0x45, 0x6c, 0x69, 0x70, 0x74, 0x69, 0x63, 0x31, + 0x0c, 0x30, 0x0a, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x03, 0x45, 0x43, + 0x43, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x0f, + 0x77, 0x77, 0x77, 0x2e, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, 0x2e, + 0x63, 0x6f, 0x6d, 0x31, 0x1f, 0x30, 0x1d, 0x06, 0x09, 0x2a, 0x86, 0x48, + 0x86, 0xf7, 0x0d, 0x01, 0x09, 0x01, 0x16, 0x10, 0x69, 0x6e, 0x66, 0x6f, + 0x40, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, 0x2e, 0x63, 0x6f, 0x6d, + 0x30, 0x59, 0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x02, + 0x01, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, + 0x42, 0x00, 0x04, 0xbb, 0x33, 0xac, 0x4c, 0x27, 0x50, 0x4a, 0xc6, 0x4a, + 0xa5, 0x04, 0xc3, 0x3c, 0xde, 0x9f, 0x36, 0xdb, 0x72, 0x2d, 0xce, 0x94, + 0xea, 0x2b, 0xfa, 0xcb, 0x20, 0x09, 0x39, 0x2c, 0x16, 0xe8, 0x61, 0x02, + 0xe9, 0xaf, 0x4d, 0xd3, 0x02, 0x93, 0x9a, 0x31, 0x5b, 0x97, 0x92, 0x21, + 0x7f, 0xf0, 0xcf, 0x18, 0xda, 0x91, 0x11, 0x02, 0x34, 0x86, 0xe8, 0x20, + 0x58, 0x33, 0x0b, 0x80, 0x34, 0x89, 0xd8, 0xa3, 0x81, 0xf7, 0x30, 0x81, + 0xf4, 0x30, 0x1d, 0x06, 0x03, 0x55, 0x1d, 0x0e, 0x04, 0x16, 0x04, 0x14, + 0x5d, 0x5d, 0x26, 0xef, 0xac, 0x7e, 0x36, 0xf9, 0x9b, 0x76, 0x15, 0x2b, + 0x4a, 0x25, 0x02, 0x23, 0xef, 0xb2, 0x89, 0x30, 0x30, 0x81, 0xc4, 0x06, + 0x03, 0x55, 0x1d, 0x23, 0x04, 0x81, 0xbc, 0x30, 0x81, 0xb9, 0x80, 0x14, + 0x5d, 0x5d, 0x26, 0xef, 0xac, 0x7e, 0x36, 0xf9, 0x9b, 0x76, 0x15, 0x2b, + 0x4a, 0x25, 0x02, 0x23, 0xef, 0xb2, 0x89, 0x30, 0xa1, 0x81, 0x95, 0xa4, + 0x81, 0x92, 0x30, 0x81, 0x8f, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, + 0x04, 0x06, 0x13, 0x02, 0x55, 0x53, 0x31, 0x13, 0x30, 0x11, 0x06, 0x03, + 0x55, 0x04, 0x08, 0x0c, 0x0a, 0x57, 0x61, 0x73, 0x68, 0x69, 0x6e, 0x67, + 0x74, 0x6f, 0x6e, 0x31, 0x10, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x04, 0x07, + 0x0c, 0x07, 0x53, 0x65, 0x61, 0x74, 0x74, 0x6c, 0x65, 0x31, 0x10, 0x30, + 0x0e, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x07, 0x45, 0x6c, 0x69, 0x70, + 0x74, 0x69, 0x63, 0x31, 0x0c, 0x30, 0x0a, 0x06, 0x03, 0x55, 0x04, 0x0b, + 0x0c, 0x03, 0x45, 0x43, 0x43, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, + 0x04, 0x03, 0x0c, 0x0f, 0x77, 0x77, 0x77, 0x2e, 0x77, 0x6f, 0x6c, 0x66, + 0x73, 0x73, 0x6c, 0x2e, 0x63, 0x6f, 0x6d, 0x31, 0x1f, 0x30, 0x1d, 0x06, + 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x09, 0x01, 0x16, 0x10, + 0x69, 0x6e, 0x66, 0x6f, 0x40, 0x77, 0x6f, 0x6c, 0x66, 0x73, 0x73, 0x6c, + 0x2e, 0x63, 0x6f, 0x6d, 0x82, 0x09, 0x00, 0xef, 0x46, 0xc7, 0xa4, 0x9b, + 0xbb, 0x60, 0xd3, 0x30, 0x0c, 0x06, 0x03, 0x55, 0x1d, 0x13, 0x04, 0x05, + 0x30, 0x03, 0x01, 0x01, 0xff, 0x30, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, + 0xce, 0x3d, 0x04, 0x03, 0x02, 0x03, 0x49, 0x00, 0x30, 0x46, 0x02, 0x21, + 0x00, 0xf1, 0xd0, 0xa6, 0x3e, 0x83, 0x33, 0x24, 0xd1, 0x7a, 0x05, 0x5f, + 0x1e, 0x0e, 0xbd, 0x7d, 0x6b, 0x33, 0xe9, 0xf2, 0x86, 0xf3, 0xf3, 0x3d, + 0xa9, 0xef, 0x6a, 0x87, 0x31, 0xb3, 0xb7, 0x7e, 0x50, 0x02, 0x21, 0x00, + 0xf0, 0x60, 0xdd, 0xce, 0xa2, 0xdb, 0x56, 0xec, 0xd9, 0xf4, 0xe4, 0xe3, + 0x25, 0xd4, 0xb0, 0xc9, 0x25, 0x7d, 0xca, 0x7a, 0x5d, 0xba, 0xc4, 0xb2, + 0xf6, 0x7d, 0x04, 0xc7, 0xbd, 0x62, 0xc9, 0x20 +}; +unsigned int server_cert_len = 788; +const unsigned char server_key[] = { + 0x30, 0x77, 0x02, 0x01, 0x01, 0x04, 0x20, 0x45, 0xb6, 0x69, 0x02, 0x73, + 0x9c, 0x6c, 0x85, 0xa1, 0x38, 0x5b, 0x72, 0xe8, 0xe8, 0xc7, 0xac, 0xc4, + 0x03, 0x8d, 0x53, 0x35, 0x04, 0xfa, 0x6c, 0x28, 0xdc, 0x34, 0x8d, 0xe1, + 0xa8, 0x09, 0x8c, 0xa0, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, + 0x03, 0x01, 0x07, 0xa1, 0x44, 0x03, 0x42, 0x00, 0x04, 0xbb, 0x33, 0xac, + 0x4c, 0x27, 0x50, 0x4a, 0xc6, 0x4a, 0xa5, 0x04, 0xc3, 0x3c, 0xde, 0x9f, + 0x36, 0xdb, 0x72, 0x2d, 0xce, 0x94, 0xea, 0x2b, 0xfa, 0xcb, 0x20, 0x09, + 0x39, 0x2c, 0x16, 0xe8, 0x61, 0x02, 0xe9, 0xaf, 0x4d, 0xd3, 0x02, 0x93, + 0x9a, 0x31, 0x5b, 0x97, 0x92, 0x21, 0x7f, 0xf0, 0xcf, 0x18, 0xda, 0x91, + 0x11, 0x02, 0x34, 0x86, 0xe8, 0x20, 0x58, 0x33, 0x0b, 0x80, 0x34, 0x89, + 0xd8 +}; +unsigned int server_key_len = 121; diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c new file mode 100644 index 000000000..a8a6385fc --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.c @@ -0,0 +1,217 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file is a modified version of the lwIP web server demo. The original + * author is unknown because the file didn't contain any license information. + * + * The HTTPS version is Copyright (C) 2017 - WolfSSL Inc. and is based on the + * demo HTTP code of ChibiOS. + */ + + +/** + * @file web.c + * @brief HTTPS server wrapper thread code. + * @addtogroup WEB_THREAD + * @{ + */ + +#include + +#include "ch.h" + +#include "lwip/opt.h" +#include "lwip/arch.h" +#include "lwip/api.h" + +#include "wolfssl_chibios.h" +#include "web.h" + +#if LWIP_NETCONN + +static char url_buffer[WEB_MAX_PATH_SIZE]; +extern unsigned char server_cert[]; +extern unsigned int server_cert_len; +extern unsigned char server_key[]; +extern unsigned int server_key_len; + +#define HEXTOI(x) (isdigit(x) ? (x) - '0' : (x) - 'a' + 10) + +/** + * @brief Decodes an URL sting. + * @note The string is terminated by a zero or a separator. + * + * @param[in] url encoded URL string + * @param[out] buf buffer for the processed string + * @param[in] max max number of chars to copy into the buffer + * @return The conversion status. + * @retval false string converted. + * @retval true the string was not valid or the buffer overflowed + * + * @notapi + */ +static bool decode_url(const char *url, char *buf, size_t max) { + + while (true) { + int h, l; + unsigned c = *url++; + + switch (c) { + case 0: + case '\r': + case '\n': + case '\t': + case ' ': + case '?': + *buf = 0; + return false; + case '.': + if (max <= 1) + return true; + + h = *(url + 1); + if (h == '.') + return true; + + break; + case '%': + if (max <= 1) + return true; + + h = tolower((int)*url++); + if (h == 0) + return true; + if (!isxdigit(h)) + return true; + + l = tolower((int)*url++); + if (l == 0) + return true; + if (!isxdigit(l)) + return true; + + c = (char)((HEXTOI(h) << 4) | HEXTOI(l)); + break; + default: + if (max <= 1) + return true; + + if (!isalnum(c) && (c != '_') && (c != '-') && (c != '+') && + (c != '/')) + return true; + + break; + } + + *buf++ = c; + max--; + } +} + + +#define MAX_HTTPREQ_SIZE 256 +static const char http_html_hdr[] = "HTTP/1.1 200 OK\r\nContent-type: text/html\r\n\r\n"; +static const char http_index_html[] = "Congrats!

Welcome to chibiOS HTTPS server!

Powered by LwIP + WolfSSL"; + +static char inbuf[MAX_HTTPREQ_SIZE]; +static void https_server_serve(sslconn *sc) +{ + int ret; + + /* Read the data from the port, blocking if nothing yet there. + We assume the request (the part we care about) is in one netbuf.*/ + ret = wolfSSL_read(sc->ssl, inbuf, MAX_HTTPREQ_SIZE); + if (ret >= 5 && + inbuf[0] == 'G' && + inbuf[1] == 'E' && + inbuf[2] == 'T' && + inbuf[3] == ' ' && + inbuf[4] == '/') { + + if (decode_url(inbuf + 4, url_buffer, WEB_MAX_PATH_SIZE)) { + /* Invalid URL handling.*/ + return; + } + + /* Send the HTML header + * subtract 1 from the size, since we dont send the \0 in the string + * NETCONN_NOCOPY: our data is const static, so no need to copy it + */ + wolfSSL_write(sc->ssl, http_html_hdr, sizeof(http_html_hdr)-1); + + /* Send our HTML page */ + wolfSSL_write(sc->ssl, http_index_html, sizeof(http_index_html)-1); + } +} + +/** + * @brief Stack area for the http thread. + */ +THD_WORKING_AREA(wa_https_server, WEB_THREAD_STACK_SIZE); + +/** + * @brssl HTTPS server thread. + */ +THD_FUNCTION(https_server, p) { + sslconn *sc, *newsc; + (void)p; + chRegSetThreadName("https"); + + /* Initialize wolfSSL */ + wolfSSL_Init(); + + /* Create a new SSL connection handle */ + sc = sslconn_new(NETCONN_TCP, wolfTLSv1_2_server_method()); + if (!sc) { + while(1) {} + } + + /* Load certificate file for the HTTPS server */ + if (wolfSSL_CTX_use_certificate_buffer(sc->ctx, server_cert, + server_cert_len, SSL_FILETYPE_ASN1 ) != SSL_SUCCESS) + while(1) {} + + /* Load the private key */ + if (wolfSSL_CTX_use_PrivateKey_buffer(sc->ctx, server_key, + server_key_len, SSL_FILETYPE_ASN1 ) != SSL_SUCCESS) + while(1) {} + + /* Bind to port 443 (HTTPS) with default IP address */ + netconn_bind(sc->conn, NULL, WEB_THREAD_PORT); + + /* Put the connection into LISTEN state */ + netconn_listen(sc->conn); + + /* Goes to the final priority after initialization.*/ + chThdSetPriority(WEB_THREAD_PRIORITY); + + /* Listening loop */ + while (true) { + newsc = sslconn_accept(sc); + if (!newsc) { + chThdSleepMilliseconds(500); + continue; + } + /* New connection: a new SSL connector is spawned */ + https_server_serve(newsc); + sslconn_close(newsc); + } +} + +#endif /* LWIP_NETCONN */ + +/** @} */ diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h new file mode 100644 index 000000000..e43139d11 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/web/web.h @@ -0,0 +1,55 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file web.h + * @brief HTTP server wrapper thread macros and structures. + * @addtogroup WEB_THREAD + * @{ + */ + +#ifndef WEB_H +#define WEB_H + +#if !defined(WEB_THREAD_STACK_SIZE) +#define WEB_THREAD_STACK_SIZE (16 * 1024) +#endif + +#if !defined(WEB_THREAD_PORT) +#define WEB_THREAD_PORT 443 +#endif + +#if !defined(WEB_THREAD_PRIORITY) +#define WEB_THREAD_PRIORITY (LOWPRIO + 2) +#endif + +#if !defined(WEB_MAX_PATH_SIZE) +#define WEB_MAX_PATH_SIZE 128 +#endif + +extern THD_WORKING_AREA(wa_https_server, WEB_THREAD_STACK_SIZE); + +#ifdef __cplusplus +extern "C" { +#endif + THD_FUNCTION(https_server, p); +#ifdef __cplusplus +} +#endif + +#endif /* WEB_H */ + +/** @} */ diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c new file mode 100644 index 000000000..831b423b7 --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.c @@ -0,0 +1,116 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +/* + * **** This file incorporates work covered by the following copyright and **** + * **** permission notice: **** + * + * Copyright (C) 2006-2017 wolfSSL Inc. + * + * This file is part of wolfSSL. + * + * wolfSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + * + */ + +#include "ch.h" +#include "wolfssl_chibios.h" +#include + + + +#ifndef ST2S +# define ST2S(n) (((n) + CH_CFG_ST_FREQUENCY - 1UL) / CH_CFG_ST_FREQUENCY) +#endif + +#ifndef ST2MS +#define ST2MS(n) (((n) * 1000UL + CH_CFG_ST_FREQUENCY - 1UL) / CH_CFG_ST_FREQUENCY) +#endif + + +word32 LowResTimer(void) +{ + systime_t t = chVTGetSystemTimeX(); + return ST2S(t); +} + +uint32_t TimeNowInMilliseconds(void) +{ + systime_t t = chVTGetSystemTimeX(); + return ST2MS(t); +} + +void *chHeapRealloc (void *addr, uint32_t size) +{ + union heap_header *hp; + uint32_t prev_size, new_size; + + void *ptr; + + if(addr == NULL) { + return chHeapAlloc(NULL, size); + } + + /* previous allocated segment is preceded by an heap_header */ + hp = addr - sizeof(union heap_header); + prev_size = hp->used.size; /* size is always multiple of 8 */ + + /* check new size memory alignment */ + if(size % 8 == 0) { + new_size = size; + } + else { + new_size = ((int) (size / 8)) * 8 + 8; + } + + if(prev_size >= new_size) { + return addr; + } + + ptr = chHeapAlloc(NULL, size); + if(ptr == NULL) { + return NULL; + } + + memcpy(ptr, addr, prev_size); + + chHeapFree(addr); + + return ptr; +} + +void *chibios_alloc(void *heap, int size) +{ + return chHeapAlloc(heap, size); +} + +void chibios_free(void *ptr) +{ + if (ptr) + chHeapFree(ptr); +} + diff --git a/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h new file mode 100644 index 000000000..e67d8f14c --- /dev/null +++ b/demos/ATSAMA5D2/RT-SAMA5D2-XPLAINED-WOLFSSL-HALCRYPTO/wolfssl_chibios.h @@ -0,0 +1,57 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ +/* + * **** This file incorporates work covered by the following copyright and **** + * **** permission notice: **** + * + * Copyright (C) 2006-2017 wolfSSL Inc. + * + * This file is part of wolfSSL. + * + * wolfSSL is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * wolfSSL is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + * + */ +#ifndef WOLFSSL_SK_H +#define WOLFSSL_SK_H +#include "wolfssl/ssl.h" +#include "wolfssl/wolfcrypt/types.h" + +#include "user_settings.h" +#define XMALLOC(s,h,t) chibios_alloc(h,s) +#define XFREE(p,h,t) chibios_free(p) + + + +int wolfssl_send_cb(WOLFSSL* ssl, char *buf, int sz, void *ctx); +int wolfssl_recv_cb(WOLFSSL *ssl, char *buf, int sz, void *ctx); + +void *chibios_alloc(void *heap, int size); +void chibios_free(void *ptr); +word32 LowResTimer(void); + +#endif -- cgit v1.2.3