From b03af35eb389d6452eb547845afcc20721ed5934 Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Sun, 1 Jul 2012 07:21:54 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4376
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 boards/OLIMEX_STM32_P107/board.c | 24 ++++++++++++++++++++++++
 boards/OLIMEX_STM32_P107/board.h | 12 ++++++------
 2 files changed, 30 insertions(+), 6 deletions(-)

(limited to 'boards')

diff --git a/boards/OLIMEX_STM32_P107/board.c b/boards/OLIMEX_STM32_P107/board.c
index 6734597fc..3d4aaafbe 100644
--- a/boards/OLIMEX_STM32_P107/board.c
+++ b/boards/OLIMEX_STM32_P107/board.c
@@ -47,6 +47,30 @@ void __early_init(void) {
   stm32_clock_init();
 }
 
+#if HAL_USE_MMC_SPI
+/*
+ * Card detection through the card internal pull-up on D3.
+ */
+bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+  static bool_t last_status = FALSE;
+
+  (void)mmcp;
+  if ((palReadLatch(GPIOA) & PAL_PORT_BIT(GPIOA_SPI3_CS_MMC)) == 0)
+    return last_status;
+  return last_status = (bool_t)palReadPad(GPIOA, GPIOA_SPI3_CS_MMC);
+}
+
+/*
+ * Card write protection detection is not possible, the card is always
+ * reported as not protected.
+ */
+bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+  (void)mmcp;
+  return FALSE;
+}
+#endif
+
 /*
  * Board-specific initialization code.
  */
diff --git a/boards/OLIMEX_STM32_P107/board.h b/boards/OLIMEX_STM32_P107/board.h
index 36aa52fa2..5016159f8 100644
--- a/boards/OLIMEX_STM32_P107/board.h
+++ b/boards/OLIMEX_STM32_P107/board.h
@@ -22,14 +22,14 @@
 #define _BOARD_H_
 
 /*
- * Setup for the Olimex STM32-P107 evaluation board.
+ * Setup for the Olimex STM32-P107 Rev.A evaluation board.
  */
 
 /*
  * Board identifier.
  */
-#define BOARD_OLIMEX_STM32_P107
-#define BOARD_NAME              "Olimex STM32-P107"
+#define BOARD_OLIMEX_STM32_P107_REV_A
+#define BOARD_NAME              "Olimex STM32-P107 Rev.A"
 
 /*
  * Board frequencies.
@@ -52,7 +52,7 @@
  * IO pins assignments.
  */
 #define GPIOA_SWITCH_WKUP       0
-
+#define GPIOA_SPI3_CS_MMC       4
 #define GPIOC_LED_STATUS1       6
 #define GPIOC_LED_STATUS2       7
 #define GPIOC_SWITCH_TAMPER     13
@@ -88,7 +88,7 @@
  * PA1  - Normal input      (ETH_RMII_REF_CLK).
  * PA2  - Alternate output  (ETH_RMII_MDIO).
  * PA3  - Input with PU     (unconnected).
- * PA4  - Push Pull output  (CS_MMC).
+ * PA4  - Open Drain output (CS_MMC).
  * PA5  - Input with PU     (unconnected).
  * PA6  - Input with PU     (unconnected).
  * PA7  - Normal input      (ETH_RMII_CRS_DV).
@@ -101,7 +101,7 @@
  * PA14 - Normal input      (TCK).
  * PA15 - Normal input      (TDI).
  */
-#define VAL_GPIOACRL            0x48838B44      /*  PA7...PA0 */
+#define VAL_GPIOACRL            0x48878B44      /*  PA7...PA0 */
 #define VAL_GPIOACRH            0x4444444B      /* PA15...PA8 */
 #define VAL_GPIOAODR            0xFFFFFFFF
 
-- 
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