From 5715f45808847774208008fd2d04fb8d67665b8d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Jun 2012 12:30:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4286 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/ST_STM32F4_DISCOVERY/board.h | 551 +++++++++++++++++++----------------- 1 file changed, 298 insertions(+), 253 deletions(-) (limited to 'boards/ST_STM32F4_DISCOVERY') diff --git a/boards/ST_STM32F4_DISCOVERY/board.h b/boards/ST_STM32F4_DISCOVERY/board.h index 0ea617305..56511b6d7 100644 --- a/boards/ST_STM32F4_DISCOVERY/board.h +++ b/boards/ST_STM32F4_DISCOVERY/board.h @@ -124,50 +124,50 @@ * PA13 - GPIOA_SWDIO (alternate 0). * PA14 - GPIOA_SWCLK (alternate 0). */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ - PIN_MODE_INPUT(1) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_ALTERNATE(GPIOA_LRCK) | \ - PIN_MODE_ALTERNATE(GPIOA_SPC) | \ - PIN_MODE_ALTERNATE(GPIOA_SDO) | \ - PIN_MODE_ALTERNATE(GPIOA_SDI) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOA_OTYPER 0x00000000 -#define VAL_GPIOA_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOA_PUPDR (PIN_PUDR_FLOATING(GPIOA_BUTTON) | \ - PIN_PUDR_PULLUP(1) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_FLOATING(GPIOA_LRCK) | \ - PIN_PUDR_FLOATING(GPIOA_SPC) | \ - PIN_PUDR_FLOATING(GPIOA_SDO) | \ - PIN_PUDR_FLOATING(GPIOA_SDI) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_FLOATING(GPIOA_VBUS_FS) | \ - PIN_PUDR_FLOATING(GPIOA_OTG_FS_ID) | \ - PIN_PUDR_FLOATING(GPIOA_OTG_FS_DM) | \ - PIN_PUDR_FLOATING(GPIOA_OTG_FS_DP) | \ - PIN_PUDR_PULLUP(GPIOA_SWDIO) | \ - PIN_PUDR_PULLDOWN(GPIOA_SWCLK) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOA_ODR 0xFFFFFFFF -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_LRCK, 6) | \ - PIN_AFIO_AF(GPIOA_SPC, 5) | \ - PIN_AFIO_AF(GPIOA_SDO, 5) | \ - PIN_AFIO_AF(GPIOA_SDI, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0)) +#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_ALTERNATE(GPIOA_LRCK) | \ + PIN_MODE_ALTERNATE(GPIOA_SPC) | \ + PIN_MODE_ALTERNATE(GPIOA_SDO) | \ + PIN_MODE_ALTERNATE(GPIOA_SDI) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ + PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ + PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ + PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOA_OTYPER 0x00000000 +#define VAL_GPIOA_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOA_PUPDR (PIN_PUDR_FLOATING(GPIOA_BUTTON) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_FLOATING(GPIOA_LRCK) | \ + PIN_PUDR_FLOATING(GPIOA_SPC) | \ + PIN_PUDR_FLOATING(GPIOA_SDO) | \ + PIN_PUDR_FLOATING(GPIOA_SDI) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_FLOATING(GPIOA_VBUS_FS) | \ + PIN_PUDR_FLOATING(GPIOA_OTG_FS_ID) | \ + PIN_PUDR_FLOATING(GPIOA_OTG_FS_DM) | \ + PIN_PUDR_FLOATING(GPIOA_OTG_FS_DP) | \ + PIN_PUDR_PULLUP(GPIOA_SWDIO) | \ + PIN_PUDR_PULLDOWN(GPIOA_SWCLK) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOA_ODR 0xFFFFFFFF +#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_LRCK, 6) | \ + PIN_AFIO_AF(GPIOA_SPC, 5) | \ + PIN_AFIO_AF(GPIOA_SDO, 5) | \ + PIN_AFIO_AF(GPIOA_SDI, 5)) +#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ + PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ + PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ + PIN_AFIO_AF(GPIOA_SWCLK, 0)) /* * Port B setup. @@ -176,45 +176,45 @@ * PB6 - GPIOB_SCL (alternate 4). * PB9 - GPIOB_SDA (alternate 4). */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \ - PIN_MODE_INPUT(1) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_ALTERNATE(GPIOB_SWO) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_ALTERNATE(GPIOB_SCL) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_ALTERNATE(GPIOB_SDA) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_INPUT(12) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_SDA)) -#define VAL_GPIOB_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \ - PIN_PUDR_PULLUP(1) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_FLOATING(GPIOB_SWO) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_FLOATING(GPIOB_SCL) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_FLOATING(GPIOB_SDA) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_PULLUP(12) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOB_ODR 0xFFFFFFFF -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_SWO, 0) | \ - PIN_AFIO_AF(GPIOB_SCL, 4)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_SDA, 4)) +#define VAL_GPIOB_MODER (PIN_MODE_INPUT(0) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_ALTERNATE(GPIOB_SWO) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_ALTERNATE(GPIOB_SCL) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_ALTERNATE(GPIOB_SDA) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \ + PIN_OTYPE_OPENDRAIN(GPIOB_SDA)) +#define VAL_GPIOB_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_FLOATING(GPIOB_SWO) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_FLOATING(GPIOB_SCL) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_FLOATING(GPIOB_SDA) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOB_ODR 0xFFFFFFFF +#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_SWO, 0) | \ + PIN_AFIO_AF(GPIOB_SCL, 4)) +#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_SDA, 4)) /* * Port C setup. @@ -224,44 +224,44 @@ * PC10 - GPIOC_SCLK (alternate 6). * PC12 - GPIOC_SDIN (alternate 6). */ -#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ - PIN_MODE_INPUT(1) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOC_OTYPER 0x00000000 -#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ - PIN_PUDR_PULLUP(1) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_FLOATING(GPIOC_MCLK) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_FLOATING(GPIOC_SCLK) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_FLOATING(GPIOC_SDIN) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOC_ODR 0xFFFFFFFF -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MCLK, 6)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SCLK, 6) | \ - PIN_AFIO_AF(GPIOC_SDIN, 6)) +#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOC_OTYPER 0x00000000 +#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_FLOATING(GPIOC_MCLK) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_FLOATING(GPIOC_SCLK) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_FLOATING(GPIOC_SDIN) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOC_ODR 0xFFFFFFFF +#define VAL_GPIOC_AFRL PIN_AFIO_AF(GPIOC_MCLK, 6)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SCLK, 6) | \ + PIN_AFIO_AF(GPIOC_SDIN, 6)) /* * Port D setup. @@ -273,43 +273,43 @@ * PD14 - GPIOD_LED5 (output push-pull). * PD15 - GPIOD_LED6 (output push-pull). */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(0) | \ - PIN_MODE_INPUT(1) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_OUTPUT(GPIOD_RESET) | \ - PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_OUTPUT(GPIOD_LED4) | \ - PIN_MODE_OUTPUT(GPIOD_LED3) | \ - PIN_MODE_OUTPUT(GPIOD_LED5) | \ - PIN_MODE_OUTPUT(GPIOD_LED6)) -#define VAL_GPIOD_OTYPER 0x00000000 -#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \ - PIN_PUDR_PULLUP(1) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_FLOATING(GPIOD_RESET) | \ - PIN_PUDR_FLOATING(GPIOD_OVER_CURRENT) |\ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_FLOATING(GPIOD_LED4) | \ - PIN_PUDR_FLOATING(GPIOD_LED3) | \ - PIN_PUDR_FLOATING(GPIOD_LED5) | \ - PIN_PUDR_FLOATING(GPIOD_LED6)) -#define VAL_GPIOD_ODR 0x00000FCF -#define VAL_GPIOD_AFRL 0x00000000 -#define VAL_GPIOD_AFRH 0x00000000 +#define VAL_GPIOD_MODER (PIN_MODE_INPUT(0) | \ + PIN_MODE_INPUT(1) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_OUTPUT(GPIOD_RESET) | \ + PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_OUTPUT(GPIOD_LED4) | \ + PIN_MODE_OUTPUT(GPIOD_LED3) | \ + PIN_MODE_OUTPUT(GPIOD_LED5) | \ + PIN_MODE_OUTPUT(GPIOD_LED6)) +#define VAL_GPIOD_OTYPER 0x00000000 +#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_FLOATING(GPIOD_RESET) | \ + PIN_PUDR_FLOATING(GPIOD_OVER_CURRENT) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_FLOATING(GPIOD_LED4) | \ + PIN_PUDR_FLOATING(GPIOD_LED3) | \ + PIN_PUDR_FLOATING(GPIOD_LED5) | \ + PIN_PUDR_FLOATING(GPIOD_LED6)) +#define VAL_GPIOD_ODR 0x00000FCF +#define VAL_GPIOD_AFRL 0x00000000 +#define VAL_GPIOD_AFRH 0x00000000 /* * Port E setup. @@ -318,67 +318,97 @@ * PE1 - GPIOE_INT2 (input floating). * PE3 - GPIOE_CS_SPI (output push-pull). */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ - PIN_MODE_INPUT(GPIOE_INT2) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_INPUT(12) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOE_OTYPER 0x00000000 -#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(GPIOE_INT1) | \ - PIN_PUDR_FLOATING(GPIOE_INT2) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_FLOATING(GPIOE_CS_SPI) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_PULLUP(12) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOE_ODR 0xFFFFFFFF -#define VAL_GPIOE_AFRL 0x00000000 -#define VAL_GPIOE_AFRH 0x00000000 +#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ + PIN_MODE_INPUT(GPIOE_INT2) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOE_OTYPER 0x00000000 +#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(GPIOE_INT1) | \ + PIN_PUDR_FLOATING(GPIOE_INT2) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_FLOATING(GPIOE_CS_SPI) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOE_ODR 0xFFFFFFFF +#define VAL_GPIOE_AFRL 0x00000000 +#define VAL_GPIOE_AFRH 0x00000000 /* * Port F setup. * All input with pull-up. */ -#define VAL_GPIOF_MODER 0x00000000 -#define VAL_GPIOF_OTYPER 0x00000000 -#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOF_PUPDR 0xFFFFFFFF -#define VAL_GPIOF_ODR 0xFFFFFFFF -#define VAL_GPIOF_AFRL 0x00000000 -#define VAL_GPIOF_AFRH 0x00000000 +#define VAL_GPIOF_MODER 0x00000000 +#define VAL_GPIOF_OTYPER 0x00000000 +#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOF_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOF_ODR 0xFFFFFFFF +#define VAL_GPIOF_AFRL 0x00000000 +#define VAL_GPIOF_AFRH 0x00000000 /* * Port G setup. * All input with pull-up. */ -#define VAL_GPIOG_MODER 0x00000000 -#define VAL_GPIOG_OTYPER 0x00000000 -#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOG_PUPDR 0xFFFFFFFF -#define VAL_GPIOG_ODR 0xFFFFFFFF -#define VAL_GPIOG_AFRL 0x00000000 -#define VAL_GPIOG_AFRH 0x00000000 +#define VAL_GPIOG_MODER 0x00000000 +#define VAL_GPIOG_OTYPER 0x00000000 +#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOG_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOG_ODR 0xFFFFFFFF +#define VAL_GPIOG_AFRL 0x00000000 +#define VAL_GPIOG_AFRH 0x00000000 /* * Port H setup. @@ -386,55 +416,70 @@ * PH0 - GPIOH_OSC_IN (input floating). * PH1 - GPIOH_OSC_OUT (input floating). */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ - PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_INPUT(12) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOH_OTYPER 0x00000000 -#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \ - PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_PULLUP(12) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOH_ODR 0xFFFFFFFF -#define VAL_GPIOH_AFRL 0x00000000 -#define VAL_GPIOH_AFRH 0x00000000 +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOH_OTYPER 0x00000000 +#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \ + PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOH_ODR 0xFFFFFFFF +#define VAL_GPIOH_AFRL 0x00000000 +#define VAL_GPIOH_AFRH 0x00000000 /* * Port I setup. * All input with pull-up. */ -#define VAL_GPIOI_MODER 0x00000000 -#define VAL_GPIOI_OTYPER 0x00000000 -#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOI_PUPDR 0xFFFFFFFF -#define VAL_GPIOI_ODR 0xFFFFFFFF -#define VAL_GPIOI_AFRL 0x00000000 -#define VAL_GPIOI_AFRH 0x00000000 +#define VAL_GPIOI_MODER 0x00000000 +#define VAL_GPIOI_OTYPER 0x00000000 +#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOI_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOI_ODR 0xFFFFFFFF +#define VAL_GPIOI_AFRL 0x00000000 +#define VAL_GPIOI_AFRH 0x00000000 #if !defined(_FROM_ASM_) #ifdef __cplusplus -- cgit v1.2.3