From 5715f45808847774208008fd2d04fb8d67665b8d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Jun 2012 12:30:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4286 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- boards/OLIMEX_STM32_E407/board.h | 433 +++++++++++++++++++-------------------- 1 file changed, 216 insertions(+), 217 deletions(-) (limited to 'boards/OLIMEX_STM32_E407') diff --git a/boards/OLIMEX_STM32_E407/board.h b/boards/OLIMEX_STM32_E407/board.h index 91fa5db8a..6a89d9d79 100644 --- a/boards/OLIMEX_STM32_E407/board.h +++ b/boards/OLIMEX_STM32_E407/board.h @@ -62,9 +62,6 @@ #define GPIOA_ETH_RMII_REF_CLK 1 #define GPIOA_ETH_RMII_MDIO 2 #define GPIOA_ETH_RMII_MDINT 3 -#define GPIOA_P4 4 -#define GPIOA_P5 5 -#define GPIOA_P6 6 #define GPIOA_ETH_RMII_CRS_DV 7 #define GPIOA_USB_HS_BUSON 8 #define GPIOA_OTG_FS_VBUS 9 @@ -80,21 +77,16 @@ #define GPIOB_BOOT1 2 #define GPIOB_JTAG_TDO 3 #define GPIOB_JTAG_TRST 4 -#define GPIOB_P5 5 -#define GPIOB_P6 6 -#define GPIOB_P7 7 #define GPIOB_I2C1_SCL 8 #define GPIOB_I2C1_SDA 9 #define GPIOB_SPI2_SCK 10 -#define GPIOB_P11 11 #define GPIOB_USART3_TX 10 /* Same as GPIOB_SPI2_SCK. */ -#define GPIOB_USART3_RX 11 /* Same as GPIOB_P11. */ +#define GPIOB_USART3_RX 11 #define GPIOB_OTG_HS_ID 12 #define GPIOB_OTG_FS_VBUS 13 #define GPIOB_OTG_HS_DM 14 #define GPIOB_OTG_HS_DP 15 -#define GPIOC_P0 0 #define GPIOC_ETH_RMII_MDC 1 #define GPIOC_SPI2_MISO 2 #define GPIOC_SPI2_MOSI 3 @@ -145,14 +137,11 @@ /* * Port A setup. - * + * All input with pull-up except: * PA0 - GPIOA_BUTTON_WKUP (input floating). * PA1 - GPIOA_ETH_RMII_REF_CLK(alternate 11). * PA2 - GPIOA_ETH_RMII_MDIO (alternate 11). * PA3 - GPIOA_ETH_RMII_MDINT (input floating). - * PA4 - GPIOA_P4 (input pull-up). - * PA5 - GPIOA_P5 (input pull-up). - * PA6 - GPIOA_P6 (input pull-up). * PA7 - GPIOA_ETH_RMII_CRS_DV (alternate 11). * PA8 - GPIOA_USB_HS_BUSON (output push-pull). * PA9 - GPIOA_OTG_FS_VBUS (input pull-down). @@ -167,9 +156,9 @@ PIN_MODE_ALTERNATE(GPIOA_ETH_RMII_REF_CLK) | \ PIN_MODE_ALTERNATE(GPIOA_ETH_RMII_MDIO) | \ PIN_MODE_INPUT(GPIOA_ETH_RMII_MDINT) | \ - PIN_MODE_INPUT(GPIOA_P4) | \ - PIN_MODE_INPUT(GPIOA_P5) | \ - PIN_MODE_INPUT(GPIOA_P6) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ PIN_MODE_ALTERNATE(GPIOA_ETH_RMII_CRS_DV) | \ PIN_MODE_OUTPUT(GPIOA_USB_HS_BUSON) | \ PIN_MODE_INPUT(GPIOA_OTG_FS_VBUS) | \ @@ -181,9 +170,9 @@ PIN_MODE_ALTERNATE(GPIOA_JTAG_TDI)) #define VAL_GPIOA_OTYPER 0x00000000 #define VAL_GPIOA_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOA_PUPDR (PIN_PUDR_PULLUP(GPIOA_P4) | \ - PIN_PUDR_PULLUP(GPIOA_P5) | \ - PIN_PUDR_PULLUP(GPIOA_P6) | \ +#define VAL_GPIOA_PUPDR (PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ PIN_PUDR_PULLDOWN(GPIOA_OTG_FS_VBUS) | \ PIN_PUDR_PULLDOWN(GPIOA_SWCLK)) #define VAL_GPIOA_ODR 0xFFFFFFFF @@ -200,19 +189,15 @@ /* * Port B setup. - * + * All input with pull-up except: * PB0 - GPIOB_USB_FS_BUSON (output push-pull). * PB1 - GPIOB_USB_HS_FAULT (input floating). * PB2 - GPIOB_BOOT1 (input floating). * PB3 - GPIOB_JTAG_TDO (alternate 0). * PB4 - GPIOB_JTAG_TRST (alternate 0). - * PB5 - GPIOB_P5 (input pull-up). - * PB6 - GPIOB_P6 (input pull-up). - * PB7 - GPIOB_P7 (input pull-up). * PB8 - GPIOB_I2C1_SCL (alternate 4). * PB9 - GPIOB_I2C1_SDA (alternate 4). * PB10 - GPIOB_SPI2_SCK (alternate 5). - * PB11 - GPIOB_P11 (input pull-up). * PB12 - GPIOB_OTG_HS_ID (alternate 10). * PB13 - GPIOB_OTG_FS_VBUS (input pull-down). * PB14 - GPIOB_OTG_HS_DM (alternate 10). @@ -223,13 +208,13 @@ PIN_MODE_INPUT(GPIOB_BOOT1) | \ PIN_MODE_ALTERNATE(GPIOB_JTAG_TDO) | \ PIN_MODE_INPUT(GPIOB_JTAG_TRST) | \ - PIN_MODE_INPUT(GPIOB_P5) | \ - PIN_MODE_INPUT(GPIOB_P6) | \ - PIN_MODE_INPUT(GPIOB_P7) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \ PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \ PIN_MODE_ALTERNATE(GPIOB_SPI2_SCK) | \ - PIN_MODE_INPUT(GPIOB_P11) | \ + PIN_MODE_INPUT(11) | \ PIN_MODE_ALTERNATE(GPIOB_OTG_HS_ID) | \ PIN_MODE_INPUT(GPIOB_OTG_FS_VBUS) | \ PIN_MODE_ALTERNATE(GPIOB_OTG_HS_DM) | \ @@ -237,10 +222,10 @@ #define VAL_GPIOB_OTYPER (PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \ PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA)) #define VAL_GPIOB_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(GPIOB_P5) | \ - PIN_PUDR_PULLUP(GPIOB_P6) | \ - PIN_PUDR_PULLUP(GPIOB_P7) | \ - PIN_PUDR_PULLUP(GPIOB_P11) | \ +#define VAL_GPIOB_PUPDR (PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(11) | \ PIN_PUDR_PULLDOWN(GPIOB_OTG_FS_VBUS)) #define VAL_GPIOB_ODR 0xFFFFFFFD #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_JTAG_TDO, 0) | \ @@ -255,166 +240,165 @@ /* * Port C setup. * All input with pull-up except: - * PC0 - GPIOC_OTG_FS_POWER_ON (output push-pull). - * PC7 - GPIOC_MCLK (alternate 6). - * PC10 - GPIOC_SCLK (alternate 6). - * PC12 - GPIOC_SDIN (alternate 6). + * PC0 - GPIOC_P0 (input pull-up). + * PC1 - GPIOC_ETH_RMII_MDC (alternate 11). + * PC2 - GPIOC_SPI2_MISO (alternate 5). + * PC3 - GPIOC_SPI2_MOSI (alternate 5). + * PC4 - GPIOC_ETH_RMII_RXD0 (alternate 11). + * PC5 - GPIOC_ETH_RMII_RXD1 (alternate 11). + * PC6 - GPIOC_USART6_TX (alternate 8). + * PC7 - GPIOC_USART6_RX (alternate 8). + * PC8 - GPIOC_SD_D0 (alternate 12). + * PC9 - GPIOC_SD_D1 (alternate 12). + * PC10 - GPIOC_SD_D2 (alternate 12). + * PC11 - GPIOC_SD_D3 (alternate 12). + * PC12 - GPIOC_SD_CLK (alternate 12). + * PC13 - GPIOC_LED (output push-pull). + * PC14 - GPIOC_OSC32_IN (input floating). + * PC15 - GPIOC_OSC32_OUT (input floating). */ -#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ - PIN_MODE_INPUT(1) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOC_OTYPER 0x00000000 -#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOC_PUPDR (PIN_PUDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ - PIN_PUDR_PULLUP(1) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_FLOATING(GPIOC_MCLK) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_FLOATING(GPIOC_SCLK) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_FLOATING(GPIOC_SDIN) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOC_ODR 0xFFFFFFFF -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_MCLK, 6)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SCLK, 6) | \ - PIN_AFIO_AF(GPIOC_SDIN, 6)) +#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_P0) | \ + PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_MDC) | \ + PIN_MODE_ALTERNATE(GPIOC_SPI2_MISO) | \ + PIN_MODE_ALTERNATE(GPIOC_SPI2_MOSI) | \ + PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_RXD0) | \ + PIN_MODE_ALTERNATE(GPIOC_ETH_RMII_RXD1) | \ + PIN_MODE_ALTERNATE(GPIOC_USART6_TX) | \ + PIN_MODE_ALTERNATE(GPIOC_USART6_RX) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D0) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D1) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D2) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_D3) | \ + PIN_MODE_ALTERNATE(GPIOC_SD_CLK) | \ + PIN_MODE_OUTPUT(GPIOC_LED) | \ + PIN_MODE_INPUT(GPIOC_OSC32_IN) | \ + PIN_MODE_INPUT(GPIOC_OSC32_OUT)) +#define VAL_GPIOC_OTYPER 0x00000000 +#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOC_PUPDR (PIN_PUDR_PULLUP(GPIOC_P0)) +#define VAL_GPIOC_ODR 0xFFFFFFFF +#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ETH_RMII_MDC, 11) | \ + PIN_AFIO_AF(GPIOC_SPI2_MISO, 5) | \ + PIN_AFIO_AF(GPIOC_SPI2_MOSI, 5) | \ + PIN_AFIO_AF(GPIOC_ETH_RMII_RXD0, 11) | \ + PIN_AFIO_AF(GPIOC_ETH_RMII_RXD1, 11) | \ + PIN_AFIO_AF(GPIOC_USART6_TX, 8) | \ + PIN_AFIO_AF(GPIOC_USART6_RX, 8)) +#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SD_D0, 12) | \ + PIN_AFIO_AF(GPIOC_SD_D1, 12) | \ + PIN_AFIO_AF(GPIOC_SD_D2, 12) | \ + PIN_AFIO_AF(GPIOC_SD_D3, 12) | \ + PIN_AFIO_AF(GPIOC_SD_CLK, 12)) /* * Port D setup. * All input with pull-up except: - * PD4 - GPIOD_RESET (output push-pull). - * PD5 - GPIOD_OVER_CURRENT (input floating). - * PD12 - GPIOD_LED4 (output push-pull). - * PD13 - GPIOD_LED3 (output push-pull). - * PD14 - GPIOD_LED5 (output push-pull). - * PD15 - GPIOD_LED6 (output push-pull). + * PD2 - GPIOD_SD_CMD (alternate 12). */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(0) | \ - PIN_MODE_INPUT(1) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_OUTPUT(GPIOD_RESET) | \ - PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_OUTPUT(GPIOD_LED4) | \ - PIN_MODE_OUTPUT(GPIOD_LED3) | \ - PIN_MODE_OUTPUT(GPIOD_LED5) | \ - PIN_MODE_OUTPUT(GPIOD_LED6)) -#define VAL_GPIOD_OTYPER 0x00000000 -#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \ - PIN_PUDR_PULLUP(1) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_FLOATING(GPIOD_RESET) | \ - PIN_PUDR_FLOATING(GPIOD_OVER_CURRENT) |\ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_FLOATING(GPIOD_LED4) | \ - PIN_PUDR_FLOATING(GPIOD_LED3) | \ - PIN_PUDR_FLOATING(GPIOD_LED5) | \ - PIN_PUDR_FLOATING(GPIOD_LED6)) -#define VAL_GPIOD_ODR 0x00000FCF -#define VAL_GPIOD_AFRL 0x00000000 -#define VAL_GPIOD_AFRH 0x00000000 +#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(GPIOD_SD_CMD)) +#define VAL_GPIOD_OTYPER 0x00000000 +#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOD_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_FLOATING(GPIOD_SD_CMD) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOD_ODR 0xFFFFFFFF +#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_SD_CMD, 12)) +#define VAL_GPIOD_AFRH 0x00000000 /* * Port E setup. - * All input with pull-up except: - * PE0 - GPIOE_INT1 (input floating). - * PE1 - GPIOE_INT2 (input floating). - * PE3 - GPIOE_CS_SPI (output push-pull). + * All input with pull-up. */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ - PIN_MODE_INPUT(GPIOE_INT2) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_INPUT(12) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOE_OTYPER 0x00000000 -#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOE_PUPDR (PIN_PUDR_FLOATING(GPIOE_INT1) | \ - PIN_PUDR_FLOATING(GPIOE_INT2) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_FLOATING(GPIOE_CS_SPI) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_PULLUP(12) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOE_ODR 0xFFFFFFFF -#define VAL_GPIOE_AFRL 0x00000000 -#define VAL_GPIOE_AFRH 0x00000000 +#define VAL_GPIOE_MODER 0x00000000 +#define VAL_GPIOE_OTYPER 0x00000000 +#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOE_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOE_ODR 0xFFFFFFFF +#define VAL_GPIOE_AFRL 0x00000000 +#define VAL_GPIOE_AFRH 0x00000000 /* * Port F setup. - * All input with pull-up. + * All input with pull-up except: + * PF11 - GPIOF_USB_FS_FAULT (input floating). */ -#define VAL_GPIOF_MODER 0x00000000 -#define VAL_GPIOF_OTYPER 0x00000000 -#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOF_PUPDR 0xFFFFFFFF -#define VAL_GPIOF_ODR 0xFFFFFFFF -#define VAL_GPIOF_AFRL 0x00000000 -#define VAL_GPIOF_AFRH 0x00000000 +#define VAL_GPIOF_MODER 0x00000000 +#define VAL_GPIOF_OTYPER 0x00000000 +#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOF_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_FLOATING(GPIOF_USB_FS_FAULT) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOF_ODR 0xFFFFFFFF +#define VAL_GPIOF_AFRL 0x00000000 +#define VAL_GPIOF_AFRH 0x00000000 /* * Port G setup. * All input with pull-up. */ -#define VAL_GPIOG_MODER 0x00000000 -#define VAL_GPIOG_OTYPER 0x00000000 -#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOG_PUPDR 0xFFFFFFFF -#define VAL_GPIOG_ODR 0xFFFFFFFF -#define VAL_GPIOG_AFRL 0x00000000 -#define VAL_GPIOG_AFRH 0x00000000 +#define VAL_GPIOG_MODER 0x00000000 +#define VAL_GPIOG_OTYPER 0x00000000 +#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOG_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOG_ODR 0xFFFFFFFF +#define VAL_GPIOG_AFRL 0x00000000 +#define VAL_GPIOG_AFRH 0x00000000 /* * Port H setup. @@ -422,55 +406,70 @@ * PH0 - GPIOH_OSC_IN (input floating). * PH1 - GPIOH_OSC_OUT (input floating). */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ - PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ - PIN_MODE_INPUT(2) | \ - PIN_MODE_INPUT(3) | \ - PIN_MODE_INPUT(4) | \ - PIN_MODE_INPUT(5) | \ - PIN_MODE_INPUT(6) | \ - PIN_MODE_INPUT(7) | \ - PIN_MODE_INPUT(8) | \ - PIN_MODE_INPUT(9) | \ - PIN_MODE_INPUT(10) | \ - PIN_MODE_INPUT(11) | \ - PIN_MODE_INPUT(12) | \ - PIN_MODE_INPUT(13) | \ - PIN_MODE_INPUT(14) | \ - PIN_MODE_INPUT(15)) -#define VAL_GPIOH_OTYPER 0x00000000 -#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \ - PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \ - PIN_PUDR_PULLUP(2) | \ - PIN_PUDR_PULLUP(3) | \ - PIN_PUDR_PULLUP(4) | \ - PIN_PUDR_PULLUP(5) | \ - PIN_PUDR_PULLUP(6) | \ - PIN_PUDR_PULLUP(7) | \ - PIN_PUDR_PULLUP(8) | \ - PIN_PUDR_PULLUP(9) | \ - PIN_PUDR_PULLUP(10) | \ - PIN_PUDR_PULLUP(11) | \ - PIN_PUDR_PULLUP(12) | \ - PIN_PUDR_PULLUP(13) | \ - PIN_PUDR_PULLUP(14) | \ - PIN_PUDR_PULLUP(15)) -#define VAL_GPIOH_ODR 0xFFFFFFFF -#define VAL_GPIOH_AFRL 0x00000000 -#define VAL_GPIOH_AFRH 0x00000000 +#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ + PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ + PIN_MODE_INPUT(2) | \ + PIN_MODE_INPUT(3) | \ + PIN_MODE_INPUT(4) | \ + PIN_MODE_INPUT(5) | \ + PIN_MODE_INPUT(6) | \ + PIN_MODE_INPUT(7) | \ + PIN_MODE_INPUT(8) | \ + PIN_MODE_INPUT(9) | \ + PIN_MODE_INPUT(10) | \ + PIN_MODE_INPUT(11) | \ + PIN_MODE_INPUT(12) | \ + PIN_MODE_INPUT(13) | \ + PIN_MODE_INPUT(14) | \ + PIN_MODE_INPUT(15)) +#define VAL_GPIOH_OTYPER 0x00000000 +#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \ + PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOH_ODR 0xFFFFFFFF +#define VAL_GPIOH_AFRL 0x00000000 +#define VAL_GPIOH_AFRH 0x00000000 /* * Port I setup. * All input with pull-up. */ -#define VAL_GPIOI_MODER 0x00000000 -#define VAL_GPIOI_OTYPER 0x00000000 -#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF -#define VAL_GPIOI_PUPDR 0xFFFFFFFF -#define VAL_GPIOI_ODR 0xFFFFFFFF -#define VAL_GPIOI_AFRL 0x00000000 -#define VAL_GPIOI_AFRH 0x00000000 +#define VAL_GPIOI_MODER 0x00000000 +#define VAL_GPIOI_OTYPER 0x00000000 +#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF +#define VAL_GPIOI_PUPDR (PIN_PUDR_PULLUP(0) | \ + PIN_PUDR_PULLUP(1) | \ + PIN_PUDR_PULLUP(2) | \ + PIN_PUDR_PULLUP(3) | \ + PIN_PUDR_PULLUP(4) | \ + PIN_PUDR_PULLUP(5) | \ + PIN_PUDR_PULLUP(6) | \ + PIN_PUDR_PULLUP(7) | \ + PIN_PUDR_PULLUP(8) | \ + PIN_PUDR_PULLUP(9) | \ + PIN_PUDR_PULLUP(10) | \ + PIN_PUDR_PULLUP(11) | \ + PIN_PUDR_PULLUP(12) | \ + PIN_PUDR_PULLUP(13) | \ + PIN_PUDR_PULLUP(14) | \ + PIN_PUDR_PULLUP(15)) +#define VAL_GPIOI_ODR 0xFFFFFFFF +#define VAL_GPIOI_AFRL 0x00000000 +#define VAL_GPIOI_AFRH 0x00000000 #if !defined(_FROM_ASM_) #ifdef __cplusplus -- cgit v1.2.3