From f8f2ea1763d1494c0f51fe941e4ee324eeb0a572 Mon Sep 17 00:00:00 2001
From: Giovanni Di Sirio <gdisirio@gmail.com>
Date: Sat, 4 Jun 2016 08:28:16 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9567
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 os/ex/Micron/m25q.c                             | 43 +++++++++++++++----------
 os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h |  2 +-
 testhal/STM32/STM32L4xx/QSPI-N25Q128/main.c     | 14 ++++++++
 3 files changed, 41 insertions(+), 18 deletions(-)

diff --git a/os/ex/Micron/m25q.c b/os/ex/Micron/m25q.c
index a8a226c7d..21ff90061 100644
--- a/os/ex/Micron/m25q.c
+++ b/os/ex/Micron/m25q.c
@@ -453,30 +453,38 @@ static void flash_cmd_addr_dummy_receive(M25QDriver *devp,
 }
 
 void flash_reset_xip(M25QDriver *devp) {
+  static const uint8_t flash_conf[1] = {
+    (M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU
+  };
   qspi_command_t cmd;
   uint8_t buf[1];
 
   /* Resetting XIP mode by reading one byte without XIP confirmation bit.*/
-  cmd.cfg = QSPI_CFG_CMD(M25Q_CMD_FAST_READ) |
-            QSPI_CFG_ADDR_SIZE_24 |
+  cmd.alt  = 0xFF;
+  cmd.addr = 0;
+  cmd.cfg  = QSPI_CFG_CMD_MODE_NONE |
+             QSPI_CFG_ADDR_SIZE_24 |
 #if M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI1L
-            QSPI_CFG_CMD_MODE_ONE_LINE |
-            QSPI_CFG_ADDR_MODE_ONE_LINE |
-            QSPI_CFG_DATA_MODE_ONE_LINE |
+             QSPI_CFG_ADDR_MODE_ONE_LINE |
+             QSPI_CFG_DATA_MODE_ONE_LINE |
 #elif M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI2L
-            QSPI_CFG_CMD_MODE_TWO_LINES |
-            QSPI_CFG_ADDR_MODE_TWO_LINES |
-            QSPI_CFG_DATA_MODE_TWO_LINES |
+             QSPI_CFG_ADDR_MODE_TWO_LINES |
+             QSPI_CFG_DATA_MODE_TWO_LINES |
 #else
-            QSPI_CFG_CMD_MODE_FOUR_LINES |
-            QSPI_CFG_ADDR_MODE_FOUR_LINES |
-            QSPI_CFG_DATA_MODE_FOUR_LINES |
+             QSPI_CFG_ADDR_MODE_FOUR_LINES |
+             QSPI_CFG_DATA_MODE_FOUR_LINES |
 #endif
-            QSPI_CFG_ALT_MODE_FOUR_LINES |  /* Always 4 lines, note.*/
-            QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2);
-  cmd.alt = 0xFF;
-  cmd.addr = 0;
+             QSPI_CFG_ALT_MODE_FOUR_LINES |  /* Always 4 lines, note.*/
+             QSPI_CFG_ALT_SIZE_8 |
+             QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2);
   qspiReceive(devp->config->qspip, &cmd, 1, buf);
+
+  /* Enabling write operation.*/
+  flash_cmd(devp, M25Q_CMD_WRITE_ENABLE);
+
+  /* Rewriting volatile configuration register.*/
+  flash_cmd_send(devp, M25Q_CMD_WRITE_V_CONF_REGISTER, 1, flash_conf);
+
 }
 
 void flash_reset_memory(M25QDriver *devp) {
@@ -970,14 +978,14 @@ void m25qStart(M25QDriver *devp, const M25QConfig *config) {
 
 #if (M25Q_BUS_MODE != M25Q_BUS_MODE_SPI)
     {
-      static const uint8_t flash_status[1] = {
+      static const uint8_t flash_conf[1] = {
         (M25Q_READ_DUMMY_CYCLES << 4U) | 0x0FU
       };
 
       /* Setting up the dummy cycles to be used for fast read operations.*/
       flash_cmd(devp, M25Q_CMD_WRITE_ENABLE);
       flash_cmd_send(devp, M25Q_CMD_WRITE_V_CONF_REGISTER,
-                     1, flash_status);
+                     1, flash_conf);
     }
 #endif
 
@@ -1067,6 +1075,7 @@ void m25qMemoryMap(M25QDriver *devp, uint8_t **addrp) {
             QSPI_CFG_DATA_MODE_FOUR_LINES |
 #endif
             QSPI_CFG_ALT_MODE_FOUR_LINES |  /* Always 4 lines, note.*/
+            QSPI_CFG_ALT_SIZE_8 |
             QSPI_CFG_SIOO |
             QSPI_CFG_DUMMY_CYCLES(M25Q_READ_DUMMY_CYCLES - 2);
 
diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h
index 8e3acfa57..4fdb6ba14 100644
--- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h
+++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.h
@@ -73,7 +73,7 @@
  *          find the details in the data sheet.
  */
 #if !defined(STM32_QSPI_QUADSPI1_PRESCALER_VALUE) || defined(__DOXYGEN__)
-#define STM32_QSPI_QUADSPI1_PRESCALER_VALUE 4
+#define STM32_QSPI_QUADSPI1_PRESCALER_VALUE 16
 #endif
 
 /**
diff --git a/testhal/STM32/STM32L4xx/QSPI-N25Q128/main.c b/testhal/STM32/STM32L4xx/QSPI-N25Q128/main.c
index 08e82a9ea..ffac546d2 100644
--- a/testhal/STM32/STM32L4xx/QSPI-N25Q128/main.c
+++ b/testhal/STM32/STM32L4xx/QSPI-N25Q128/main.c
@@ -14,6 +14,8 @@
     limitations under the License.
 */
 
+#include <string.h>
+
 #include "ch.h"
 #include "hal.h"
 
@@ -107,6 +109,11 @@ int main(void) {
   m25qObjectInit(&m25q);
   m25qStart(&m25q, &m25qcfg1);
 
+  /* Reading.*/
+  err = flashRead(&m25q, 0, buffer, 128);
+  if (err != FLASH_NO_ERROR)
+    chSysHalt("read error");
+
   /* Erasing the first sector and waiting for completion.*/
   (void) flashStartEraseSector(&m25q, 0);
   err = flashWaitErase((BaseFlash *)&m25q);
@@ -135,6 +142,13 @@ int main(void) {
   m25qMemoryUnmap(&m25q);
 
   /* Reading it back.*/
+  memset(buffer, 0, 128);
+  err = flashRead(&m25q, 16, buffer, 128);
+  if (err != FLASH_NO_ERROR)
+    chSysHalt("read error");
+
+  /* Reading it back.*/
+  memset(buffer, 0, 128);
   err = flashRead(&m25q, 0, buffer, 128);
   if (err != FLASH_NO_ERROR)
     chSysHalt("read error");
-- 
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