From f85a97a786a176d088f807d3de4a2ec93030ef8e Mon Sep 17 00:00:00 2001
From: gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>
Date: Thu, 6 Jun 2013 14:11:29 +0000
Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5817
 35acf78f-673a-0410-8e92-d51de3d6d3f4

---
 boards/ST_EVB_SPC564A/board.h                 |  2 +-
 os/hal/platforms/SPC564Axx/hal_lld.c          | 16 ++++++++++++++++
 os/hal/platforms/SPC564Axx/spc564a_registry.h | 20 +++++++++++++++++---
 testhal/SPC564Axx/SPI/Makefile                |  2 +-
 4 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/boards/ST_EVB_SPC564A/board.h b/boards/ST_EVB_SPC564A/board.h
index eab337464..67084dd79 100644
--- a/boards/ST_EVB_SPC564A/board.h
+++ b/boards/ST_EVB_SPC564A/board.h
@@ -18,7 +18,7 @@
 #define _BOARD_H_
 
 /*
- * Setup for a generic SPC563Mxx proto board.
+ * Setup for a generic SPC564Axx proto board.
  */
 
 /*
diff --git a/os/hal/platforms/SPC564Axx/hal_lld.c b/os/hal/platforms/SPC564Axx/hal_lld.c
index 908f06249..7d87468ec 100644
--- a/os/hal/platforms/SPC564Axx/hal_lld.c
+++ b/os/hal/platforms/SPC564Axx/hal_lld.c
@@ -60,6 +60,7 @@ void hal_lld_init(void) {
   /* The DMA priority is placed above the CPU priority in order to not
      starve I/O activities while the CPU is executing tight loops (FLASH
      and SRAM slave ports only).*/
+#if !defined(_SPC564A70_)
   XBAR.MPR0.R = 0x34000021;             /* Flash slave port priorities:
                                             eDMA (4):              0 (highest)
                                             Core Instructions (0): 1
@@ -72,6 +73,18 @@ void hal_lld_init(void) {
                                             Core Data (1):         2
                                             EBI (7):               3
                                             FlexRay (6):           4        */
+#else /* defined(_SPC564A70_) */
+  XBAR.MPR0.R = 0x03000021;             /* Flash slave port priorities:
+                                            eDMA (4):              0 (highest)
+                                            Core Instructions (0): 1
+                                            Core Data (1):         2
+                                            Flexray (6):           3        */
+  XBAR.MPR2.R = 0x03000021;             /* SRAM slave port priorities:
+                                            eDMA (4):              0 (highest)
+                                            Core Instructions (0): 1
+                                            Core Data (1):         2
+                                            FlexRay (6):           3        */
+#endif /* defined(_SPC564A70_) */
 
   /* Decrementer timer initialized for system tick use, note, it is
      initialized here because in the OSAL layer the system clock frequency
@@ -109,8 +122,11 @@ void spc_clock_init(void) {
   ECSM.MUDCR.R = SPC5_RAM_WS;
   FLASH_A.BIUCR.R  = SPC5_FLASH_BIUCR | SPC5_FLASH_WS;
   FLASH_A.BIUCR2.R = 0;
+#if !defined(_SPC564A70_)
+  /* The second controller is only present in Andorra 3M or 4M.*/
   FLASH_B.BIUCR.R  = SPC5_FLASH_BIUCR | SPC5_FLASH_WS;
   FLASH_B.BIUCR2.R = 0;
+#endif /* !defined(_SPC564A70_) */
 
 #if !SPC5_NO_INIT
   /* PLL activation.*/
diff --git a/os/hal/platforms/SPC564Axx/spc564a_registry.h b/os/hal/platforms/SPC564Axx/spc564a_registry.h
index 5002b9ac7..578b658ed 100644
--- a/os/hal/platforms/SPC564Axx/spc564a_registry.h
+++ b/os/hal/platforms/SPC564Axx/spc564a_registry.h
@@ -22,8 +22,22 @@
  * @{
  */
 
-#ifndef _SPC563M_REGISTRY_H_
-#define _SPC563M_REGISTRY_H_
+#ifndef _SPC564A_REGISTRY_H_
+#define _SPC564A_REGISTRY_H_
+
+/*===========================================================================*/
+/* Derived constants and error checks.                                       */
+/*===========================================================================*/
+
+#if defined(_SPC564A70B4_) || defined(_SPC564A70L7_)
+#define _SPC564A70_
+#elif defined(_SPC564A74B4_) || defined(_SPC564A74L7_)
+#define _SPC564A74_
+#elif defined(_SPC564A80B4_) || defined(_SPC564A80L7_)
+#define _SPC564A80_
+#else
+#error "SPC564Axx platform not defined"
+#endif
 
 /*===========================================================================*/
 /* Platform capabilities.                                                    */
@@ -152,6 +166,6 @@
 #define SPC5_EMIOS_DISABLE_CLOCK()
 /** @} */
 
-#endif /* _SPC563M_REGISTRY_H_ */
+#endif /* _SPC564A_REGISTRY_H_ */
 
 /** @} */
diff --git a/testhal/SPC564Axx/SPI/Makefile b/testhal/SPC564Axx/SPI/Makefile
index 18a43ea55..200b9191d 100644
--- a/testhal/SPC564Axx/SPI/Makefile
+++ b/testhal/SPC564Axx/SPI/Makefile
@@ -147,7 +147,7 @@ DLIBS =
 #
 
 # List all user C define here, like -D_DEBUG=1
-UDEFS =
+UDEFS = -D_SPC564A70L7_
 
 # Define ASM defines here
 UADEFS =
-- 
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