From e8cd09482172ce6ef2bc4e56f6258f3747ad06cc Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 22 Oct 2015 13:07:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8378 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h | 4 +- ...32F091RC-NUCLEO (OpenOCD, Flash and Run).launch | 6 +-- demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h | 51 +++++++++++++++++++++- os/hal/boards/ST_NUCLEO_F030R8/board.h | 32 +++++++------- os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg | 12 ++--- os/hal/boards/ST_NUCLEO_F091RC/board.h | 40 ++++++++--------- os/hal/boards/ST_NUCLEO_F091RC/cfg/board.chcfg | 16 +++---- os/hal/boards/ST_NUCLEO_F302R8/cfg/board.chcfg | 12 ++--- os/hal/boards/ST_NUCLEO_F334R8/board.h | 32 +++++++------- os/hal/boards/ST_NUCLEO_F334R8/cfg/board.chcfg | 12 ++--- os/hal/boards/ST_NUCLEO_L053R8/cfg/board.chcfg | 4 +- os/hal/boards/ST_NUCLEO_L152RE/board.h | 32 +++++++------- os/hal/boards/ST_NUCLEO_L152RE/cfg/board.chcfg | 12 ++--- 13 files changed, 157 insertions(+), 108 deletions(-) diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h b/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h index 3efdfc677..b92ecea4b 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/chconf.h @@ -39,14 +39,14 @@ * @brief System time counter resolution. * @note Allowed values are 16 or 32 bits. */ -#define CH_CFG_ST_RESOLUTION 16 +#define CH_CFG_ST_RESOLUTION 32 /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ -#define CH_CFG_ST_FREQUENCY 1000 +#define CH_CFG_ST_FREQUENCY 10000 /** * @brief Time delta constant for the tick-less mode. diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch b/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch index 0a8beb859..42557a089 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/debug/RT-STM32F091RC-NUCLEO (OpenOCD, Flash and Run).launch @@ -1,6 +1,6 @@ - + @@ -37,11 +37,11 @@ - + - + diff --git a/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h b/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h index 73a87484f..f81a23857 100644 --- a/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h +++ b/demos/STM32/RT-STM32F091RC-NUCLEO/mcuconf.h @@ -41,6 +41,7 @@ #define STM32_PLS STM32_PLS_LEV0 #define STM32_HSI_ENABLED TRUE #define STM32_HSI14_ENABLED TRUE +#define STM32_HSI48_ENABLED FALSE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE @@ -78,9 +79,11 @@ * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 #define STM32_GPT_TIM14_IRQ_PRIORITY 2 @@ -105,8 +108,10 @@ * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* @@ -114,8 +119,10 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 #define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* @@ -123,8 +130,20 @@ */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USE_UART7 FALSE +#define STM32_SERIAL_USE_UART8 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 +#define STM32_SERIAL_USART3_PRIORITY 3 +#define STM32_SERIAL_UART4_PRIORITY 3 +#define STM32_SERIAL_UART5_PRIORITY 3 +#define STM32_SERIAL_USART6_PRIORITY 3 +#define STM32_SERIAL_UART7_PRIORITY 3 +#define STM32_SERIAL_UART8_PRIORITY 3 /* * SPI driver system settings. @@ -145,21 +164,51 @@ * ST driver system settings. */ #define STM32_ST_IRQ_PRIORITY 2 -#define STM32_ST_USE_TIMER 3 +#define STM32_ST_USE_TIMER 2 /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USE_UART7 FALSE +#define STM32_UART_USE_UART8 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART3_IRQ_PRIORITY 3 +#define STM32_UART_UART4_IRQ_PRIORITY 3 +#define STM32_UART_UART5_IRQ_PRIORITY 3 +#define STM32_UART_USART6_IRQ_PRIORITY 3 +#define STM32_UART_UART7_IRQ_PRIORITY 3 +#define STM32_UART_UART8_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_UART7_DMA_PRIORITY 0 +#define STM32_UART_UART8_DMA_PRIORITY 0 #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART7_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") #endif /* _MCUCONF_H_ */ diff --git a/os/hal/boards/ST_NUCLEO_F030R8/board.h b/os/hal/boards/ST_NUCLEO_F030R8/board.h index 2ac6df7ac..06a17ae33 100644 --- a/os/hal/boards/ST_NUCLEO_F030R8/board.h +++ b/os/hal/boards/ST_NUCLEO_F030R8/board.h @@ -63,8 +63,8 @@ #define GPIOA_PIN8 8U #define GPIOA_PIN9 9U #define GPIOA_PIN10 10U -#define GPIOA_OTG_FS_DM 11U -#define GPIOA_OTG_FS_DP 12U +#define GPIOA_PIN11 11U +#define GPIOA_PIN12 12U #define GPIOA_SWDIO 13U #define GPIOA_SWCLK 14U #define GPIOA_PIN15 15U @@ -172,8 +172,8 @@ * PA8 - PIN8 (input pullup). * PA9 - PIN9 (input pullup). * PA10 - PIN10 (input pullup). - * PA11 - OTG_FS_DM (alternate 10). - * PA12 - OTG_FS_DP (alternate 10). + * PA11 - PIN11 (input floating). + * PA12 - PIN12 (input floating). * PA13 - SWDIO (alternate 0). * PA14 - SWCLK (alternate 0). * PA15 - PIN15 (input pullup). @@ -189,8 +189,8 @@ PIN_MODE_INPUT(GPIOA_PIN8) | \ PIN_MODE_INPUT(GPIOA_PIN9) | \ PIN_MODE_INPUT(GPIOA_PIN10) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ + PIN_MODE_INPUT(GPIOA_PIN11) | \ + PIN_MODE_INPUT(GPIOA_PIN12) | \ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ PIN_MODE_INPUT(GPIOA_PIN15)) @@ -205,8 +205,8 @@ PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN11) | \ + PIN_OTYPE_PUSHPULL(GPIOA_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) @@ -221,8 +221,8 @@ PIN_OSPEED_40M(GPIOA_PIN8) | \ PIN_OSPEED_40M(GPIOA_PIN9) | \ PIN_OSPEED_40M(GPIOA_PIN10) | \ - PIN_OSPEED_40M(GPIOA_OTG_FS_DM) | \ - PIN_OSPEED_40M(GPIOA_OTG_FS_DP) | \ + PIN_OSPEED_40M(GPIOA_PIN11) | \ + PIN_OSPEED_40M(GPIOA_PIN12) | \ PIN_OSPEED_40M(GPIOA_SWDIO) | \ PIN_OSPEED_40M(GPIOA_SWCLK) | \ PIN_OSPEED_40M(GPIOA_PIN15)) @@ -237,8 +237,8 @@ PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ PIN_PUPDR_PULLUP(GPIOA_PIN9) | \ PIN_PUPDR_PULLUP(GPIOA_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN11) | \ + PIN_PUPDR_FLOATING(GPIOA_PIN12) | \ PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \ PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \ PIN_PUPDR_PULLUP(GPIOA_PIN15)) @@ -253,8 +253,8 @@ PIN_ODR_HIGH(GPIOA_PIN8) | \ PIN_ODR_HIGH(GPIOA_PIN9) | \ PIN_ODR_HIGH(GPIOA_PIN10) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ + PIN_ODR_HIGH(GPIOA_PIN11) | \ + PIN_ODR_HIGH(GPIOA_PIN12) | \ PIN_ODR_HIGH(GPIOA_SWDIO) | \ PIN_ODR_HIGH(GPIOA_SWCLK) | \ PIN_ODR_HIGH(GPIOA_PIN15)) @@ -269,8 +269,8 @@ #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ PIN_AFIO_AF(GPIOA_PIN9, 0) | \ PIN_AFIO_AF(GPIOA_PIN10, 0) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ + PIN_AFIO_AF(GPIOA_PIN11, 0) | \ + PIN_AFIO_AF(GPIOA_PIN12, 0) | \ PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ PIN_AFIO_AF(GPIOA_PIN15, 0)) diff --git a/os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg b/os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg index a6a3e54cf..07159eb5b 100644 --- a/os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg +++ b/os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg @@ -105,21 +105,21 @@ Mode="Input" Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Alternate="1" /> + Alternate="1" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" /> + Mode="Input" + Alternate="0" />