From d5f443f74d551831ef4f93c043f70b53d9b1008b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 6 Feb 2009 22:07:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@732 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARM7-AT91SAM7X-GCC/board.c | 2 +- demos/ARM7-AT91SAM7X-WEB-GCC/board.c | 4 ++-- demos/ARM7-LPC214x-G++/board.c | 6 +++--- demos/ARM7-LPC214x-GCC-minimal/board.c | 6 +++--- demos/ARM7-LPC214x-GCC/board.c | 6 +++--- demos/ARM7-LPC214x-GCC/mmcsd.c | 4 ++-- demos/ARMCM3-STM32F103-GCC/board.c | 2 +- demos/MSP430-MSP430x1611-GCC/board.c | 2 +- ports/ARM7-AT91SAM7X/sam7x_emac.c | 2 +- ports/ARM7-AT91SAM7X/sam7x_emac.h | 2 +- ports/ARM7-AT91SAM7X/sam7x_serial.c | 30 +++++++++++++++--------------- ports/ARM7-AT91SAM7X/sam7x_serial.h | 8 ++++---- ports/ARM7-LPC214x/lpc214x_serial.c | 32 ++++++++++++++++---------------- ports/ARM7-LPC214x/lpc214x_serial.h | 12 ++++++------ ports/ARM7-LPC214x/lpc214x_ssp.c | 6 +++--- ports/ARM7-LPC214x/lpc214x_ssp.h | 4 ++-- ports/ARM7-LPC214x/vic.c | 2 +- ports/ARM7-LPC214x/vic.h | 2 +- ports/ARMCM3-STM32F103/stm32_serial.c | 18 +++++++++--------- ports/ARMCM3-STM32F103/stm32_serial.h | 10 +++++----- ports/MSP430/msp430_serial.c | 10 +++++----- ports/MSP430/msp430_serial.h | 17 ++++++++++++++--- 22 files changed, 99 insertions(+), 88 deletions(-) diff --git a/demos/ARM7-AT91SAM7X-GCC/board.c b/demos/ARM7-AT91SAM7X-GCC/board.c index 18f548c92..ba64e335e 100644 --- a/demos/ARM7-AT91SAM7X-GCC/board.c +++ b/demos/ARM7-AT91SAM7X-GCC/board.c @@ -155,7 +155,7 @@ void hwinit1(void) { /* * Serial driver initialization, RTS/CTS pins enabled for USART0 only. */ - sam7x_serial_init(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2); + serial_init(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2); AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0; AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4; AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4; diff --git a/demos/ARM7-AT91SAM7X-WEB-GCC/board.c b/demos/ARM7-AT91SAM7X-WEB-GCC/board.c index b5e1ca70a..5f49016e0 100644 --- a/demos/ARM7-AT91SAM7X-WEB-GCC/board.c +++ b/demos/ARM7-AT91SAM7X-WEB-GCC/board.c @@ -156,7 +156,7 @@ void hwinit1(void) { /* * Serial driver initialization, RTS/CTS pins enabled for USART0 only. */ - sam7x_serial_init(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2); + serial_init(AT91C_AIC_PRIOR_HIGHEST - 2, AT91C_AIC_PRIOR_HIGHEST - 2); AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0; AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4; AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4; @@ -164,7 +164,7 @@ void hwinit1(void) { /* * EMAC driver initialization. */ - sam7x_emac_init(AT91C_AIC_PRIOR_HIGHEST - 3); + emac_init(AT91C_AIC_PRIOR_HIGHEST - 3); /* * ChibiOS/RT initialization. diff --git a/demos/ARM7-LPC214x-G++/board.c b/demos/ARM7-LPC214x-G++/board.c index 93227e0ed..0e54eeb71 100644 --- a/demos/ARM7-LPC214x-G++/board.c +++ b/demos/ARM7-LPC214x-G++/board.c @@ -119,7 +119,7 @@ void hwinit1(void) { /* * Interrupt vectors assignment. */ - lpc214x_vic_init(); + vic_init(); VICDefVectAddr = (IOREG32)IrqHandler; /* @@ -137,8 +137,8 @@ void hwinit1(void) { /* * Other subsystems. */ - lpc2148x_serial_init(1, 2); -// lpc214x_ssp_init(); + serial_init(1, 2); +// ssp_init(); // InitMMC(); // InitBuzzer(); diff --git a/demos/ARM7-LPC214x-GCC-minimal/board.c b/demos/ARM7-LPC214x-GCC-minimal/board.c index 76e4c7eb8..e34bb3c55 100644 --- a/demos/ARM7-LPC214x-GCC-minimal/board.c +++ b/demos/ARM7-LPC214x-GCC-minimal/board.c @@ -119,7 +119,7 @@ void hwinit1(void) { /* * Interrupt vectors assignment. */ - lpc214x_vic_init(); + vic_init(); VICDefVectAddr = (IOREG32)IrqHandler; /* @@ -137,8 +137,8 @@ void hwinit1(void) { /* * Other subsystems. */ -// lpc2148x_serial_init(1, 2); -// lpc214x_ssp_init(); +// serial_init(1, 2); +// ssp_init(); // InitMMC(); // InitBuzzer(); diff --git a/demos/ARM7-LPC214x-GCC/board.c b/demos/ARM7-LPC214x-GCC/board.c index 9d6d77fc7..69aed08f3 100644 --- a/demos/ARM7-LPC214x-GCC/board.c +++ b/demos/ARM7-LPC214x-GCC/board.c @@ -119,7 +119,7 @@ void hwinit1(void) { /* * Interrupt vectors assignment. */ - lpc214x_vic_init(); + vic_init(); VICDefVectAddr = (IOREG32)IrqHandler; /* @@ -137,8 +137,8 @@ void hwinit1(void) { /* * Other subsystems. */ - lpc2148x_serial_init(1, 2); - lpc214x_ssp_init(); + serial_init(1, 2); + ssp_init(); InitMMC(); InitBuzzer(); diff --git a/demos/ARM7-LPC214x-GCC/mmcsd.c b/demos/ARM7-LPC214x-GCC/mmcsd.c index 10e6c6c5b..292b450d5 100644 --- a/demos/ARM7-LPC214x-GCC/mmcsd.c +++ b/demos/ARM7-LPC214x-GCC/mmcsd.c @@ -167,7 +167,7 @@ bool_t mmcInit(void) { /* * Starting initialization with slow clock mode. */ - lpc214x_ssp_setup(254, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0); + ssp_setup(254, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0); /* * SPI mode selection. @@ -200,7 +200,7 @@ bool_t mmcInit(void) { /* * Full speed. */ - lpc214x_ssp_setup(2, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0); + ssp_setup(2, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0); return FALSE; } diff --git a/demos/ARMCM3-STM32F103-GCC/board.c b/demos/ARMCM3-STM32F103-GCC/board.c index c545728ec..d3e776d1a 100644 --- a/demos/ARMCM3-STM32F103-GCC/board.c +++ b/demos/ARMCM3-STM32F103-GCC/board.c @@ -104,7 +104,7 @@ void hwinit1(void) { /* * Other subsystems initialization. */ - stm32_serial_init(0xC0, 0xC0, 0xC0); + serial_init(0xC0, 0xC0, 0xC0); /* * ChibiOS/RT initialization. diff --git a/demos/MSP430-MSP430x1611-GCC/board.c b/demos/MSP430-MSP430x1611-GCC/board.c index de9ac6387..794070803 100644 --- a/demos/MSP430-MSP430x1611-GCC/board.c +++ b/demos/MSP430-MSP430x1611-GCC/board.c @@ -82,7 +82,7 @@ void hwinit(void) { /* * Other subsystems. */ - msp430_serial_init(); + serial_init(); } CH_IRQ_HANDLER(TIMERA0_VECTOR) { diff --git a/ports/ARM7-AT91SAM7X/sam7x_emac.c b/ports/ARM7-AT91SAM7X/sam7x_emac.c index 821864fab..b1c0d76b3 100644 --- a/ports/ARM7-AT91SAM7X/sam7x_emac.c +++ b/ports/ARM7-AT91SAM7X/sam7x_emac.c @@ -140,7 +140,7 @@ CH_IRQ_HANDLER(EMACIrqHandler) { /* * EMAC subsystem initialization. */ -void sam7x_emac_init(int prio) { +void emac_init(int prio) { int i; /* diff --git a/ports/ARM7-AT91SAM7X/sam7x_emac.h b/ports/ARM7-AT91SAM7X/sam7x_emac.h index cc0512b26..d666ea6ef 100644 --- a/ports/ARM7-AT91SAM7X/sam7x_emac.h +++ b/ports/ARM7-AT91SAM7X/sam7x_emac.h @@ -76,7 +76,7 @@ typedef struct { #ifdef __cplusplus extern "C" { #endif - void sam7x_emac_init(int prio); + void emac_init(int prio); void EMACSetAddress(const uint8_t *eaddr); bool_t EMACGetLinkStatus(void); BufDescriptorEntry *EMACGetTransmitBuffer(void); diff --git a/ports/ARM7-AT91SAM7X/sam7x_serial.c b/ports/ARM7-AT91SAM7X/sam7x_serial.c index 6b904225a..632270375 100644 --- a/ports/ARM7-AT91SAM7X/sam7x_serial.c +++ b/ports/ARM7-AT91SAM7X/sam7x_serial.c @@ -126,14 +126,14 @@ static void OutNotify2(void) { #endif /** - * @brief UART setup. + * @brief USART setup. * @param[in] u pointer to an UART I/O block * @param[in] speed serial port speed in bits per second * @param[in] mr the value for the @p MR register * @note Must be invoked with interrupts disabled. * @note Does not reset the I/O queues. */ -void sam7x_set_usart(AT91PS_USART u, int speed, int mr) { +void usart_setup(AT91PS_USART u, int speed, int mr) { /* Disables IRQ sources and stop operations.*/ u->US_IDR = 0xFFFFFFFF; @@ -162,7 +162,7 @@ void sam7x_set_usart(AT91PS_USART u, int speed, int mr) { * may have another use, enable them externally if needed. * RX and TX pads are handled inside. */ -void sam7x_serial_init(int prio0, int prio1) { +void serial_init(int prio0, int prio1) { #if USE_SAM7X_USART0 || defined(__DOXYGEN__) /* I/O queue setup.*/ @@ -184,12 +184,12 @@ void sam7x_serial_init(int prio0, int prio1) { AIC_EnableIT(AT91C_ID_US0); /* Default parameters.*/ - sam7x_set_usart(AT91C_BASE_US0, SAM7X_USART_BITRATE, - AT91C_US_USMODE_NORMAL | - AT91C_US_CLKS_CLOCK | - AT91C_US_CHRL_8_BITS | - AT91C_US_PAR_NONE | - AT91C_US_NBSTOP_1_BIT); + usart_setup(AT91C_BASE_US0, DEFAULT_USART_BITRATE, + AT91C_US_USMODE_NORMAL | + AT91C_US_CLKS_CLOCK | + AT91C_US_CHRL_8_BITS | + AT91C_US_PAR_NONE | + AT91C_US_NBSTOP_1_BIT); #endif #if USE_SAM7X_USART1 || defined(__DOXYGEN__) @@ -212,12 +212,12 @@ void sam7x_serial_init(int prio0, int prio1) { AIC_EnableIT(AT91C_ID_US1); /* Default parameters.*/ - sam7x_set_usart(AT91C_BASE_US1, SAM7X_USART_BITRATE, - AT91C_US_USMODE_NORMAL | - AT91C_US_CLKS_CLOCK | - AT91C_US_CHRL_8_BITS | - AT91C_US_PAR_NONE | - AT91C_US_NBSTOP_1_BIT); + usart_setup(AT91C_BASE_US1, DEFAULT_USART_BITRATE, + AT91C_US_USMODE_NORMAL | + AT91C_US_CLKS_CLOCK | + AT91C_US_CHRL_8_BITS | + AT91C_US_PAR_NONE | + AT91C_US_NBSTOP_1_BIT); #endif } diff --git a/ports/ARM7-AT91SAM7X/sam7x_serial.h b/ports/ARM7-AT91SAM7X/sam7x_serial.h index 21db13635..1652ab69f 100644 --- a/ports/ARM7-AT91SAM7X/sam7x_serial.h +++ b/ports/ARM7-AT91SAM7X/sam7x_serial.h @@ -44,8 +44,8 @@ * @note It is possible to use @p SetUART() in order to change the working * parameters at runtime. */ -#if !defined(SAM7X_USART_BITRATE) || defined(__DOXYGEN__) -#define SAM7X_USART_BITRATE 38400 +#if !defined(DEFAULT_USART_BITRATE) || defined(__DOXYGEN__) +#define DEFAULT_USART_BITRATE 38400 #endif /** @@ -69,8 +69,8 @@ #ifdef __cplusplus extern "C" { #endif - void sam7x_serial_init(int prio0, int prio1); - void sam7x_set_usart(AT91PS_USART u, int speed, int mr); + void serial_init(int prio0, int prio1); + void usart_setup(AT91PS_USART u, int speed, int mr); CH_IRQ_HANDLER(UART0IrqHandler); CH_IRQ_HANDLER(UART1IrqHandler); #ifdef __cplusplus diff --git a/ports/ARM7-LPC214x/lpc214x_serial.c b/ports/ARM7-LPC214x/lpc214x_serial.c index 1e56739e5..f9ed67260 100644 --- a/ports/ARM7-LPC214x/lpc214x_serial.c +++ b/ports/ARM7-LPC214x/lpc214x_serial.c @@ -102,8 +102,8 @@ static void ServeInterrupt(UART *u, FullDuplexDriver *com) { break; case IIR_SRC_TX: { -#if LPC214x_UART_FIFO_PRELOAD > 0 - int i = LPC214x_UART_FIFO_PRELOAD; +#if UART_FIFO_PRELOAD > 0 + int i = UART_FIFO_PRELOAD; do { chSysLockFromIsr(); msg_t b = chOQGetI(&com->sd_oqueue); @@ -134,11 +134,11 @@ static void ServeInterrupt(UART *u, FullDuplexDriver *com) { } } -#if LPC214x_UART_FIFO_PRELOAD > 0 +#if UART_FIFO_PRELOAD > 0 static void preload(UART *u, FullDuplexDriver *com) { if (u->UART_LSR & LSR_THRE) { - int i = LPC214x_UART_FIFO_PRELOAD; + int i = UART_FIFO_PRELOAD; do { chSysLockFromIsr(); msg_t b = chOQGetI(&com->sd_oqueue); @@ -168,7 +168,7 @@ CH_IRQ_HANDLER(UART0IrqHandler) { } static void OutNotify1(void) { -#if LPC214x_UART_FIFO_PRELOAD > 0 +#if UART_FIFO_PRELOAD > 0 preload(U0Base, &COM1); #else @@ -196,7 +196,7 @@ CH_IRQ_HANDLER(UART1IrqHandler) { } static void OutNotify2(void) { -#if LPC214x_UART_FIFO_PRELOAD > 0 +#if UART_FIFO_PRELOAD > 0 preload(U1Base, &COM2); #else @@ -218,7 +218,7 @@ static void OutNotify2(void) { * @note Must be invoked with interrupts disabled. * @note Does not reset the I/O queues. */ -void lpc2148x_set_uart(UART *u, int speed, int lcr, int fcr) { +void uart_setup(UART *u, int speed, int lcr, int fcr) { int div = PCLK / (speed << 4); u->UART_LCR = lcr | LCR_DLAB; @@ -240,16 +240,16 @@ void lpc2148x_set_uart(UART *u, int speed, int lcr, int fcr) { * may have another use, enable them externally if needed. * RX and TX pads are handled inside. */ -void lpc2148x_serial_init(int vector1, int vector2) { +void serial_init(int vector1, int vector2) { #if USE_LPC214x_UART0 SetVICVector(UART0IrqHandler, vector1, SOURCE_UART0); PCONP = (PCONP & PCALL) | PCUART0; chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); - lpc2148x_set_uart(U0Base, - LPC214x_UART_BITRATE, - LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, - FCR_TRIGGER0); + uart_setup(U0Base, + DEFAULT_UART_BITRATE, + LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, + FCR_TRIGGER0); VICIntEnable = INTMASK(SOURCE_UART0); #endif @@ -257,10 +257,10 @@ void lpc2148x_serial_init(int vector1, int vector2) { SetVICVector(UART1IrqHandler, vector2, SOURCE_UART1); PCONP = (PCONP & PCALL) | PCUART1; chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); - lpc2148x_set_uart(U1Base, - LPC214x_UART_BITRATE, - LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, - FCR_TRIGGER0); + uart_setup(U1Base, + DEFAULT_UART_BITRATE, + LCR_WL8 | LCR_STOP1 | LCR_NOPARITY, + FCR_TRIGGER0); VICIntEnable = INTMASK(SOURCE_UART0) | INTMASK(SOURCE_UART1); #endif } diff --git a/ports/ARM7-LPC214x/lpc214x_serial.h b/ports/ARM7-LPC214x/lpc214x_serial.h index fbba6a365..021dbf6a1 100644 --- a/ports/ARM7-LPC214x/lpc214x_serial.h +++ b/ports/ARM7-LPC214x/lpc214x_serial.h @@ -44,8 +44,8 @@ * @note It is possible to use @p SetUART() in order to change the working * parameters at runtime. */ -#if !defined(LPC214x_UART_BITRATE) || defined(__DOXYGEN__) -#define LPC214x_UART_BITRATE 38400 +#if !defined(DEFAULT_UART_BITRATE) || defined(__DOXYGEN__) +#define DEFAULT_UART_BITRATE 38400 #endif /** @@ -60,8 +60,8 @@ * that will generate an interrupt for each output byte but is much * smaller and simpler. */ -#if !defined(LPC214x_UART_FIFO_PRELOAD) || defined(__DOXYGEN__) -#define LPC214x_UART_FIFO_PRELOAD 16 +#if !defined(UART_FIFO_PRELOAD) || defined(__DOXYGEN__) +#define UART_FIFO_PRELOAD 16 #endif /** @@ -85,8 +85,8 @@ #ifdef __cplusplus extern "C" { #endif - void lpc2148x_serial_init(int vector1, int vector2); - void SetUART(UART *u, int speed, int lcr, int fcr); + void serial_init(int vector1, int vector2); + void uart_setup(UART *u, int speed, int lcr, int fcr); CH_IRQ_HANDLER(UART0IrqHandler); CH_IRQ_HANDLER(UART1IrqHandler); #ifdef __cplusplus diff --git a/ports/ARM7-LPC214x/lpc214x_ssp.c b/ports/ARM7-LPC214x/lpc214x_ssp.c index ebe29b6e7..43c4100bc 100644 --- a/ports/ARM7-LPC214x/lpc214x_ssp.c +++ b/ports/ARM7-LPC214x/lpc214x_ssp.c @@ -104,7 +104,7 @@ void sspRW(uint8_t *in, uint8_t *out, size_t n) { * @param[in] cr0 the value for the @p CR0 register * @param[in] cr1 the value for the @p CR1 register */ -void lpc214x_ssp_setup(int cpsr, int cr0, int cr1) { +void ssp_setup(int cpsr, int cr0, int cr1) { SSP *ssp = SSPBase; ssp->SSP_CR1 = 0; @@ -116,13 +116,13 @@ void lpc214x_ssp_setup(int cpsr, int cr0, int cr1) { /** * @brief SSP subsystem initialization. */ -void lpc214x_ssp_init(void) { +void ssp_init(void) { /* Enables the SPI1 clock */ PCONP = (PCONP & PCALL) | PCSPI1; /* Clock = PCLK / 2 (fastest). */ - lpc214x_ssp_setup(2, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0); + ssp_setup(2, CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0), 0); #if LPC214x_SSP_USE_MUTEX chSemInit(&me, 1); diff --git a/ports/ARM7-LPC214x/lpc214x_ssp.h b/ports/ARM7-LPC214x/lpc214x_ssp.h index 01e8b3a93..5f497dc5f 100644 --- a/ports/ARM7-LPC214x/lpc214x_ssp.h +++ b/ports/ARM7-LPC214x/lpc214x_ssp.h @@ -41,8 +41,8 @@ #ifdef __cplusplus } #endif - void lpc214x_ssp_init(void); - void lpc214x_ssp_setup(int cpsr, int cr0, int cr1); + void ssp_init(void); + void ssp_setup(int cpsr, int cr0, int cr1); void sspAcquireBus(void); void sspReleaseBus(void); void sspRW(uint8_t *in, uint8_t *out, size_t n); diff --git a/ports/ARM7-LPC214x/vic.c b/ports/ARM7-LPC214x/vic.c index 739a259c1..88e9814bb 100644 --- a/ports/ARM7-LPC214x/vic.c +++ b/ports/ARM7-LPC214x/vic.c @@ -32,7 +32,7 @@ * @brief VIC Initialization. * @note Better reset everything in the VIC, it is a HUGE source of trouble. */ -void lpc214x_vic_init(void) { +void vic_init(void) { int i; VIC *vic = VICBase; diff --git a/ports/ARM7-LPC214x/vic.h b/ports/ARM7-LPC214x/vic.h index a219f4a32..b4b88948c 100644 --- a/ports/ARM7-LPC214x/vic.h +++ b/ports/ARM7-LPC214x/vic.h @@ -30,7 +30,7 @@ #ifdef __cplusplus extern "C" { #endif - void lpc214x_vic_init(void); + void vic_init(void); void SetVICVector(void *handler, int vector, int source); #ifdef __cplusplus } diff --git a/ports/ARMCM3-STM32F103/stm32_serial.c b/ports/ARMCM3-STM32F103/stm32_serial.c index 571c35fc1..857007362 100644 --- a/ports/ARMCM3-STM32F103/stm32_serial.c +++ b/ports/ARMCM3-STM32F103/stm32_serial.c @@ -161,8 +161,8 @@ static void OutNotify3(void) { * @note Must be invoked with interrupts disabled. * @note Does not reset the I/O queues. */ -void stm32_set_usart(USART_TypeDef *u, uint32_t speed, uint16_t cr1, - uint16_t cr2, uint16_t cr3) { +void usart_setup(USART_TypeDef *u, uint32_t speed, uint16_t cr1, + uint16_t cr2, uint16_t cr3) { /* * Baud rate setting. @@ -189,13 +189,13 @@ void stm32_set_usart(USART_TypeDef *u, uint32_t speed, uint16_t cr1, * may have another use, enable them externally if needed. * RX and TX pads are handled inside. */ -void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { +void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { #if USE_STM32_USART1 chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); RCC->APB2ENR |= 0x00004000; - stm32_set_usart(USART1, STM32_USART_BITRATE, 0, - CR2_STOP1_BITS | CR2_LINEN, 0); + usart_setup(USART1, DEFAULT_USART_BITRATE, 0, + CR2_STOP1_BITS | CR2_LINEN, 0); GPIOA->CRH = (GPIOA->CRH & 0xFFFFF00F) | 0x000004B0; NVICEnableVector(USART1_IRQChannel, prio1); #endif @@ -203,8 +203,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { #if USE_STM32_USART2 chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); RCC->APB1ENR |= 0x00020000; - stm32_set_usart(USART2, STM32_USART_BITRATE, 0, - CR2_STOP1_BITS | CR2_LINEN, 0); + usart_setup(USART2, DEFAULT_USART_BITRATE, 0, + CR2_STOP1_BITS | CR2_LINEN, 0); GPIOA->CRL = (GPIOA->CRL & 0xFFFF00FF) | 0x00004B00; NVICEnableVector(USART2_IRQChannel, prio2); #endif @@ -212,8 +212,8 @@ void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3) { #if USE_STM32_USART3 chFDDInit(&COM3, ib3, sizeof ib3, NULL, ob3, sizeof ob3, OutNotify3); RCC->APB1ENR |= 0x00040000; - stm32_set_usart(USART3, STM32_USART_BITRATE, 0, - CR2_STOP1_BITS | CR2_LINEN, 0); + usart_setup(USART3, DEFAULT_USART_BITRATE, 0, + CR2_STOP1_BITS | CR2_LINEN, 0); GPIOB->CRH = (GPIOB->CRH & 0xFFFF00FF) | 0x00004B00; NVICEnableVector(USART3_IRQChannel, prio3); #endif diff --git a/ports/ARMCM3-STM32F103/stm32_serial.h b/ports/ARMCM3-STM32F103/stm32_serial.h index f7b79c8d5..ac988db8f 100644 --- a/ports/ARMCM3-STM32F103/stm32_serial.h +++ b/ports/ARMCM3-STM32F103/stm32_serial.h @@ -44,8 +44,8 @@ * @note It is possible to use @p SetUSART() in order to change the working * parameters at runtime. */ -#if !defined(STM32_USART_BITRATE) || defined(__DOXYGEN__) -#define STM32_USART_BITRATE 38400 +#if !defined(DEFAULT_USART_BITRATE) || defined(__DOXYGEN__) +#define DEFAULT_USART_BITRATE 38400 #endif /** @@ -145,9 +145,9 @@ extern FullDuplexDriver COM3; #ifdef __cplusplus extern "C" { #endif - void stm32_serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3); - void stm32_set_usart(USART_TypeDef *u, uint32_t speed, uint16_t cr1, - uint16_t cr2, uint16_t cr3); + void serial_init(uint32_t prio1, uint32_t prio2, uint32_t prio3); + void usart_setup(USART_TypeDef *u, uint32_t speed, uint16_t cr1, + uint16_t cr2, uint16_t cr3); #ifdef __cplusplus } #endif diff --git a/ports/MSP430/msp430_serial.c b/ports/MSP430/msp430_serial.c index 60cd00af6..69351b19d 100644 --- a/ports/MSP430/msp430_serial.c +++ b/ports/MSP430/msp430_serial.c @@ -102,7 +102,7 @@ static void OutNotify1(void) { * @param ctl The value for the @p U0CTL register. * @note Does not reset the I/O queues. */ -void msp430_set_usart0(uint16_t div, uint8_t mod, uint8_t ctl) { +void usart0_setup(uint16_t div, uint8_t mod, uint8_t ctl) { U0CTL = SWRST; /* Resets the USART, it should already be */ /* USART init */ @@ -176,7 +176,7 @@ static void OutNotify2(void) { * @note Must be invoked with interrupts disabled. * @note Does not reset the I/O queues. */ -void msp430_set_usart1(uint16_t div, uint8_t mod, uint8_t ctl) { +void usart1_setup(uint16_t div, uint8_t mod, uint8_t ctl) { U1CTL = SWRST; /* Resets the USART, it should already be */ /* USART init */ @@ -199,17 +199,17 @@ void msp430_set_usart1(uint16_t div, uint8_t mod, uint8_t ctl) { * @brief Serial driver initialization. * @note The serial ports are initialized at @p 38400-8-N-1 by default. */ -void msp430_serial_init(void) { +void serial_init(void) { /* I/O queues setup.*/ #if USE_MSP430_USART0 chFDDInit(&COM1, ib1, sizeof ib1, NULL, ob1, sizeof ob1, OutNotify1); - msp430_set_usart0(UBR(38400), 0, CHAR); + usart0_setup(UBR(DEFAULT_USART_BITRATE), 0, CHAR); #endif #if USE_MSP430_USART1 chFDDInit(&COM2, ib2, sizeof ib2, NULL, ob2, sizeof ob2, OutNotify2); - msp430_set_usart1(UBR(38400), 0, CHAR); + usart1_setup(UBR(DEFAULT_USART_BITRATE), 0, CHAR); #endif } diff --git a/ports/MSP430/msp430_serial.h b/ports/MSP430/msp430_serial.h index 3ea1730a7..5057a5524 100644 --- a/ports/MSP430/msp430_serial.h +++ b/ports/MSP430/msp430_serial.h @@ -37,6 +37,17 @@ #define SERIAL_BUFFERS_SIZE 32 #endif +/** + * @brief Default bit rate. + * @details Configuration parameter, at startup the UARTs are configured at + * this speed. + * @note It is possible to use @p SetUART() in order to change the working + * parameters at runtime. + */ +#if !defined(DEFAULT_USART_BITRATE) || defined(__DOXYGEN__) +#define DEFAULT_USART_BITRATE 38400 +#endif + /** * @brief USART0 driver enable switch. * @details If set to @p TRUE the support for USART0 is included. @@ -64,9 +75,9 @@ #ifdef __cplusplus extern "C" { #endif - void msp430_serial_init(void); - void msp430_set_usart0(uint16_t div, uint8_t mod, uint8_t ctl); - void msp430_set_usart1(uint16_t div, uint8_t mod, uint8_t ctl); + void serial_init(void); + void usart0_setup(uint16_t div, uint8_t mod, uint8_t ctl); + void usart1_setup(uint16_t div, uint8_t mod, uint8_t ctl); #ifdef __cplusplus } #endif -- cgit v1.2.3