From a8693baa481e1c4d91379af08bbc9f459b1b4d56 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 10 Jan 2018 13:36:09 +0000 Subject: SPIv1 and SPIv2 circular mode added. Rework of RCC files and all dependencies inside STM32 drivers. Documentation fixes in some HAL modules. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11247 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/hal_buffers.h | 4 +- os/hal/include/hal_ioblock.h | 12 +- os/hal/include/hal_mmc_spi.h | 8 +- os/hal/include/hal_mmcsd.h | 4 +- os/hal/include/hal_sdc.h | 8 +- os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c | 8 +- os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c | 12 +- os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c | 38 +-- os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c | 32 +-- os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c | 8 +- os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c | 4 +- os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c | 4 +- os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c | 2 +- os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c | 12 +- os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c | 16 +- os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c | 4 +- os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c | 8 +- os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c | 8 +- os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c | 2 +- os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c | 12 +- os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c | 16 +- os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c | 12 +- os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c | 74 ++++-- os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h | 14 + os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c | 12 +- os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c | 73 ++++-- os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h | 18 ++ os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c | 12 +- os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c | 7 +- os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h | 6 + os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c | 48 ++-- os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c | 28 +- os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c | 28 +- os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c | 12 +- os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c | 32 +-- os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c | 24 +- os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c | 36 +-- os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c | 32 +-- os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c | 4 +- os/hal/ports/STM32/STM32F0xx/stm32_rcc.h | 158 +++-------- os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c | 8 +- os/hal/ports/STM32/STM32F1xx/stm32_rcc.h | 213 ++++----------- os/hal/ports/STM32/STM32F37x/hal_adc_lld.c | 16 +- os/hal/ports/STM32/STM32F37x/stm32_rcc.h | 150 +++-------- os/hal/ports/STM32/STM32F3xx/stm32_rcc.h | 150 +++-------- os/hal/ports/STM32/STM32F4xx/stm32_rcc.h | 288 +++++---------------- os/hal/ports/STM32/STM32F7xx/stm32_rcc.h | 252 +++++------------- os/hal/ports/STM32/STM32H7xx/stm32_rcc.h | 60 +++-- os/hal/ports/STM32/STM32L0xx/hal_lld.c | 2 +- os/hal/ports/STM32/STM32L0xx/stm32_rcc.h | 114 +++----- os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c | 4 +- os/hal/ports/STM32/STM32L1xx/stm32_rcc.h | 128 +++------ os/hal/ports/STM32/STM32L4xx/stm32_rcc.h | 160 +++--------- os/hal/templates/hal_can_lld.c | 8 +- os/hal/templates/hal_spi_lld.c | 16 ++ os/hal/templates/hal_spi_lld.h | 16 ++ testhal/STM32/STM32F1xx/SPI/main.c | 2 + testhal/STM32/STM32F37x/SPI/main.c | 2 + testhal/STM32/STM32F3xx/CAN/mcuconf.h | 2 +- testhal/STM32/STM32F4xx/DMA_STORM/main.c | 1 + testhal/STM32/STM32F7xx/SPI/main.c | 2 + testhal/STM32/STM32L0xx/SPI/main.c | 2 + testhal/STM32/STM32L1xx/SPI/main.c | 2 + .../multi/SPI/cfg-stm32f091_nucleo64/portab.c | 16 ++ .../multi/SPI/cfg-stm32f091_nucleo64/portab.h | 3 + .../multi/SPI/cfg-stm32f303_discovery/portab.c | 16 ++ .../multi/SPI/cfg-stm32f303_discovery/portab.h | 8 +- .../multi/SPI/cfg-stm32f407_discovery/portab.c | 16 ++ .../multi/SPI/cfg-stm32f407_discovery/portab.h | 8 +- .../multi/SPI/cfg-stm32h743_nucleo144/portab.h | 1 + 70 files changed, 972 insertions(+), 1546 deletions(-) diff --git a/os/hal/include/hal_buffers.h b/os/hal/include/hal_buffers.h index ac541d286..4b41e7313 100644 --- a/os/hal/include/hal_buffers.h +++ b/os/hal/include/hal_buffers.h @@ -217,7 +217,7 @@ typedef io_buffers_queue_t output_buffers_queue_t; } /** - * @brief Evaluates to @p TRUE if the specified input buffers queue is empty. + * @brief Evaluates to @p true if the specified input buffers queue is empty. * * @param[in] ibqp pointer to an @p input_buffers_queue_t structure * @return The queue status. @@ -229,7 +229,7 @@ typedef io_buffers_queue_t output_buffers_queue_t; #define ibqIsEmptyI(ibqp) ((bool)(bqSpaceI(ibqp) == 0U)) /** - * @brief Evaluates to @p TRUE if the specified input buffers queue is full. + * @brief Evaluates to @p true if the specified input buffers queue is full. * * @param[in] ibqp pointer to an @p input_buffers_queue_t structure * @return The queue status. diff --git a/os/hal/include/hal_ioblock.h b/os/hal/include/hal_ioblock.h index e942cf1c9..06f3665b5 100644 --- a/os/hal/include/hal_ioblock.h +++ b/os/hal/include/hal_ioblock.h @@ -127,8 +127,8 @@ typedef struct { * @param[in] ip pointer to a @p BaseBlockDevice or derived class * * @return The driver state. - * @retval FALSE the device is not transferring data. - * @retval TRUE the device not transferring data. + * @retval false the device is not transferring data. + * @retval true the device not transferring data. * * @special */ @@ -147,8 +147,8 @@ typedef struct { * @param[in] ip pointer to a @p BaseBlockDevice or derived class * * @return The media state. - * @retval FALSE media not inserted. - * @retval TRUE media inserted. + * @retval false media not inserted. + * @retval true media inserted. * * @api */ @@ -160,8 +160,8 @@ typedef struct { * @param[in] ip pointer to a @p BaseBlockDevice or derived class * * @return The media state. - * @retval FALSE writable media. - * @retval TRUE non writable media. + * @retval false writable media. + * @retval true non writable media. * * @api */ diff --git a/os/hal/include/hal_mmc_spi.h b/os/hal/include/hal_mmc_spi.h index fc6bccc2a..7a9c50a90 100644 --- a/os/hal/include/hal_mmc_spi.h +++ b/os/hal/include/hal_mmc_spi.h @@ -140,8 +140,8 @@ typedef struct { * * @param[in] mmcp pointer to the @p MMCDriver object * @return The card state. - * @retval FALSE card not inserted. - * @retval TRUE card inserted. + * @retval false card not inserted. + * @retval true card inserted. * * @api */ @@ -152,8 +152,8 @@ typedef struct { * * @param[in] mmcp pointer to the @p MMCDriver object * @return The card state. - * @retval FALSE card not inserted. - * @retval TRUE card inserted. + * @retval false card not inserted. + * @retval true card inserted. * * @api */ diff --git a/os/hal/include/hal_mmcsd.h b/os/hal/include/hal_mmcsd.h index f2e7d88d5..f69a7a1e4 100644 --- a/os/hal/include/hal_mmcsd.h +++ b/os/hal/include/hal_mmcsd.h @@ -428,7 +428,7 @@ typedef struct { * @{ */ /** - * @brief Evaluates to @p TRUE if the R1 response contains error flags. + * @brief Evaluates to @p true if the R1 response contains error flags. * * @param[in] r1 the r1 response */ @@ -442,7 +442,7 @@ typedef struct { #define MMCSD_R1_STS(r1) (((r1) >> 9U) & 15U) /** - * @brief Evaluates to @p TRUE if the R1 response indicates a locked card. + * @brief Evaluates to @p true if the R1 response indicates a locked card. * * @param[in] r1 the r1 response */ diff --git a/os/hal/include/hal_sdc.h b/os/hal/include/hal_sdc.h index 6466b1d97..307636558 100644 --- a/os/hal/include/hal_sdc.h +++ b/os/hal/include/hal_sdc.h @@ -152,8 +152,8 @@ typedef enum { * * @param[in] sdcp pointer to the @p SDCDriver object * @return The card state. - * @retval FALSE card not inserted. - * @retval TRUE card inserted. + * @retval false card not inserted. + * @retval true card inserted. * * @api */ @@ -168,8 +168,8 @@ typedef enum { * * @param[in] sdcp pointer to the @p SDCDriver object * @return The card state. - * @retval FALSE not write protected. - * @retval TRUE write protected. + * @retval false not write protected. + * @retval true write protected. * * @api */ diff --git a/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c index 9968adabd..a7a6c63ee 100644 --- a/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv1/hal_adc_lld.c @@ -153,7 +153,7 @@ void adc_lld_init(void) { #endif /* Calibration procedure.*/ - rccEnableADC1(FALSE); + rccEnableADC1(false); /* CCR setup.*/ #if STM32_ADC_SUPPORTS_PRESCALER @@ -167,7 +167,7 @@ void adc_lld_init(void) { osalDbgAssert(ADC1->CR != 0, "invalid register state"); while (ADC1->CR & ADC_CR_ADCAL) ; - rccDisableADC1(FALSE); + rccDisableADC1(); } /** @@ -190,7 +190,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR); - rccEnableADC1(FALSE); + rccEnableADC1(false); /* Clock settings.*/ adcp->adc->CFGR2 = STM32_ADC_ADC1_CKMODE; @@ -236,7 +236,7 @@ void adc_lld_stop(ADCDriver *adcp) { #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) - rccDisableADC1(FALSE); + rccDisableADC1(); #endif } } diff --git a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c index b2e651eb2..7c4695522 100644 --- a/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv2/hal_adc_lld.c @@ -243,7 +243,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR); - rccEnableADC1(FALSE); + rccEnableADC1(false); } #endif /* STM32_ADC_USE_ADC1 */ @@ -256,7 +256,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC2->DR); - rccEnableADC2(FALSE); + rccEnableADC2(false); } #endif /* STM32_ADC_USE_ADC2 */ @@ -269,7 +269,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC3->DR); - rccEnableADC3(FALSE); + rccEnableADC3(false); } #endif /* STM32_ADC_USE_ADC3 */ @@ -303,17 +303,17 @@ void adc_lld_stop(ADCDriver *adcp) { #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) - rccDisableADC1(FALSE); + rccDisableADC1(); #endif #if STM32_ADC_USE_ADC2 if (&ADCD2 == adcp) - rccDisableADC2(FALSE); + rccDisableADC2(); #endif #if STM32_ADC_USE_ADC3 if (&ADCD3 == adcp) - rccDisableADC3(FALSE); + rccDisableADC3(); #endif } } diff --git a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c index 4ffae09a2..f6a2748b3 100644 --- a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c @@ -535,29 +535,29 @@ void adc_lld_init(void) { #if defined(STM32F3XX) #if STM32_HAS_ADC1 && STM32_HAS_ADC2 #if STM32_ADC_USE_ADC1 || STM32_ADC_USE_ADC2 - rccEnableADC12(FALSE); + rccEnableADC12(false); rccResetADC12(); ADC1_2_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA; - rccDisableADC12(FALSE); + rccDisableADC12(); #endif #else #if STM32_ADC_USE_ADC1 - rccEnableADC12(FALSE); + rccEnableADC12(false); rccResetADC12(); ADC1_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA; - rccDisableADC12(FALSE); + rccDisableADC12(); #endif #endif #if STM32_ADC_USE_ADC3 || STM32_ADC_USE_ADC4 - rccEnableADC34(FALSE); + rccEnableADC34(false); rccResetADC34(); ADC3_4_COMMON->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA; - rccDisableADC34(FALSE); + rccDisableADC34(); #endif #endif #if defined(STM32L4XX) - rccEnableADC123(FALSE); + rccEnableADC123(false); rccResetADC123(); #if defined(ADC1_2_COMMON) @@ -568,7 +568,7 @@ void adc_lld_init(void) { ADC1_COMMON->CCR = STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA; #endif - rccDisableADC123(FALSE); + rccDisableADC123(); #endif } @@ -599,10 +599,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 0); #if defined(STM32F3XX) - rccEnableADC12(FALSE); + rccEnableADC12(false); #endif #if defined(STM32L4XX) - rccEnableADC123(FALSE); + rccEnableADC123(false); #endif } #endif /* STM32_ADC_USE_ADC1 */ @@ -618,10 +618,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 1); #if defined(STM32F3XX) - rccEnableADC12(FALSE); + rccEnableADC12(false); #endif #if defined(STM32L4XX) - rccEnableADC123(FALSE); + rccEnableADC123(false); #endif } #endif /* STM32_ADC_USE_ADC2 */ @@ -637,10 +637,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 2); #if defined(STM32F3XX) - rccEnableADC34(FALSE); + rccEnableADC34(false); #endif #if defined(STM32L4XX) - rccEnableADC123(FALSE); + rccEnableADC123(false); #endif } #endif /* STM32_ADC_USE_ADC3 */ @@ -656,10 +656,10 @@ void adc_lld_start(ADCDriver *adcp) { clkmask |= (1 << 3); #if defined(STM32F3XX) - rccEnableADC34(FALSE); + rccEnableADC34(false); #endif #if defined(STM32L4XX) - rccEnableADC123(FALSE); + rccEnableADC123(false); #endif } #endif /* STM32_ADC_USE_ADC4 */ @@ -758,20 +758,20 @@ void adc_lld_stop(ADCDriver *adcp) { #if defined(STM32F3XX) #if STM32_HAS_ADC1 || STM32_HAS_ADC2 if ((clkmask & 0x3) == 0) { - rccDisableADC12(FALSE); + rccDisableADC12(); } #endif #if STM32_HAS_ADC3 || STM32_HAS_ADC4 if ((clkmask & 0xC) == 0) { - rccDisableADC34(FALSE); + rccDisableADC34(); } #endif #endif #if defined(STM32L4XX) if ((clkmask & 0x7) == 0) { - rccDisableADC123(FALSE); + rccDisableADC123(); } #endif } diff --git a/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c b/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c index 064e4d3b0..31c1bf480 100644 --- a/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c +++ b/os/hal/ports/STM32/LLD/CANv1/hal_can_lld.c @@ -92,7 +92,7 @@ static void can_lld_set_filters(CANDriver* canp, /* Temporarily enabling CAN clock.*/ #if STM32_CAN_USE_CAN1 if(canp == &CAND1) { - rccEnableCAN1(FALSE); + rccEnableCAN1(false); /* Filters initialization.*/ canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | CAN_FMR_FINIT; canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | (can2sb << 8) | CAN_FMR_FINIT; @@ -101,7 +101,7 @@ static void can_lld_set_filters(CANDriver* canp, #if STM32_CAN_USE_CAN3 if(canp == &CAND3) { - rccEnableCAN3(FALSE); + rccEnableCAN3(false); /* Filters initialization.*/ canp->can->FMR = (canp->can->FMR & 0xFFFF0000) | CAN_FMR_FINIT; } @@ -177,12 +177,12 @@ static void can_lld_set_filters(CANDriver* canp, /* Temporarily enabling CAN clock.*/ #if STM32_CAN_USE_CAN1 if(canp == &CAND1) { - rccDisableCAN1(FALSE); + rccDisableCAN1(); } #endif #if STM32_CAN_USE_CAN3 if(canp == &CAND3) { - rccDisableCAN3(FALSE); + rccDisableCAN3(); } #endif } @@ -682,7 +682,7 @@ void can_lld_start(CANDriver *canp) { /* Clock activation.*/ #if STM32_CAN_USE_CAN1 if (&CAND1 == canp) { - rccEnableCAN1(FALSE); + rccEnableCAN1(false); } #endif @@ -691,13 +691,13 @@ void can_lld_start(CANDriver *canp) { osalDbgAssert(CAND1.state != CAN_STOP, "CAN1 must be started"); - rccEnableCAN2(FALSE); + rccEnableCAN2(false); } #endif #if STM32_CAN_USE_CAN3 if (&CAND3 == canp) { - rccEnableCAN3(FALSE); + rccEnableCAN3(false); } #endif @@ -742,7 +742,7 @@ void can_lld_stop(CANDriver *canp) { CAN1->MCR = 0x00010002; /* Register reset value. */ CAN1->IER = 0x00000000; /* All sources disabled. */ - rccDisableCAN1(FALSE); + rccDisableCAN1(); } #endif @@ -750,7 +750,7 @@ void can_lld_stop(CANDriver *canp) { if (&CAND2 == canp) { CAN2->MCR = 0x00010002; /* Register reset value. */ CAN2->IER = 0x00000000; /* All sources disabled. */ - rccDisableCAN2(FALSE); + rccDisableCAN2(); } #endif @@ -758,7 +758,7 @@ void can_lld_stop(CANDriver *canp) { if (&CAND3 == canp) { CAN3->MCR = 0x00010002; /* Register reset value. */ CAN3->IER = 0x00000000; /* All sources disabled. */ - rccDisableCAN3(FALSE); + rccDisableCAN3(); } #endif } @@ -771,8 +771,8 @@ void can_lld_stop(CANDriver *canp) { * @param[in] mailbox mailbox number, @p CAN_ANY_MAILBOX for any mailbox * * @return The queue space availability. - * @retval FALSE no space in the transmit queue. - * @retval TRUE transmit slot available. + * @retval false no space in the transmit queue. + * @retval true transmit slot available. * * @notapi */ @@ -788,7 +788,7 @@ bool can_lld_is_tx_empty(CANDriver *canp, canmbx_t mailbox) { case 3: return (canp->can->TSR & CAN_TSR_TME2) != 0; default: - return FALSE; + return false; } } @@ -844,8 +844,8 @@ void can_lld_transmit(CANDriver *canp, * @param[in] mailbox mailbox number, @p CAN_ANY_MAILBOX for any mailbox * * @return The queue space availability. - * @retval FALSE no space in the transmit queue. - * @retval TRUE transmit slot available. + * @retval false no space in the transmit queue. + * @retval true transmit slot available. * * @notapi */ @@ -860,7 +860,7 @@ bool can_lld_is_rx_nonempty(CANDriver *canp, canmbx_t mailbox) { case 2: return (canp->can->RF1R & CAN_RF1R_FMP1) != 0; default: - return FALSE; + return false; } } diff --git a/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c b/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c index ec6111fd6..de2f6104b 100644 --- a/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c +++ b/os/hal/ports/STM32/LLD/DACv1/hal_dac_lld.c @@ -288,7 +288,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC1_CH1 if (&DACD1 == dacp) { if ((dacp->params->dac->CR & DAC_CR_EN1) == 0U) { - rccDisableDAC1(false); + rccDisableDAC1(); } } #endif @@ -296,7 +296,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC1_CH2 if (&DACD2 == dacp) { if ((dacp->params->dac->CR & DAC_CR_EN2) == 0U) { - rccDisableDAC1(false); + rccDisableDAC1(); } } #endif @@ -304,7 +304,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC2_CH1 if (&DACD3 == dacp) { if ((dacp->params->dac->CR & DAC_CR_EN1) == 0U) { - rccDisableDAC2(false); + rccDisableDAC2(); } } #endif @@ -312,7 +312,7 @@ void dac_lld_stop(DACDriver *dacp) { #if STM32_DAC_USE_DAC2_CH2 if (&DACD4 == dacp) { if ((dacp->params->dac->CR & DAC_CR_EN2) == 0U) { - rccDisableDAC2(false); + rccDisableDAC2(); } } #endif diff --git a/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c b/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c index 8fa292bf3..bd11353fc 100644 --- a/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c +++ b/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.c @@ -556,11 +556,11 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) { /* Shutting down clocks that are no more required, if any.*/ if ((dma.streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) { - rccDisableDMA1(false); + rccDisableDMA1(); } #if STM32_DMA2_NUM_CHANNELS > 0 if ((dma.streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) { - rccDisableDMA2(false); + rccDisableDMA2(); } #endif } diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c index 779c8b395..ac1d71964 100644 --- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c +++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.c @@ -510,10 +510,10 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) { /* Shutting down clocks that are no more required, if any.*/ if ((dma_streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) { - rccDisableDMA1(false); + rccDisableDMA1(); } if ((dma_streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) { - rccDisableDMA2(false); + rccDisableDMA2(); } } diff --git a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c index b112a9e07..3e73ad3a6 100644 --- a/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv1/hal_pal_lld.c @@ -91,7 +91,7 @@ void _pal_lld_init(const PALConfig *config) { /* * Enables the GPIO related clocks. */ - rccEnableAPB2(APB2_EN_MASK, FALSE); + rccEnableAPB2(APB2_EN_MASK, false); /* * Initial GPIO setup. diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c index 98046021a..6b1b05919 100644 --- a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c +++ b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c @@ -564,7 +564,7 @@ void i2c_lld_start(I2CDriver *i2cp) { (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq, (void *)i2cp); osalDbgAssert(!b, "stream already allocated"); - rccEnableI2C1(FALSE); + rccEnableI2C1(false); nvicEnableVector(I2C1_EV_IRQn, STM32_I2C_I2C1_IRQ_PRIORITY); nvicEnableVector(I2C1_ER_IRQn, STM32_I2C_I2C1_IRQ_PRIORITY); @@ -590,7 +590,7 @@ void i2c_lld_start(I2CDriver *i2cp) { (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq, (void *)i2cp); osalDbgAssert(!b, "stream already allocated"); - rccEnableI2C2(FALSE); + rccEnableI2C2(false); nvicEnableVector(I2C2_EV_IRQn, STM32_I2C_I2C2_IRQ_PRIORITY); nvicEnableVector(I2C2_ER_IRQn, STM32_I2C_I2C2_IRQ_PRIORITY); @@ -616,7 +616,7 @@ void i2c_lld_start(I2CDriver *i2cp) { (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq, (void *)i2cp); osalDbgAssert(!b, "stream already allocated"); - rccEnableI2C3(FALSE); + rccEnableI2C3(false); nvicEnableVector(I2C3_EV_IRQn, STM32_I2C_I2C3_IRQ_PRIORITY); nvicEnableVector(I2C3_ER_IRQn, STM32_I2C_I2C3_IRQ_PRIORITY); @@ -666,7 +666,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { if (&I2CD1 == i2cp) { nvicDisableVector(I2C1_EV_IRQn); nvicDisableVector(I2C1_ER_IRQn); - rccDisableI2C1(FALSE); + rccDisableI2C1(); } #endif @@ -674,7 +674,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { if (&I2CD2 == i2cp) { nvicDisableVector(I2C2_EV_IRQn); nvicDisableVector(I2C2_ER_IRQn); - rccDisableI2C2(FALSE); + rccDisableI2C2(); } #endif @@ -682,7 +682,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { if (&I2CD3 == i2cp) { nvicDisableVector(I2C3_EV_IRQn); nvicDisableVector(I2C3_ER_IRQn); - rccDisableI2C3(FALSE); + rccDisableI2C3(); } #endif } diff --git a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c index 724c5dbdb..f2f0d8043 100644 --- a/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c +++ b/os/hal/ports/STM32/LLD/I2Cv2/hal_i2c_lld.c @@ -688,7 +688,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD1 == i2cp) { rccResetI2C1(); - rccEnableI2C1(FALSE); + rccEnableI2C1(false); #if STM32_I2C_USE_DMA == TRUE { bool b; @@ -726,7 +726,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD2 == i2cp) { rccResetI2C2(); - rccEnableI2C2(FALSE); + rccEnableI2C2(false); #if STM32_I2C_USE_DMA == TRUE { bool b; @@ -764,7 +764,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD3 == i2cp) { rccResetI2C3(); - rccEnableI2C3(FALSE); + rccEnableI2C3(false); #if STM32_I2C_USE_DMA == TRUE { bool b; @@ -802,7 +802,7 @@ void i2c_lld_start(I2CDriver *i2cp) { if (&I2CD4 == i2cp) { rccResetI2C4(); - rccEnableI2C4(FALSE); + rccEnableI2C4(false); #if STM32_I2C_USE_DMA == TRUE { bool b; @@ -887,7 +887,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C1 interrupt numbers not defined" #endif - rccDisableI2C1(FALSE); + rccDisableI2C1(); } #endif @@ -902,7 +902,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C2 interrupt numbers not defined" #endif - rccDisableI2C2(FALSE); + rccDisableI2C2(); } #endif @@ -917,7 +917,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C3 interrupt numbers not defined" #endif - rccDisableI2C3(FALSE); + rccDisableI2C3(); } #endif @@ -932,7 +932,7 @@ void i2c_lld_stop(I2CDriver *i2cp) { #error "I2C4 interrupt numbers not defined" #endif - rccDisableI2C4(FALSE); + rccDisableI2C4(); } #endif } diff --git a/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c b/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c index 84b71ce5d..d305af56e 100644 --- a/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c +++ b/os/hal/ports/STM32/LLD/MACv1/hal_mac_lld.c @@ -295,7 +295,7 @@ void mac_lld_init(void) { #endif /* MAC clocks stopped again.*/ - rccDisableETH(false); + rccDisableETH(); } /** @@ -396,7 +396,7 @@ void mac_lld_stop(MACDriver *macp) { ETH->DMASR = ETH->DMASR; /* MAC clocks stopped.*/ - rccDisableETH(false); + rccDisableETH(); /* ISR vector disabled.*/ nvicDisableVector(STM32_ETH_NUMBER); diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c index 591c5f0c8..98b7fd74e 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c @@ -844,7 +844,7 @@ void usb_lld_start(USBDriver *usbp) { #else /* Workaround for the problem described here: http://forum.chibios.org/phpbb/viewtopic.php?f=16&t=1798.*/ - rccDisableOTG_HSULPI(true); + rccDisableOTG_HSULPI(); #endif /* Enables IRQ vector.*/ @@ -979,16 +979,16 @@ void usb_lld_stop(USBDriver *usbp) { #if STM32_USB_USE_OTG1 if (&USBD1 == usbp) { nvicDisableVector(STM32_OTG1_NUMBER); - rccDisableOTG_FS(false); + rccDisableOTG_FS(); } #endif #if STM32_USB_USE_OTG2 if (&USBD2 == usbp) { nvicDisableVector(STM32_OTG2_NUMBER); - rccDisableOTG_HS(false); + rccDisableOTG_HS(); #if defined(BOARD_OTG2_USES_ULPI) - rccDisableOTG_HSULPI(true) + rccDisableOTG_HSULPI() #endif } #endif diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c index 77793b3aa..4fb1ff111 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld_alt.c @@ -842,7 +842,7 @@ void usb_lld_start(USBDriver *usbp) { #else /* Workaround for the problem described here: http://forum.chibios.org/phpbb/viewtopic.php?f=16&t=1798.*/ - rccDisableOTG_HSULPI(true); + rccDisableOTG_HSULPI(); #endif /* Enables IRQ vector.*/ @@ -977,16 +977,16 @@ void usb_lld_stop(USBDriver *usbp) { #if STM32_USB_USE_OTG1 if (&USBD1 == usbp) { nvicDisableVector(STM32_OTG1_NUMBER); - rccDisableOTG_FS(false); + rccDisableOTG_FS(); } #endif #if STM32_USB_USE_OTG2 if (&USBD2 == usbp) { nvicDisableVector(STM32_OTG2_NUMBER); - rccDisableOTG_HS(false); + rccDisableOTG_HS(); #if defined(BOARD_OTG2_USES_ULPI) - rccDisableOTG_HSULPI(true) + rccDisableOTG_HSULPI() #endif } #endif diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c index f3a889b57..529bb9b95 100644 --- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c +++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c @@ -194,7 +194,7 @@ void qspi_lld_stop(QSPIDriver *qspip) { /* Stopping involved clocks.*/ #if STM32_QSPI_USE_QUADSPI1 if (&QSPID1 == qspip) { - rccDisableQUADSPI1(FALSE); + rccDisableQUADSPI1(); } #endif } diff --git a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c index 3b6807e30..f3ef0b753 100644 --- a/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDIOv1/hal_sdc_lld.c @@ -386,7 +386,7 @@ void sdc_lld_start(SDCDriver *sdcp) { dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL); #endif nvicEnableVector(STM32_SDIO_NUMBER, STM32_SDC_SDIO_IRQ_PRIORITY); - rccEnableSDIO(FALSE); + rccEnableSDIO(false); } /* Configuration, card clock is initially stopped.*/ @@ -416,7 +416,7 @@ void sdc_lld_stop(SDCDriver *sdcp) { /* Clock deactivation.*/ nvicDisableVector(STM32_SDIO_NUMBER); dmaStreamRelease(sdcp->dma); - rccDisableSDIO(FALSE); + rccDisableSDIO(); } } @@ -708,10 +708,10 @@ bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, SDIO_DCTRL_DMAEN | SDIO_DCTRL_DTEN; - if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == TRUE) + if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == true) goto error; - if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE) + if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true) goto error; return HAL_SUCCESS; @@ -764,7 +764,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, sdcp->sdio->DLEN = blocks * MMCSD_BLOCK_SIZE; /* Talk to card what we want from it.*/ - if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == TRUE) + if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == true) goto error; /* Transaction starts just after DTEN bit setting.*/ @@ -773,7 +773,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, SDIO_DCTRL_DMAEN | SDIO_DCTRL_DTEN; - if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE) + if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true) goto error; return HAL_SUCCESS; diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c index 60127598a..0fe6fe032 100644 --- a/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c @@ -450,7 +450,7 @@ void sdc_lld_start(SDCDriver *sdcp) { dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL); #endif - rccEnableSDMMC1(FALSE); + rccEnableSDMMC1(false); } #endif /* STM32_SDC_USE_SDMMC1 */ @@ -466,7 +466,7 @@ void sdc_lld_start(SDCDriver *sdcp) { dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL); #endif - rccEnableSDMMC2(FALSE); + rccEnableSDMMC2(false); } #endif /* STM32_SDC_USE_SDMMC2 */ } @@ -501,13 +501,13 @@ void sdc_lld_stop(SDCDriver *sdcp) { /* Clock deactivation.*/ #if STM32_SDC_USE_SDMMC1 if (&SDCD1 == sdcp) { - rccDisableSDMMC1(FALSE); + rccDisableSDMMC1(); } #endif #if STM32_SDC_USE_SDMMC2 if (&SDCD2 == sdcp) { - rccDisableSDMMC2(FALSE); + rccDisableSDMMC2(); } #endif } @@ -816,10 +816,10 @@ bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, SDMMC_DCTRL_DMAEN | SDMMC_DCTRL_DTEN; - if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == TRUE) + if (sdc_lld_prepare_read(sdcp, startblk, blocks, resp) == true) goto error; - if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE) + if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true) goto error; return HAL_SUCCESS; @@ -871,7 +871,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, sdcp->sdmmc->DLEN = blocks * MMCSD_BLOCK_SIZE; /* Talk to card what we want from it.*/ - if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == TRUE) + if (sdc_lld_prepare_write(sdcp, startblk, blocks, resp) == true) goto error; /* Transaction starts just after DTEN bit setting.*/ @@ -880,7 +880,7 @@ bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, SDMMC_DCTRL_DMAEN | SDMMC_DCTRL_DTEN; - if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == TRUE) + if (sdc_lld_wait_transaction_end(sdcp, blocks, resp) == true) goto error; return HAL_SUCCESS; diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c index c1132cfdb..9d1dd219d 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c @@ -360,7 +360,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI1(FALSE); + rccEnableSPI1(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -394,7 +394,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI2(FALSE); + rccEnableSPI2(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -428,7 +428,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI3(FALSE); + rccEnableSPI3(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -484,17 +484,17 @@ void i2s_lld_stop(I2SDriver *i2sp) { #if STM32_I2S_USE_SPI1 if (&I2SD1 == i2sp) - rccDisableSPI1(FALSE); + rccDisableSPI1(); #endif #if STM32_I2S_USE_SPI2 if (&I2SD2 == i2sp) - rccDisableSPI2(FALSE); + rccDisableSPI2(); #endif #if STM32_I2S_USE_SPI3 if (&I2SD3 == i2sp) - rccDisableSPI3(FALSE); + rccDisableSPI3(); #endif } } diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c index 3cae1a9e7..ed64010ec 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c @@ -140,13 +140,25 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { (void)flags; #endif - /* Stop everything.*/ - dmaStreamDisable(spip->dmatx); - dmaStreamDisable(spip->dmarx); + if (spip->config->circular) { + if ((flags & STM32_DMA_ISR_HTIF) != 0U) { + /* Half buffer interrupt.*/ + _spi_isr_code_half1(spip); + } + else { + /* End buffer interrupt.*/ + _spi_isr_code_half2(spip); + } + } + else { + /* Stopping DMAs.*/ + dmaStreamDisable(spip->dmatx); + dmaStreamDisable(spip->dmarx); - /* Portable SPI ISR code defined in the high level driver, note, it is - a macro.*/ - _spi_isr_code(spip); + /* Portable SPI ISR code defined in the high level driver, note, it is + a macro.*/ + _spi_isr_code(spip); + } } /** @@ -317,7 +329,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI1(FALSE); + rccEnableSPI1(false); } #endif #if STM32_SPI_USE_SPI2 @@ -333,7 +345,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI2(FALSE); + rccEnableSPI2(false); } #endif #if STM32_SPI_USE_SPI3 @@ -349,7 +361,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI3(FALSE); + rccEnableSPI3(false); } #endif #if STM32_SPI_USE_SPI4 @@ -365,7 +377,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI4(FALSE); + rccEnableSPI4(false); } #endif #if STM32_SPI_USE_SPI5 @@ -381,7 +393,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI5(FALSE); + rccEnableSPI5(false); } #endif #if STM32_SPI_USE_SPI6 @@ -397,7 +409,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI6(FALSE); + rccEnableSPI6(false); } #endif @@ -421,6 +433,16 @@ void spi_lld_start(SPIDriver *spip) { spip->txdmamode = (spip->txdmamode & ~STM32_DMA_CR_SIZE_MASK) | STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD; } + + if (spip->config->circular) { + spip->rxdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + spip->txdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + } + else { + spip->rxdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + spip->txdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + } + /* SPI setup and enable.*/ spip->spi->CR1 &= ~SPI_CR1_SPE; spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR | SPI_CR1_SSM | @@ -451,27 +473,27 @@ void spi_lld_stop(SPIDriver *spip) { #if STM32_SPI_USE_SPI1 if (&SPID1 == spip) - rccDisableSPI1(FALSE); + rccDisableSPI1(); #endif #if STM32_SPI_USE_SPI2 if (&SPID2 == spip) - rccDisableSPI2(FALSE); + rccDisableSPI2(); #endif #if STM32_SPI_USE_SPI3 if (&SPID3 == spip) - rccDisableSPI3(FALSE); + rccDisableSPI3(); #endif #if STM32_SPI_USE_SPI4 if (&SPID4 == spip) - rccDisableSPI4(FALSE); + rccDisableSPI4(); #endif #if STM32_SPI_USE_SPI5 if (&SPID5 == spip) - rccDisableSPI5(FALSE); + rccDisableSPI5(); #endif #if STM32_SPI_USE_SPI6 if (&SPID6 == spip) - rccDisableSPI6(FALSE); + rccDisableSPI6(); #endif } } @@ -620,6 +642,22 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { dmaStreamEnable(spip->dmatx); } +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) +/** + * @brief Aborts the ongoing SPI operation, if any. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_abort(SPIDriver *spip) { + + /* Stopping DMAs.*/ + dmaStreamDisable(spip->dmatx); + dmaStreamDisable(spip->dmarx); +} +#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */ + /** * @brief Exchanges one frame using a polled wait. * @details This synchronous function exchanges one frame using a polled diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h index c237bca4b..421484355 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h @@ -31,6 +31,11 @@ /* Driver constants. */ /*===========================================================================*/ +/** + * @brief Circular mode support flag. + */ +#define SPI_SUPPORTS_CIRCULAR TRUE + /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -421,6 +426,12 @@ typedef void (*spicallback_t)(SPIDriver *spip); * @brief Driver configuration structure. */ typedef struct { +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) + /** + * @brief Enables the circular buffer mode. + */ + bool circular; +#endif /** * @brief Operation complete callback or @p NULL. */ @@ -559,6 +570,9 @@ extern "C" { const void *txbuf, void *rxbuf); void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) + void spi_lld_abort(SPIDriver *spip); +#endif uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); #ifdef __cplusplus } diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c index 33fe22ca5..54f6dd984 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_i2s_lld.c @@ -360,7 +360,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI1(FALSE); + rccEnableSPI1(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -394,7 +394,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI2(FALSE); + rccEnableSPI2(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -428,7 +428,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI3(FALSE); + rccEnableSPI3(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -484,17 +484,17 @@ void i2s_lld_stop(I2SDriver *i2sp) { #if STM32_I2S_USE_SPI1 if (&I2SD1 == i2sp) - rccDisableSPI1(FALSE); + rccDisableSPI1(); #endif #if STM32_I2S_USE_SPI2 if (&I2SD2 == i2sp) - rccDisableSPI2(FALSE); + rccDisableSPI2(); #endif #if STM32_I2S_USE_SPI3 if (&I2SD3 == i2sp) - rccDisableSPI3(FALSE); + rccDisableSPI3(); #endif } } diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c index 6adc0b920..3d91bac46 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.c @@ -140,13 +140,25 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) { (void)flags; #endif - /* Stop everything.*/ - dmaStreamDisable(spip->dmatx); - dmaStreamDisable(spip->dmarx); + if (spip->config->circular) { + if ((flags & STM32_DMA_ISR_HTIF) != 0U) { + /* Half buffer interrupt.*/ + _spi_isr_code_half1(spip); + } + else { + /* End buffer interrupt.*/ + _spi_isr_code_half2(spip); + } + } + else { + /* Stopping DMAs.*/ + dmaStreamDisable(spip->dmatx); + dmaStreamDisable(spip->dmarx); - /* Portable SPI ISR code defined in the high level driver, note, it is - a macro.*/ - _spi_isr_code(spip); + /* Portable SPI ISR code defined in the high level driver, note, it is + a macro.*/ + _spi_isr_code(spip); + } } /** @@ -318,7 +330,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI1(FALSE); + rccEnableSPI1(false); } #endif #if STM32_SPI_USE_SPI2 @@ -334,7 +346,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI2(FALSE); + rccEnableSPI2(false); } #endif #if STM32_SPI_USE_SPI3 @@ -350,7 +362,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI3(FALSE); + rccEnableSPI3(false); } #endif #if STM32_SPI_USE_SPI4 @@ -366,7 +378,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI4(FALSE); + rccEnableSPI4(false); } #endif #if STM32_SPI_USE_SPI5 @@ -382,7 +394,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI5(FALSE); + rccEnableSPI5(false); } #endif #if STM32_SPI_USE_SPI6 @@ -398,7 +410,7 @@ void spi_lld_start(SPIDriver *spip) { (stm32_dmaisr_t)spi_lld_serve_tx_interrupt, (void *)spip); osalDbgAssert(!b, "stream already allocated"); - rccEnableSPI6(FALSE); + rccEnableSPI6(false); } #endif @@ -424,6 +436,15 @@ void spi_lld_start(SPIDriver *spip) { STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD; } + if (spip->config->circular) { + spip->rxdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + spip->txdmamode |= (STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + } + else { + spip->rxdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + spip->txdmamode &= ~(STM32_DMA_CR_CIRC | STM32_DMA_CR_HTIE); + } + /* SPI setup and enable.*/ spip->spi->CR1 &= ~SPI_CR1_SPE; spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR; @@ -453,27 +474,27 @@ void spi_lld_stop(SPIDriver *spip) { #if STM32_SPI_USE_SPI1 if (&SPID1 == spip) - rccDisableSPI1(FALSE); + rccDisableSPI1(); #endif #if STM32_SPI_USE_SPI2 if (&SPID2 == spip) - rccDisableSPI2(FALSE); + rccDisableSPI2(); #endif #if STM32_SPI_USE_SPI3 if (&SPID3 == spip) - rccDisableSPI3(FALSE); + rccDisableSPI3(); #endif #if STM32_SPI_USE_SPI4 if (&SPID4 == spip) - rccDisableSPI4(FALSE); + rccDisableSPI4(); #endif #if STM32_SPI_USE_SPI5 if (&SPID5 == spip) - rccDisableSPI5(FALSE); + rccDisableSPI5(); #endif #if STM32_SPI_USE_SPI6 if (&SPID6 == spip) - rccDisableSPI6(FALSE); + rccDisableSPI6(); #endif } } @@ -622,6 +643,22 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { dmaStreamEnable(spip->dmatx); } +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) +/** + * @brief Aborts the ongoing SPI operation, if any. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_abort(SPIDriver *spip) { + + /* Stopping DMAs.*/ + dmaStreamDisable(spip->dmatx); + dmaStreamDisable(spip->dmarx); +} +#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */ + /** * @brief Exchanges one frame using a polled wait. * @details This synchronous function exchanges one frame using a polled diff --git a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h index 1c7a5f4b4..de194f521 100644 --- a/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv2/hal_spi_lld.h @@ -31,6 +31,11 @@ /* Driver constants. */ /*===========================================================================*/ +/** + * @brief Circular mode support flag. + */ +#define SPI_SUPPORTS_CIRCULAR TRUE + /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -421,6 +426,12 @@ typedef void (*spicallback_t)(SPIDriver *spip); * @brief Driver configuration structure. */ typedef struct { +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) + /** + * @brief Enables the circular buffer mode. + */ + bool circular; +#endif /** * @brief Operation complete callback or @p NULL. */ @@ -550,11 +561,18 @@ extern "C" { void spi_lld_init(void); void spi_lld_start(SPIDriver *spip); void spi_lld_stop(SPIDriver *spip); +#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LLD) || defined(__DOXYGEN__) + void spi_lld_select(SPIDriver *spip); + void spi_lld_unselect(SPIDriver *spip); +#endif void spi_lld_ignore(SPIDriver *spip, size_t n); void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf); void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) + void spi_lld_abort(SPIDriver *spip); +#endif uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); #ifdef __cplusplus } diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c index 33fe22ca5..54f6dd984 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_i2s_lld.c @@ -360,7 +360,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI1(FALSE); + rccEnableSPI1(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI1_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -394,7 +394,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI2(FALSE); + rccEnableSPI2(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI2_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -428,7 +428,7 @@ void i2s_lld_start(I2SDriver *i2sp) { bool b; /* Enabling I2S unit clock.*/ - rccEnableSPI3(FALSE); + rccEnableSPI3(false); #if STM32_I2S_RX_ENABLED(STM32_I2S_SPI3_MODE) b = dmaStreamAllocate(i2sp->dmarx, @@ -484,17 +484,17 @@ void i2s_lld_stop(I2SDriver *i2sp) { #if STM32_I2S_USE_SPI1 if (&I2SD1 == i2sp) - rccDisableSPI1(FALSE); + rccDisableSPI1(); #endif #if STM32_I2S_USE_SPI2 if (&I2SD2 == i2sp) - rccDisableSPI2(FALSE); + rccDisableSPI2(); #endif #if STM32_I2S_USE_SPI3 if (&I2SD3 == i2sp) - rccDisableSPI3(FALSE); + rccDisableSPI3(); #endif } } diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c index 175a22cf3..df4c5685c 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.c @@ -1031,12 +1031,14 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { spip->spi->CR1 |= SPI_CR1_CSTART; } + +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) /** * @brief Aborts the ongoing SPI operation, if any. * * @param[in] spip pointer to the @p SPIDriver object * - * @api + * @notapi */ void spi_lld_abort(SPIDriver *spip) { @@ -1063,6 +1065,7 @@ void spi_lld_abort(SPIDriver *spip) { } #endif } +#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */ /** * @brief Exchanges one frame using a polled wait. @@ -1075,6 +1078,8 @@ void spi_lld_abort(SPIDriver *spip) { * @param[in] spip pointer to the @p SPIDriver object * @param[in] frame the data frame to send over the SPI bus * @return The received data frame from the SPI bus. + * + * @notapi */ uint32_t spi_lld_polled_exchange(SPIDriver *spip, uint32_t frame) { uint32_t dsize = (spip->spi->CFG1 & SPI_CFG1_DSIZE_Msk) + 1U; diff --git a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h index 742631e43..de499399e 100644 --- a/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv3/hal_spi_lld.h @@ -688,12 +688,18 @@ extern "C" { void spi_lld_init(void); void spi_lld_start(SPIDriver *spip); void spi_lld_stop(SPIDriver *spip); +#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LLD) || defined(__DOXYGEN__) + void spi_lld_select(SPIDriver *spip); + void spi_lld_unselect(SPIDriver *spip); +#endif void spi_lld_ignore(SPIDriver *spip, size_t n); void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf); void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) void spi_lld_abort(SPIDriver *spip); +#endif uint32_t spi_lld_polled_exchange(SPIDriver *spip, uint32_t frame); #ifdef __cplusplus } diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c index 778698114..ce36ce224 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c @@ -492,7 +492,7 @@ void gpt_lld_start(GPTDriver *gptp) { /* Clock activation.*/ #if STM32_GPT_USE_TIM1 if (&GPTD1 == gptp) { - rccEnableTIM1(FALSE); + rccEnableTIM1(false); rccResetTIM1(); #if !defined(STM32_TIM1_SUPPRESS_ISR) nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_GPT_TIM1_IRQ_PRIORITY); @@ -507,7 +507,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM2 if (&GPTD2 == gptp) { - rccEnableTIM2(FALSE); + rccEnableTIM2(false); rccResetTIM2(); #if !defined(STM32_TIM2_SUPPRESS_ISR) nvicEnableVector(STM32_TIM2_NUMBER, STM32_GPT_TIM2_IRQ_PRIORITY); @@ -522,7 +522,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM3 if (&GPTD3 == gptp) { - rccEnableTIM3(FALSE); + rccEnableTIM3(false); rccResetTIM3(); #if !defined(STM32_TIM3_SUPPRESS_ISR) nvicEnableVector(STM32_TIM3_NUMBER, STM32_GPT_TIM3_IRQ_PRIORITY); @@ -537,7 +537,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM4 if (&GPTD4 == gptp) { - rccEnableTIM4(FALSE); + rccEnableTIM4(false); rccResetTIM4(); #if !defined(STM32_TIM4_SUPPRESS_ISR) nvicEnableVector(STM32_TIM4_NUMBER, STM32_GPT_TIM4_IRQ_PRIORITY); @@ -552,7 +552,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM5 if (&GPTD5 == gptp) { - rccEnableTIM5(FALSE); + rccEnableTIM5(false); rccResetTIM5(); #if !defined(STM32_TIM5_SUPPRESS_ISR) nvicEnableVector(STM32_TIM5_NUMBER, STM32_GPT_TIM5_IRQ_PRIORITY); @@ -567,7 +567,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM6 if (&GPTD6 == gptp) { - rccEnableTIM6(FALSE); + rccEnableTIM6(false); rccResetTIM6(); #if !defined(STM32_TIM6_SUPPRESS_ISR) nvicEnableVector(STM32_TIM6_NUMBER, STM32_GPT_TIM6_IRQ_PRIORITY); @@ -582,7 +582,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM7 if (&GPTD7 == gptp) { - rccEnableTIM7(FALSE); + rccEnableTIM7(false); rccResetTIM7(); #if !defined(STM32_TIM7_SUPPRESS_ISR) nvicEnableVector(STM32_TIM7_NUMBER, STM32_GPT_TIM7_IRQ_PRIORITY); @@ -597,7 +597,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM8 if (&GPTD8 == gptp) { - rccEnableTIM8(FALSE); + rccEnableTIM8(false); rccResetTIM8(); #if !defined(STM32_TIM8_SUPPRESS_ISR) nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_GPT_TIM8_IRQ_PRIORITY); @@ -612,7 +612,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM9 if (&GPTD9 == gptp) { - rccEnableTIM9(FALSE); + rccEnableTIM9(false); rccResetTIM9(); #if !defined(STM32_TIM9_SUPPRESS_ISR) nvicEnableVector(STM32_TIM9_NUMBER, STM32_GPT_TIM9_IRQ_PRIORITY); @@ -627,7 +627,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM11 if (&GPTD11 == gptp) { - rccEnableTIM11(FALSE); + rccEnableTIM11(false); rccResetTIM11(); #if !defined(STM32_TIM11_SUPPRESS_ISR) nvicEnableVector(STM32_TIM11_NUMBER, STM32_GPT_TIM11_IRQ_PRIORITY); @@ -642,7 +642,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM12 if (&GPTD12 == gptp) { - rccEnableTIM12(FALSE); + rccEnableTIM12(false); rccResetTIM12(); #if !defined(STM32_TIM12_SUPPRESS_ISR) nvicEnableVector(STM32_TIM12_NUMBER, STM32_GPT_TIM12_IRQ_PRIORITY); @@ -657,7 +657,7 @@ void gpt_lld_start(GPTDriver *gptp) { #if STM32_GPT_USE_TIM14 if (&GPTD14 == gptp) { - rccEnableTIM14(FALSE); + rccEnableTIM14(false); rccResetTIM14(); #if !defined(STM32_TIM14_SUPPRESS_ISR) nvicEnableVector(STM32_TIM14_NUMBER, STM32_GPT_TIM14_IRQ_PRIORITY); @@ -704,7 +704,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM1_SUPPRESS_ISR) nvicDisableVector(STM32_TIM1_UP_NUMBER); #endif - rccDisableTIM1(FALSE); + rccDisableTIM1(); } #endif @@ -713,7 +713,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM2_SUPPRESS_ISR) nvicDisableVector(STM32_TIM2_NUMBER); #endif - rccDisableTIM2(FALSE); + rccDisableTIM2(); } #endif @@ -722,7 +722,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM3_SUPPRESS_ISR) nvicDisableVector(STM32_TIM3_NUMBER); #endif - rccDisableTIM3(FALSE); + rccDisableTIM3(); } #endif @@ -731,7 +731,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM4_SUPPRESS_ISR) nvicDisableVector(STM32_TIM4_NUMBER); #endif - rccDisableTIM4(FALSE); + rccDisableTIM4(); } #endif @@ -740,7 +740,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM5_SUPPRESS_ISR) nvicDisableVector(STM32_TIM5_NUMBER); #endif - rccDisableTIM5(FALSE); + rccDisableTIM5(); } #endif @@ -749,7 +749,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM6_SUPPRESS_ISR) nvicDisableVector(STM32_TIM6_NUMBER); #endif - rccDisableTIM6(FALSE); + rccDisableTIM6(); } #endif @@ -758,7 +758,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM7_SUPPRESS_ISR) nvicDisableVector(STM32_TIM7_NUMBER); #endif - rccDisableTIM7(FALSE); + rccDisableTIM7(); } #endif @@ -767,7 +767,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM8_SUPPRESS_ISR) nvicDisableVector(STM32_TIM8_UP_NUMBER); #endif - rccDisableTIM8(FALSE); + rccDisableTIM8(); } #endif @@ -776,7 +776,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM9_SUPPRESS_ISR) nvicDisableVector(STM32_TIM9_NUMBER); #endif - rccDisableTIM9(FALSE); + rccDisableTIM9(); } #endif @@ -785,7 +785,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM11_SUPPRESS_ISR) nvicDisableVector(STM32_TIM11_NUMBER); #endif - rccDisableTIM11(FALSE); + rccDisableTIM11(); } #endif @@ -794,7 +794,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM12_SUPPRESS_ISR) nvicDisableVector(STM32_TIM12_NUMBER); #endif - rccDisableTIM12(FALSE); + rccDisableTIM12(); } #endif @@ -803,7 +803,7 @@ void gpt_lld_stop(GPTDriver *gptp) { #if !defined(STM32_TIM14_SUPPRESS_ISR) nvicDisableVector(STM32_TIM14_NUMBER); #endif - rccDisableTIM14(FALSE); + rccDisableTIM14(); } #endif } diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c index f1efa913e..861c07247 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_icu_lld.c @@ -395,7 +395,7 @@ void icu_lld_start(ICUDriver *icup) { /* Clock activation and timer reset.*/ #if STM32_ICU_USE_TIM1 if (&ICUD1 == icup) { - rccEnableTIM1(FALSE); + rccEnableTIM1(false); rccResetTIM1(); #if !defined(STM32_TIM1_SUPPRESS_ISR) nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_ICU_TIM1_IRQ_PRIORITY); @@ -411,7 +411,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM2 if (&ICUD2 == icup) { - rccEnableTIM2(FALSE); + rccEnableTIM2(false); rccResetTIM2(); #if !defined(STM32_TIM2_SUPPRESS_ISR) nvicEnableVector(STM32_TIM2_NUMBER, STM32_ICU_TIM2_IRQ_PRIORITY); @@ -426,7 +426,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM3 if (&ICUD3 == icup) { - rccEnableTIM3(FALSE); + rccEnableTIM3(false); rccResetTIM3(); #if !defined(STM32_TIM3_SUPPRESS_ISR) nvicEnableVector(STM32_TIM3_NUMBER, STM32_ICU_TIM3_IRQ_PRIORITY); @@ -441,7 +441,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM4 if (&ICUD4 == icup) { - rccEnableTIM4(FALSE); + rccEnableTIM4(false); rccResetTIM4(); #if !defined(STM32_TIM4_SUPPRESS_ISR) nvicEnableVector(STM32_TIM4_NUMBER, STM32_ICU_TIM4_IRQ_PRIORITY); @@ -456,7 +456,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM5 if (&ICUD5 == icup) { - rccEnableTIM5(FALSE); + rccEnableTIM5(false); rccResetTIM5(); #if !defined(STM32_TIM5_SUPPRESS_ISR) nvicEnableVector(STM32_TIM5_NUMBER, STM32_ICU_TIM5_IRQ_PRIORITY); @@ -471,7 +471,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM8 if (&ICUD8 == icup) { - rccEnableTIM8(FALSE); + rccEnableTIM8(false); rccResetTIM8(); #if !defined(STM32_TIM8_SUPPRESS_ISR) nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_ICU_TIM8_IRQ_PRIORITY); @@ -487,7 +487,7 @@ void icu_lld_start(ICUDriver *icup) { #if STM32_ICU_USE_TIM9 if (&ICUD9 == icup) { - rccEnableTIM9(FALSE); + rccEnableTIM9(false); rccResetTIM9(); #if !defined(STM32_TIM9_SUPPRESS_ISR) nvicEnableVector(STM32_TIM9_NUMBER, STM32_ICU_TIM9_IRQ_PRIORITY); @@ -592,7 +592,7 @@ void icu_lld_stop(ICUDriver *icup) { nvicDisableVector(STM32_TIM1_UP_NUMBER); nvicDisableVector(STM32_TIM1_CC_NUMBER); #endif - rccDisableTIM1(FALSE); + rccDisableTIM1(); } #endif @@ -601,7 +601,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM2_SUPPRESS_ISR) nvicDisableVector(STM32_TIM2_NUMBER); #endif - rccDisableTIM2(FALSE); + rccDisableTIM2(); } #endif @@ -610,7 +610,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM3_SUPPRESS_ISR) nvicDisableVector(STM32_TIM3_NUMBER); #endif - rccDisableTIM3(FALSE); + rccDisableTIM3(); } #endif @@ -619,7 +619,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM4_SUPPRESS_ISR) nvicDisableVector(STM32_TIM4_NUMBER); #endif - rccDisableTIM4(FALSE); + rccDisableTIM4(); } #endif @@ -628,7 +628,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM5_SUPPRESS_ISR) nvicDisableVector(STM32_TIM5_NUMBER); #endif - rccDisableTIM5(FALSE); + rccDisableTIM5(); } #endif @@ -638,7 +638,7 @@ void icu_lld_stop(ICUDriver *icup) { nvicDisableVector(STM32_TIM8_UP_NUMBER); nvicDisableVector(STM32_TIM8_CC_NUMBER); #endif - rccDisableTIM8(FALSE); + rccDisableTIM8(); } #endif @@ -647,7 +647,7 @@ void icu_lld_stop(ICUDriver *icup) { #if !defined(STM32_TIM9_SUPPRESS_ISR) nvicDisableVector(STM32_TIM9_NUMBER); #endif - rccDisableTIM9(FALSE); + rccDisableTIM9(); } #endif } diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c index 279170e16..c32b9e4a0 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_pwm_lld.c @@ -373,7 +373,7 @@ void pwm_lld_start(PWMDriver *pwmp) { /* Clock activation and timer reset.*/ #if STM32_PWM_USE_TIM1 if (&PWMD1 == pwmp) { - rccEnableTIM1(FALSE); + rccEnableTIM1(false); rccResetTIM1(); #if !defined(STM32_TIM1_SUPPRESS_ISR) nvicEnableVector(STM32_TIM1_UP_NUMBER, STM32_PWM_TIM1_IRQ_PRIORITY); @@ -389,7 +389,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM2 if (&PWMD2 == pwmp) { - rccEnableTIM2(FALSE); + rccEnableTIM2(false); rccResetTIM2(); #if !defined(STM32_TIM2_SUPPRESS_ISR) nvicEnableVector(STM32_TIM2_NUMBER, STM32_PWM_TIM2_IRQ_PRIORITY); @@ -404,7 +404,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM3 if (&PWMD3 == pwmp) { - rccEnableTIM3(FALSE); + rccEnableTIM3(false); rccResetTIM3(); #if !defined(STM32_TIM3_SUPPRESS_ISR) nvicEnableVector(STM32_TIM3_NUMBER, STM32_PWM_TIM3_IRQ_PRIORITY); @@ -419,7 +419,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM4 if (&PWMD4 == pwmp) { - rccEnableTIM4(FALSE); + rccEnableTIM4(false); rccResetTIM4(); #if !defined(STM32_TIM4_SUPPRESS_ISR) nvicEnableVector(STM32_TIM4_NUMBER, STM32_PWM_TIM4_IRQ_PRIORITY); @@ -434,7 +434,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM5 if (&PWMD5 == pwmp) { - rccEnableTIM5(FALSE); + rccEnableTIM5(false); rccResetTIM5(); #if !defined(STM32_TIM5_SUPPRESS_ISR) nvicEnableVector(STM32_TIM5_NUMBER, STM32_PWM_TIM5_IRQ_PRIORITY); @@ -449,7 +449,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM8 if (&PWMD8 == pwmp) { - rccEnableTIM8(FALSE); + rccEnableTIM8(false); rccResetTIM8(); #if !defined(STM32_TIM8_SUPPRESS_ISR) nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_PWM_TIM8_IRQ_PRIORITY); @@ -465,7 +465,7 @@ void pwm_lld_start(PWMDriver *pwmp) { #if STM32_PWM_USE_TIM9 if (&PWMD9 == pwmp) { - rccEnableTIM9(FALSE); + rccEnableTIM9(false); rccResetTIM9(); #if !defined(STM32_TIM9_SUPPRESS_ISR) nvicEnableVector(STM32_TIM9_NUMBER, STM32_PWM_TIM9_IRQ_PRIORITY); @@ -640,7 +640,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { nvicDisableVector(STM32_TIM1_UP_NUMBER); nvicDisableVector(STM32_TIM1_CC_NUMBER); #endif - rccDisableTIM1(FALSE); + rccDisableTIM1(); } #endif @@ -649,7 +649,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM2_SUPPRESS_ISR) nvicDisableVector(STM32_TIM2_NUMBER); #endif - rccDisableTIM2(FALSE); + rccDisableTIM2(); } #endif @@ -658,7 +658,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM3_SUPPRESS_ISR) nvicDisableVector(STM32_TIM3_NUMBER); #endif - rccDisableTIM3(FALSE); + rccDisableTIM3(); } #endif @@ -667,7 +667,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM4_SUPPRESS_ISR) nvicDisableVector(STM32_TIM4_NUMBER); #endif - rccDisableTIM4(FALSE); + rccDisableTIM4(); } #endif @@ -676,7 +676,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM5_SUPPRESS_ISR) nvicDisableVector(STM32_TIM5_NUMBER); #endif - rccDisableTIM5(FALSE); + rccDisableTIM5(); } #endif @@ -686,7 +686,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { nvicDisableVector(STM32_TIM8_UP_NUMBER); nvicDisableVector(STM32_TIM8_CC_NUMBER); #endif - rccDisableTIM8(FALSE); + rccDisableTIM8(); } #endif @@ -695,7 +695,7 @@ void pwm_lld_stop(PWMDriver *pwmp) { #if !defined(STM32_TIM9_SUPPRESS_ISR) nvicDisableVector(STM32_TIM9_NUMBER); #endif - rccDisableTIM9(FALSE); + rccDisableTIM9(); } #endif } diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c index 292a16837..9625ad28c 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_st_lld.c @@ -52,7 +52,7 @@ #define ST_HANDLER STM32_TIM2_HANDLER #define ST_NUMBER STM32_TIM2_NUMBER #define ST_CLOCK_SRC STM32_TIMCLK1 -#define ST_ENABLE_CLOCK() rccEnableTIM2(FALSE) +#define ST_ENABLE_CLOCK() rccEnableTIM2(false) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM2_STOP #elif defined(STM32L4XX) @@ -77,7 +77,7 @@ #define ST_HANDLER STM32_TIM3_HANDLER #define ST_NUMBER STM32_TIM3_NUMBER #define ST_CLOCK_SRC STM32_TIMCLK1 -#define ST_ENABLE_CLOCK() rccEnableTIM3(FALSE) +#define ST_ENABLE_CLOCK() rccEnableTIM3(false) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM3_STOP #elif defined(STM32L4XX) @@ -102,7 +102,7 @@ #define ST_HANDLER STM32_TIM4_HANDLER #define ST_NUMBER STM32_TIM4_NUMBER #define ST_CLOCK_SRC STM32_TIMCLK1 -#define ST_ENABLE_CLOCK() rccEnableTIM4(FALSE) +#define ST_ENABLE_CLOCK() rccEnableTIM4(false) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM4_STOP #elif defined(STM32L4XX) @@ -127,7 +127,7 @@ #define ST_HANDLER STM32_TIM5_HANDLER #define ST_NUMBER STM32_TIM5_NUMBER #define ST_CLOCK_SRC STM32_TIMCLK1 -#define ST_ENABLE_CLOCK() rccEnableTIM5(FALSE) +#define ST_ENABLE_CLOCK() rccEnableTIM5(false) #if defined(STM32F1XX) #define ST_ENABLE_STOP() DBGMCU->CR |= DBGMCU_CR_DBG_TIM5_STOP #elif defined(STM32L4XX) @@ -152,7 +152,7 @@ #define ST_HANDLER STM32_TIM21_HANDLER #define ST_NUMBER STM32_TIM21_NUMBER #define ST_CLOCK_SRC STM32_TIMCLK2 -#define ST_ENABLE_CLOCK() rccEnableTIM21(FALSE) +#define ST_ENABLE_CLOCK() rccEnableTIM21(false) #define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB2_FZ_DBG_TIM21_STOP #elif STM32_ST_USE_TIMER == 22 @@ -169,7 +169,7 @@ #define ST_HANDLER STM32_TIM22_HANDLER #define ST_NUMBER STM32_TIM22_NUMBER #define ST_CLOCK_SRC STM32_TIMCLK2 -#define ST_ENABLE_CLOCK() rccEnableTIM22(FALSE) +#define ST_ENABLE_CLOCK() rccEnableTIM22(false) #define ST_ENABLE_STOP() DBGMCU->APB1FZ |= DBGMCU_APB2_FZ_DBG_TIM21_STOP #else diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c index b76c06ef5..bed91861e 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_serial_lld.c @@ -513,49 +513,49 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { if (sdp->state == SD_STOP) { #if STM32_SERIAL_USE_USART1 if (&SD1 == sdp) { - rccEnableUSART1(FALSE); + rccEnableUSART1(false); nvicEnableVector(STM32_USART1_NUMBER, STM32_SERIAL_USART1_PRIORITY); } #endif #if STM32_SERIAL_USE_USART2 if (&SD2 == sdp) { - rccEnableUSART2(FALSE); + rccEnableUSART2(false); nvicEnableVector(STM32_USART2_NUMBER, STM32_SERIAL_USART2_PRIORITY); } #endif #if STM32_SERIAL_USE_USART3 if (&SD3 == sdp) { - rccEnableUSART3(FALSE); + rccEnableUSART3(false); nvicEnableVector(STM32_USART3_NUMBER, STM32_SERIAL_USART3_PRIORITY); } #endif #if STM32_SERIAL_USE_UART4 if (&SD4 == sdp) { - rccEnableUART4(FALSE); + rccEnableUART4(false); nvicEnableVector(STM32_UART4_NUMBER, STM32_SERIAL_UART4_PRIORITY); } #endif #if STM32_SERIAL_USE_UART5 if (&SD5 == sdp) { - rccEnableUART5(FALSE); + rccEnableUART5(false); nvicEnableVector(STM32_UART5_NUMBER, STM32_SERIAL_UART5_PRIORITY); } #endif #if STM32_SERIAL_USE_USART6 if (&SD6 == sdp) { - rccEnableUSART6(FALSE); + rccEnableUSART6(false); nvicEnableVector(STM32_USART6_NUMBER, STM32_SERIAL_USART6_PRIORITY); } #endif #if STM32_SERIAL_USE_UART7 if (&SD7 == sdp) { - rccEnableUART7(FALSE); + rccEnableUART7(false); nvicEnableVector(STM32_UART7_NUMBER, STM32_SERIAL_UART7_PRIORITY); } #endif #if STM32_SERIAL_USE_UART8 if (&SD8 == sdp) { - rccEnableUART8(FALSE); + rccEnableUART8(false); nvicEnableVector(STM32_UART8_NUMBER, STM32_SERIAL_UART8_PRIORITY); } #endif @@ -578,56 +578,56 @@ void sd_lld_stop(SerialDriver *sdp) { usart_deinit(sdp->usart); #if STM32_SERIAL_USE_USART1 if (&SD1 == sdp) { - rccDisableUSART1(FALSE); + rccDisableUSART1(); nvicDisableVector(STM32_USART1_NUMBER); return; } #endif #if STM32_SERIAL_USE_USART2 if (&SD2 == sdp) { - rccDisableUSART2(FALSE); + rccDisableUSART2(); nvicDisableVector(STM32_USART2_NUMBER); return; } #endif #if STM32_SERIAL_USE_USART3 if (&SD3 == sdp) { - rccDisableUSART3(FALSE); + rccDisableUSART3(); nvicDisableVector(STM32_USART3_NUMBER); return; } #endif #if STM32_SERIAL_USE_UART4 if (&SD4 == sdp) { - rccDisableUART4(FALSE); + rccDisableUART4(); nvicDisableVector(STM32_UART4_NUMBER); return; } #endif #if STM32_SERIAL_USE_UART5 if (&SD5 == sdp) { - rccDisableUART5(FALSE); + rccDisableUART5(); nvicDisableVector(STM32_UART5_NUMBER); return; } #endif #if STM32_SERIAL_USE_USART6 if (&SD6 == sdp) { - rccDisableUSART6(FALSE); + rccDisableUSART6(); nvicDisableVector(STM32_USART6_NUMBER); return; } #endif #if STM32_SERIAL_USE_UART7 if (&SD7 == sdp) { - rccDisableUART7(FALSE); + rccDisableUART7(); nvicDisableVector(STM32_UART7_NUMBER); return; } #endif #if STM32_SERIAL_USE_UART8 if (&SD8 == sdp) { - rccDisableUART8(FALSE); + rccDisableUART8(); nvicDisableVector(STM32_UART8_NUMBER); return; } diff --git a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c index 54c1632b3..31a8f179b 100644 --- a/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv1/hal_uart_lld.c @@ -514,7 +514,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART1(FALSE); + rccEnableUSART1(false); nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY); @@ -534,7 +534,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART2(FALSE); + rccEnableUSART2(false); nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY); @@ -554,7 +554,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART3(FALSE); + rccEnableUSART3(false); nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY); @@ -580,7 +580,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUART4(FALSE); + rccEnableUART4(false); nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY); uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY); @@ -606,7 +606,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUART5(FALSE); + rccEnableUART5(false); nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY); uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY); @@ -626,7 +626,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART6(FALSE); + rccEnableUSART6(false); nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY); @@ -664,7 +664,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART1 if (&UARTD1 == uartp) { nvicDisableVector(STM32_USART1_NUMBER); - rccDisableUSART1(FALSE); + rccDisableUSART1(); return; } #endif @@ -672,7 +672,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART2 if (&UARTD2 == uartp) { nvicDisableVector(STM32_USART2_NUMBER); - rccDisableUSART2(FALSE); + rccDisableUSART2(); return; } #endif @@ -680,7 +680,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART3 if (&UARTD3 == uartp) { nvicDisableVector(STM32_USART3_NUMBER); - rccDisableUSART3(FALSE); + rccDisableUSART3(); return; } #endif @@ -688,7 +688,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_UART4 if (&UARTD4 == uartp) { nvicDisableVector(STM32_UART4_NUMBER); - rccDisableUART4(FALSE); + rccDisableUART4(); return; } #endif @@ -696,7 +696,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_UART5 if (&UARTD5 == uartp) { nvicDisableVector(STM32_UART5_NUMBER); - rccDisableUART5(FALSE); + rccDisableUART5(); return; } #endif @@ -704,7 +704,7 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART6 if (&UARTD6 == uartp) { nvicDisableVector(STM32_USART6_NUMBER); - rccDisableUSART6(FALSE); + rccDisableUSART6(); return; } #endif diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c index 4014ab5bb..7e4ee6f60 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c @@ -767,47 +767,47 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { if (sdp->state == SD_STOP) { #if STM32_SERIAL_USE_USART1 if (&SD1 == sdp) { - rccEnableUSART1(FALSE); + rccEnableUSART1(false); } #endif #if STM32_SERIAL_USE_USART2 if (&SD2 == sdp) { - rccEnableUSART2(FALSE); + rccEnableUSART2(false); } #endif #if STM32_SERIAL_USE_USART3 if (&SD3 == sdp) { - rccEnableUSART3(FALSE); + rccEnableUSART3(false); } #endif #if STM32_SERIAL_USE_UART4 if (&SD4 == sdp) { - rccEnableUART4(FALSE); + rccEnableUART4(false); } #endif #if STM32_SERIAL_USE_UART5 if (&SD5 == sdp) { - rccEnableUART5(FALSE); + rccEnableUART5(false); } #endif #if STM32_SERIAL_USE_USART6 if (&SD6 == sdp) { - rccEnableUSART6(FALSE); + rccEnableUSART6(false); } #endif #if STM32_SERIAL_USE_UART7 if (&SD7 == sdp) { - rccEnableUART7(FALSE); + rccEnableUART7(false); } #endif #if STM32_SERIAL_USE_UART8 if (&SD8 == sdp) { - rccEnableUART8(FALSE); + rccEnableUART8(false); } #endif #if STM32_SERIAL_USE_LPUART1 if (&LPSD1 == sdp) { - rccEnableLPUART1(FALSE); + rccEnableLPUART1(false); } #endif } @@ -831,55 +831,55 @@ void sd_lld_stop(SerialDriver *sdp) { #if STM32_SERIAL_USE_USART1 if (&SD1 == sdp) { - rccDisableUSART1(FALSE); + rccDisableUSART1(); return; } #endif #if STM32_SERIAL_USE_USART2 if (&SD2 == sdp) { - rccDisableUSART2(FALSE); + rccDisableUSART2(); return; } #endif #if STM32_SERIAL_USE_USART3 if (&SD3 == sdp) { - rccDisableUSART3(FALSE); + rccDisableUSART3(); return; } #endif #if STM32_SERIAL_USE_UART4 if (&SD4 == sdp) { - rccDisableUART4(FALSE); + rccDisableUART4(); return; } #endif #if STM32_SERIAL_USE_UART5 if (&SD5 == sdp) { - rccDisableUART5(FALSE); + rccDisableUART5(); return; } #endif #if STM32_SERIAL_USE_USART6 if (&SD6 == sdp) { - rccDisableUSART6(FALSE); + rccDisableUSART6(); return; } #endif #if STM32_SERIAL_USE_UART7 if (&SD7 == sdp) { - rccDisableUART7(FALSE); + rccDisableUART7(); return; } #endif #if STM32_SERIAL_USE_UART8 if (&SD8 == sdp) { - rccDisableUART8(FALSE); + rccDisableUART8(); return; } #endif #if STM32_SERIAL_USE_LPUART1 if (&LPSD1 == sdp) { - rccDisableLPUART1(FALSE); + rccDisableLPUART1(); return; } #endif diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c index 9fd66fa87..ede3fa8fb 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c @@ -709,7 +709,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART1(FALSE); + rccEnableUSART1(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY); } @@ -728,7 +728,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART2(FALSE); + rccEnableUSART2(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY); } @@ -747,7 +747,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART3(FALSE); + rccEnableUSART3(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY); } @@ -766,7 +766,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUART4(FALSE); + rccEnableUART4(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY); } @@ -785,7 +785,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUART5(FALSE); + rccEnableUART5(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY); } @@ -804,7 +804,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUSART6(FALSE); + rccEnableUSART6(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY); } @@ -823,7 +823,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUART7(FALSE); + rccEnableUART7(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(UART7_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_UART7_DMA_PRIORITY); } @@ -842,7 +842,7 @@ void uart_lld_start(UARTDriver *uartp) { (stm32_dmaisr_t)uart_lld_serve_tx_end_irq, (void *)uartp); osalDbgAssert(!b, "stream already allocated"); - rccEnableUART8(FALSE); + rccEnableUART8(false); uartp->dmamode |= STM32_DMA_CR_CHSEL(UART8_RX_DMA_CHANNEL) | STM32_DMA_CR_PL(STM32_UART_UART8_DMA_PRIORITY); } @@ -878,56 +878,56 @@ void uart_lld_stop(UARTDriver *uartp) { #if STM32_UART_USE_USART1 if (&UARTD1 == uartp) { - rccDisableUSART1(FALSE); + rccDisableUSART1(); return; } #endif #if STM32_UART_USE_USART2 if (&UARTD2 == uartp) { - rccDisableUSART2(FALSE); + rccDisableUSART2(); return; } #endif #if STM32_UART_USE_USART3 if (&UARTD3 == uartp) { - rccDisableUSART3(FALSE); + rccDisableUSART3(); return; } #endif #if STM32_UART_USE_UART4 if (&UARTD4 == uartp) { - rccDisableUART4(FALSE); + rccDisableUART4(); return; } #endif #if STM32_UART_USE_UART5 if (&UARTD5 == uartp) { - rccDisableUART5(FALSE); + rccDisableUART5(); return; } #endif #if STM32_UART_USE_USART6 if (&UARTD6 == uartp) { - rccDisableUSART6(FALSE); + rccDisableUSART6(); return; } #endif #if STM32_UART_USE_UART7 if (&UARTD7 == uartp) { - rccDisableUART7(FALSE); + rccDisableUART7(); return; } #endif #if STM32_UART_USE_UART8 if (&UARTD8 == uartp) { - rccDisableUART8(FALSE); + rccDisableUART8(); return; } #endif diff --git a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c index 8872771b2..9f5a56952 100644 --- a/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c +++ b/os/hal/ports/STM32/LLD/USBv1/hal_usb_lld.c @@ -478,7 +478,7 @@ void usb_lld_start(USBDriver *usbp) { #if STM32_USB_USE_USB1 if (&USBD1 == usbp) { /* USB clock enabled.*/ - rccEnableUSB(FALSE); + rccEnableUSB(false); /* Powers up the transceiver while holding the USB in reset state.*/ STM32_USB->CNTR = CNTR_FRES; /* Enabling the USB IRQ vectors, this also gives enough time to allow @@ -514,7 +514,7 @@ void usb_lld_stop(USBDriver *usbp) { #endif nvicDisableVector(STM32_USB1_LP_NUMBER); STM32_USB->CNTR = CNTR_PDWN | CNTR_FRES; - rccDisableUSB(FALSE); + rccDisableUSB(); } #endif } diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h index d25d5735b..d99cf606e 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -66,14 +66,12 @@ /** * @brief Disables the clock of one or more peripheral on the APB1 bus. - * @note The @p lp parameter is ignored in this family. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ } @@ -104,14 +102,12 @@ /** * @brief Disables the clock of one or more peripheral on the APB2 bus. - * @note The @p lp parameter is ignored in this family. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ } @@ -142,14 +138,12 @@ /** * @brief Disables the clock of one or more peripheral on the AHB bus. - * @note The @p lp parameter is ignored in this family. * * @param[in] mask AHB peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB(mask, lp) { \ +#define rccDisableAHB(mask) { \ RCC->AHBENR &= ~(mask); \ } @@ -182,13 +176,10 @@ /** * @brief Disables the ADC1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -214,13 +205,10 @@ /** * @brief Disables the CAN1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CANEN, lp) +#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CANEN) /** * @brief Resets the CAN1 peripheral. @@ -236,6 +224,7 @@ */ /** * @brief Enables the DAC1 peripheral clock. + * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -246,11 +235,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN) /** * @brief Resets the DAC1 peripheral. @@ -276,13 +263,10 @@ /** * @brief Disables PWR interface clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -308,13 +292,10 @@ /** * @brief Disables the DMA1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -336,13 +317,10 @@ /** * @brief Disables the DMA2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -369,13 +347,10 @@ /** * @brief Disables the I2C1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -396,13 +371,10 @@ /** * @brief Disables the I2C2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -428,13 +400,10 @@ /** * @brief Disables the SPI1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -455,13 +424,10 @@ /** * @brief Disables the SPI2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -487,13 +453,10 @@ /** * @brief Disables the TIM1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -514,13 +477,10 @@ /** * @brief Disables the TIM2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -541,13 +501,10 @@ /** * @brief Disables the TIM3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -568,13 +525,10 @@ /** * @brief Disables the TIM6 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -595,13 +549,10 @@ /** * @brief Disables the TIM7 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -622,13 +573,10 @@ /** * @brief Disables the TIM14 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp) +#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN) /** * @brief Resets the TIM14 peripheral. @@ -649,13 +597,10 @@ /** * @brief Disables the TIM15 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp) +#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN) /** * @brief Resets the TIM15 peripheral. @@ -676,13 +621,10 @@ /** * @brief Disables the TIM16 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp) +#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN) /** * @brief Resets the TIM16 peripheral. @@ -703,13 +645,10 @@ /** * @brief Disables the TIM17 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp) +#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN) /** * @brief Resets the TIM17 peripheral. @@ -735,13 +674,10 @@ /** * @brief Disables the USART1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -762,13 +698,10 @@ /** * @brief Disables the USART2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -789,13 +722,10 @@ /** * @brief Disables the USART3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -816,13 +746,10 @@ /** * @brief Disables the USART4 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_USART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_USART4EN) /** * @brief Resets the USART4 peripheral. @@ -843,13 +770,10 @@ /** * @brief Disables the USART5 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_USART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_USART5EN) /** * @brief Resets the USART5 peripheral. @@ -860,6 +784,7 @@ /** * @brief Enables the USART6 peripheral clock. + * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -870,11 +795,9 @@ /** * @brief Disables the USART6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp) +#define rccDisableUSART6() rccDisableAPB2(RCC_APB2ENR_USART6EN) /** * @brief Resets the USART6 peripheral. @@ -890,6 +813,7 @@ */ /** * @brief Enables the USB peripheral clock. + * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -900,11 +824,9 @@ /** * @brief Disables the USB peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp) +#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN) /** * @brief Resets the USB peripheral. @@ -930,13 +852,10 @@ /** * @brief Disables the CRC peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableCRC(lp) rccDisableAHB(RCC_AHBENR_CRCEN, lp) +#define rccDisableCRC() rccDisableAHB(RCC_AHBENR_CRCEN) /** * @brief Resets the CRC peripheral. @@ -962,13 +881,10 @@ /** * @brief Disables the WWDG peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableWWDG(lp) rccDisableAPB1(RCC_APB1ENR_WWDGEN, lp) +#define rccDisableWWDG() rccDisableAPB1(RCC_APB1ENR_WWDGEN) /** * @brief Resets the WWDG peripheral. @@ -989,6 +905,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c b/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c index 2f3f7cfa8..8bd671d58 100644 --- a/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c +++ b/os/hal/ports/STM32/STM32F1xx/hal_adc_lld.c @@ -99,7 +99,7 @@ void adc_lld_init(void) { STM32_DMA_CR_TEIE; /* Temporary activation.*/ - rccEnableADC1(FALSE); + rccEnableADC1(false); ADC1->CR1 = 0; ADC1->CR2 = ADC_CR2_ADON; @@ -115,7 +115,7 @@ void adc_lld_init(void) { /* Return the ADC in low power mode.*/ ADC1->CR2 = 0; - rccDisableADC1(FALSE); + rccDisableADC1(); #endif } @@ -139,7 +139,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR); - rccEnableADC1(FALSE); + rccEnableADC1(false); } #endif @@ -166,7 +166,7 @@ void adc_lld_stop(ADCDriver *adcp) { ADC1->CR1 = 0; ADC1->CR2 = 0; dmaStreamRelease(adcp->dmastp); - rccDisableADC1(FALSE); + rccDisableADC1(); } #endif } diff --git a/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h index 6abb74876..5ac7bd478 100644 --- a/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F1xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -69,11 +69,10 @@ * @note The @p lp parameter is ignored in this family. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ } @@ -107,11 +106,10 @@ * @note The @p lp parameter is ignored in this family. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ } @@ -145,11 +143,10 @@ * @note The @p lp parameter is ignored in this family. * * @param[in] mask AHB peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB(mask, lp) { \ +#define rccDisableAHB(mask) { \ RCC->AHBENR &= ~(mask); \ } @@ -182,13 +179,10 @@ /** * @brief Disables the ADC1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -214,11 +208,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN) /** * @brief Resets the DAC1 peripheral. @@ -244,13 +236,10 @@ /** * @brief Disables BKP interface clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableBKPInterface(lp) rccDisableAPB1((RCC_APB1ENR_BKPEN), lp) +#define rccDisableBKPInterface() rccDisableAPB1(RCC_APB1ENR_BKPEN) /** * @brief Resets the Backup Domain interface. @@ -283,13 +272,10 @@ /** * @brief Disables PWR interface clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -315,13 +301,10 @@ /** * @brief Disables the CAN1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp) +#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CAN1EN) /** * @brief Resets the CAN1 peripheral. @@ -342,11 +325,9 @@ /** * @brief Disables the CAN2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN2(lp) rccDisableAPB1(RCC_APB1ENR_CAN2EN, lp) +#define rccDisableCAN2() rccDisableAPB1(RCC_APB1ENR_CAN2EN) /** * @brief Resets the CAN2 peripheral. @@ -372,13 +353,10 @@ /** * @brief Disables the DMA1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -400,13 +378,10 @@ /** * @brief Disables the DMA2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN) /** * @brief Resets the DMA1 peripheral. @@ -441,9 +416,9 @@ * * @api */ -#define rccDisableETH(lp) rccDisableAHB(RCC_AHBENR_ETHMACEN | \ - RCC_AHBENR_ETHMACTXEN | \ - RCC_AHBENR_ETHMACRXEN, lp) +#define rccDisableETH() rccDisableAHB(RCC_AHBENR_ETHMACEN | \ + RCC_AHBENR_ETHMACTXEN | \ + RCC_AHBENR_ETHMACRXEN) /** * @brief Resets the ETH peripheral. @@ -469,13 +444,10 @@ /** * @brief Disables the I2C1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -496,13 +468,10 @@ /** * @brief Disables the I2C2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -528,11 +497,9 @@ /** * @brief Disables the OTG_FS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_FS(lp) rccDisableAHB(RCC_AHBENR_OTGFSEN, lp) +#define rccDisableOTG_FS() rccDisableAHB(RCC_AHBENR_OTGFSEN) /** * @brief Resets the OTG_FS peripheral. @@ -558,13 +525,10 @@ /** * @brief Disables the SDIO peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSDIO(lp) rccDisableAHB(RCC_AHBENR_SDIOEN, lp) +#define rccDisableSDIO() rccDisableAHB(RCC_AHBENR_SDIOEN) /** * @brief Resets the SDIO peripheral. @@ -591,13 +555,10 @@ /** * @brief Disables the SPI1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -618,13 +579,10 @@ /** * @brief Disables the SPI2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -645,13 +603,10 @@ /** * @brief Disables the SPI3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp) +#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN) /** * @brief Resets the SPI3 peripheral. @@ -677,13 +632,10 @@ /** * @brief Disables the TIM1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -704,13 +656,10 @@ /** * @brief Disables the TIM2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -731,13 +680,10 @@ /** * @brief Disables the TIM3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -758,13 +704,10 @@ /** * @brief Disables the TIM4 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -785,13 +728,10 @@ /** * @brief Disables the TIM5 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp) +#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -812,11 +752,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -837,11 +775,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -862,13 +798,10 @@ /** * @brief Disables the TIM8 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM8(lp) rccDisableAPB2(RCC_APB2ENR_TIM8EN, lp) +#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN) /** * @brief Resets the TIM8 peripheral. @@ -892,14 +825,10 @@ /** * @brief Disables the TIM9 peripheral clock. - - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp) +#define rccDisableTIM9() rccDisableAPB2(RCC_APB2ENR_TIM9EN) /** * @brief Resets the TIM9 peripheral. @@ -920,13 +849,10 @@ /** * @brief Disables the TIM10 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp) +#define rccDisableTIM10() rccDisableAPB2(RCC_APB2ENR_TIM10EN) /** * @brief Resets the TIM10 peripheral. @@ -947,13 +873,10 @@ /** * @brief Disables the TIM11 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp) +#define rccDisableTIM11() rccDisableAPB2(RCC_APB2ENR_TIM11EN) /** * @brief Resets the TIM11 peripheral. @@ -974,13 +897,10 @@ /** * @brief Disables the TIM12 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp) +#define rccDisableTIM12() rccDisableAPB1(RCC_APB1ENR_TIM12EN) /** * @brief Resets the TIM12 peripheral. @@ -1001,13 +921,10 @@ /** * @brief Disables the TIM13 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM13(lp) rccDisableAPB1(RCC_APB1ENR_TIM13EN, lp) +#define rccDisableTIM13() rccDisableAPB1(RCC_APB1ENR_TIM13EN) /** * @brief Resets the TIM13 peripheral. @@ -1028,13 +945,10 @@ /** * @brief Disables the TIM14 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp) +#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN) /** * @brief Resets the TIM14 peripheral. @@ -1055,13 +969,10 @@ /** * @brief Disables the TIM15 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp) +#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN) /** * @brief Resets the TIM15 peripheral. @@ -1082,13 +993,10 @@ /** * @brief Disables the TIM16 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp) +#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN) /** * @brief Resets the TIM16 peripheral. @@ -1109,13 +1017,10 @@ /** * @brief Disables the TIM17 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp) +#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN) /** * @brief Resets the TIM17 peripheral. @@ -1141,13 +1046,10 @@ /** * @brief Disables the USART1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -1168,13 +1070,10 @@ /** * @brief Disables the USART2 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -1195,13 +1094,10 @@ /** * @brief Disables the USART3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -1222,13 +1118,10 @@ /** * @brief Disables the UART4 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -1249,13 +1142,10 @@ /** * @brief Disables the UART5 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -1280,14 +1170,11 @@ #define rccEnableUSB(lp) rccEnableAPB1(RCC_APB1ENR_USBEN, lp) /** - * @brief Disables the USB peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag + * @brief Disables the USB peripheral clock * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp) +#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN) /** * @brief Resets the USB peripheral. @@ -1313,11 +1200,9 @@ /** * @brief Disables the FSMC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableFSMC(lp) rccDisableAHB(RCC_AHBENR_FSMCEN, lp) +#define rccDisableFSMC() rccDisableAHB(RCC_AHBENR_FSMCEN) /** @} */ /*===========================================================================*/ @@ -1331,6 +1216,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32F37x/hal_adc_lld.c b/os/hal/ports/STM32/STM32F37x/hal_adc_lld.c index e66d75b29..2a36f9827 100644 --- a/os/hal/ports/STM32/STM32F37x/hal_adc_lld.c +++ b/os/hal/ports/STM32/STM32F37x/hal_adc_lld.c @@ -398,7 +398,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR); - rccEnableADC1(FALSE); + rccEnableADC1(false); } #endif /* STM32_ADC_USE_ADC1 */ @@ -410,7 +410,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &SDADC1->JDATAR); - rccEnableSDADC1(FALSE); + rccEnableSDADC1(false); PWR->CR |= PWR_CR_SDADC1EN; adcp->sdadc->CR2 = 0; adcp->sdadc->CR1 = (adcp->config->cr1 | SDADC_ENFORCED_CR1_FLAGS) & @@ -427,7 +427,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &SDADC2->JDATAR); - rccEnableSDADC2(FALSE); + rccEnableSDADC2(false); PWR->CR |= PWR_CR_SDADC2EN; adcp->sdadc->CR2 = 0; adcp->sdadc->CR1 = (adcp->config->cr1 | SDADC_ENFORCED_CR1_FLAGS) & @@ -444,7 +444,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &SDADC3->JDATAR); - rccEnableSDADC3(FALSE); + rccEnableSDADC3(false); PWR->CR |= PWR_CR_SDADC3EN; adcp->sdadc->CR2 = 0; adcp->sdadc->CR1 = (adcp->config->cr1 | SDADC_ENFORCED_CR1_FLAGS) & @@ -474,7 +474,7 @@ void adc_lld_stop(ADCDriver *adcp) { if (&ADCD1 == adcp) { adcp->adc->CR1 = 0; adcp->adc->CR2 = 0; - rccDisableADC1(FALSE); + rccDisableADC1(); } #endif @@ -482,7 +482,7 @@ void adc_lld_stop(ADCDriver *adcp) { if (&SDADCD1 == adcp) { adcp->sdadc->CR1 = 0; adcp->sdadc->CR2 = 0; - rccDisableSDADC1(FALSE); + rccDisableSDADC1(); PWR->CR &= ~PWR_CR_SDADC1EN; } #endif @@ -491,7 +491,7 @@ void adc_lld_stop(ADCDriver *adcp) { if (&SDADCD2 == adcp) { adcp->sdadc->CR1 = 0; adcp->sdadc->CR2 = 0; - rccDisableSDADC2(FALSE); + rccDisableSDADC2(); PWR->CR &= ~PWR_CR_SDADC2EN; } #endif @@ -500,7 +500,7 @@ void adc_lld_stop(ADCDriver *adcp) { if (&SDADCD3 == adcp) { adcp->sdadc->CR1 = 0; adcp->sdadc->CR2 = 0; - rccDisableSDADC3(FALSE); + rccDisableSDADC3(); PWR->CR &= ~PWR_CR_SDADC3EN; } #endif diff --git a/os/hal/ports/STM32/STM32F37x/stm32_rcc.h b/os/hal/ports/STM32/STM32F37x/stm32_rcc.h index 5310ab103..c043a57c0 100644 --- a/os/hal/ports/STM32/STM32F37x/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F37x/stm32_rcc.h @@ -24,8 +24,8 @@ * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -67,11 +67,10 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ } @@ -103,11 +102,10 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ } @@ -139,11 +137,10 @@ * @brief Disables the clock of one or more peripheral on the AHB bus. * * @param[in] mask AHB peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB(mask, lp) { \ +#define rccDisableAHB(mask) { \ RCC->AHBENR &= ~(mask); \ } @@ -176,11 +173,9 @@ /** * @brief Disables the ADC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -206,11 +201,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DAC1EN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DAC1EN) /** * @brief Resets the DAC1 peripheral. @@ -231,11 +224,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC2(lp) rccDisableAPB1(RCC_APB1ENR_DAC2EN, lp) +#define rccDisableDAC2() rccDisableAPB1(RCC_APB1ENR_DAC2EN) /** * @brief Resets the DAC1 peripheral. @@ -261,13 +252,10 @@ /** * @brief Disables the CAN1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CANEN, lp) +#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CANEN) /** * @brief Resets the CAN1 peripheral. @@ -293,11 +281,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -318,11 +304,9 @@ /** * @brief Disables the DMA2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -348,13 +332,10 @@ /** * @brief Disables PWR interface clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -380,11 +361,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -405,11 +384,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -435,11 +412,9 @@ /** * @brief Disables the SDADC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSDADC1(lp) rccDisableAPB2(RCC_APB2ENR_SDADC1EN, lp) +#define rccDisableSDADC1() rccDisableAPB2(RCC_APB2ENR_SDADC1EN) /** * @brief Resets the SDADC1 peripheral. @@ -460,11 +435,9 @@ /** * @brief Disables the SDADC2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSDADC2(lp) rccDisableAPB2(RCC_APB2ENR_SDADC2EN, lp) +#define rccDisableSDADC2() rccDisableAPB2(RCC_APB2ENR_SDADC2EN) /** * @brief Resets the SDADC2 peripheral. @@ -485,11 +458,9 @@ /** * @brief Disables the SDADC3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSDADC3(lp) rccDisableAPB2(RCC_APB2ENR_SDADC3EN, lp) +#define rccDisableSDADC3() rccDisableAPB2(RCC_APB2ENR_SDADC3EN) /** * @brief Resets the SDADC3 peripheral. @@ -515,11 +486,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -540,11 +509,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -565,13 +532,10 @@ /** * @brief Disables the SPI3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp) +#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN) /** * @brief Resets the SPI3 peripheral. @@ -597,11 +561,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -622,11 +584,9 @@ /** * @brief Disables the TIM3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -647,11 +607,9 @@ /** * @brief Disables the TIM4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -672,11 +630,9 @@ /** * @brief Disables the TIM5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp) +#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -697,11 +653,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -722,11 +676,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -747,11 +699,9 @@ /** * @brief Disables the TIM12 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp) +#define rccDisableTIM12() rccDisableAPB1(RCC_APB1ENR_TIM12EN) /** * @brief Resets the TIM12 peripheral. @@ -772,11 +722,9 @@ /** * @brief Disables the TIM13 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM13(lp) rccDisableAPB1(RCC_APB1ENR_TIM13EN, lp) +#define rccDisableTIM13() rccDisableAPB1(RCC_APB1ENR_TIM13EN) /** * @brief Resets the TIM13 peripheral. @@ -798,11 +746,9 @@ /** * @brief Disables the TIM14 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp) +#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN) /** * @brief Resets the TIM14 peripheral. @@ -823,11 +769,9 @@ /** * @brief Disables the TIM15 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp) +#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN) /** * @brief Resets the TIM15 peripheral. @@ -848,11 +792,9 @@ /** * @brief Disables the TIM16 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp) +#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN) /** * @brief Resets the TIM16 peripheral. @@ -873,11 +815,9 @@ /** * @brief Disables the TIM17 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp) +#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN) /** * @brief Resets the TIM17 peripheral. @@ -898,11 +838,9 @@ /** * @brief Disables the TIM18 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM18(lp) rccDisableAPB1(RCC_APB1ENR_TIM18EN, lp) +#define rccDisableTIM18() rccDisableAPB1(RCC_APB1ENR_TIM18EN) /** * @brief Resets the TIM18 peripheral. @@ -923,11 +861,9 @@ /** * @brief Disables the TIM19 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM19(lp) rccDisableAPB2(RCC_APB2ENR_TIM19EN, lp) +#define rccDisableTIM19() rccDisableAPB2(RCC_APB2ENR_TIM19EN) /** * @brief Resets the TIM19 peripheral. @@ -953,11 +889,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -978,11 +912,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -1003,11 +935,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -1033,11 +963,9 @@ /** * @brief Disables the USB peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp) +#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN) /** * @brief Resets the USB peripheral. @@ -1058,6 +986,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F3xx/stm32_rcc.h index 0455380fb..859cb5846 100644 --- a/os/hal/ports/STM32/STM32F3xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F3xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -67,11 +67,10 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ } @@ -103,11 +102,10 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ } @@ -139,11 +137,10 @@ * @brief Disables the clock of one or more peripheral on the AHB bus. * * @param[in] mask AHB peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB(mask, lp) { \ +#define rccDisableAHB(mask) { \ RCC->AHBENR &= ~(mask); \ } @@ -180,14 +177,12 @@ /** * @brief Disables the ADC1/ADC2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ #if defined(RCC_AHBENR_ADC12EN) || defined(__DOXYGEN__) -#define rccDisableADC12(lp) rccDisableAHB(RCC_AHBENR_ADC12EN, lp) +#define rccDisableADC12() rccDisableAHB(RCC_AHBENR_ADC12EN) #else -#define rccDisableADC12(lp) rccDisableAHB(RCC_AHBENR_ADC1EN, lp) +#define rccDisableADC12() rccDisableAHB(RCC_AHBENR_ADC1EN) #endif /** @@ -217,14 +212,12 @@ /** * @brief Disables the ADC3/ADC4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ #if defined(RCC_AHBENR_ADC34EN) || defined(__DOXYGEN__) -#define rccDisableADC34(lp) rccDisableAHB(RCC_AHBENR_ADC34EN, lp) +#define rccDisableADC34() rccDisableAHB(RCC_AHBENR_ADC34EN) #else -#define rccDisableADC34(lp) rccDisableAHB(RCC_AHBENR_ADC3EN, lp) +#define rccDisableADC34() rccDisableAHB(RCC_AHBENR_ADC3EN) #endif /** @@ -255,11 +248,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DAC1EN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DAC1EN) /** * @brief Resets the DAC1 peripheral. @@ -280,11 +271,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC2(lp) rccDisableAPB1(RCC_APB1ENR_DAC2EN, lp) +#define rccDisableDAC2() rccDisableAPB1(RCC_APB1ENR_DAC2EN) /** * @brief Resets the DAC1 peripheral. @@ -310,13 +299,10 @@ /** * @brief Disables the CAN1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CANEN, lp) +#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CANEN) /** * @brief Resets the CAN1 peripheral. @@ -342,11 +328,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -367,11 +351,9 @@ /** * @brief Disables the DMA2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -397,13 +379,10 @@ /** * @brief Disables PWR interface clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -429,11 +408,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -454,11 +431,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -484,11 +459,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -509,11 +482,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -534,13 +505,10 @@ /** * @brief Disables the SPI3 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp) +#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN) /** * @brief Resets the SPI3 peripheral. @@ -566,13 +534,10 @@ /** * @brief Disables the TIM1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -593,11 +558,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -618,11 +581,9 @@ /** * @brief Disables the TIM3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -643,11 +604,9 @@ /** * @brief Disables the TIM4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -668,11 +627,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -693,11 +650,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -718,13 +673,10 @@ /** * @brief Disables the TIM8 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM8(lp) rccDisableAPB2(RCC_APB2ENR_TIM8EN, lp) +#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN) /** * @brief Resets the TIM8 peripheral. @@ -745,11 +697,9 @@ /** * @brief Disables the TIM15 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp) +#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN) /** * @brief Resets the TIM15 peripheral. @@ -770,11 +720,9 @@ /** * @brief Disables the TIM16 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp) +#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN) /** * @brief Resets the TIM16 peripheral. @@ -795,11 +743,9 @@ /** * @brief Disables the TIM17 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp) +#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN) /** * @brief Resets the TIM17 peripheral. @@ -820,11 +766,9 @@ /** * @brief Disables the TIM20 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM20(lp) rccDisableAPB2(RCC_APB2ENR_TIM20EN, lp) +#define rccDisableTIM20(lp) rccDisableAPB2(RCC_APB2ENR_TIM20EN) /** * @brief Resets the TIM20 peripheral. @@ -850,11 +794,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -875,11 +817,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -900,11 +840,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -925,13 +863,10 @@ /** * @brief Disables the UART4 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -952,13 +887,10 @@ /** * @brief Disables the UART5 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -984,11 +916,9 @@ /** * @brief Disables the USB peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp) +#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN) /** * @brief Resets the USB peripheral. @@ -1014,11 +944,9 @@ /** * @brief Disables the FMC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableFSMC(lp) rccDisableAHB(RCC_AHBENR_FMCEN, lp) +#define rccDisableFSMC() rccDisableAHB(RCC_AHBENR_FMCEN) /** @} */ /*===========================================================================*/ @@ -1032,6 +960,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h index 480f69bee..0d0435c4d 100644 --- a/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F4xx/stm32_rcc.h @@ -23,8 +23,8 @@ * @addtogroup STM32F4xx_RCC * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -68,14 +68,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ - if (lp) \ - RCC->APB1LPENR &= ~(mask); \ + RCC->APB1LPENR &= ~(mask); \ } /** @@ -94,28 +92,24 @@ * @brief Enables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ #define rccEnableAPB2(mask, lp) { \ RCC->APB2ENR |= (mask); \ - if (lp) \ - RCC->APB2LPENR |= (mask); \ + RCC->APB2LPENR |= (mask); \ } /** * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ - if (lp) \ - RCC->APB2LPENR &= ~(mask); \ + RCC->APB2LPENR &= ~(mask); \ } /** @@ -140,22 +134,19 @@ */ #define rccEnableAHB1(mask, lp) { \ RCC->AHB1ENR |= (mask); \ - if (lp) \ - RCC->AHB1LPENR |= (mask); \ + RCC->AHB1LPENR |= (mask); \ } /** * @brief Disables the clock of one or more peripheral on the AHB1 bus. * * @param[in] mask AHB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB1(mask, lp) { \ +#define rccDisableAHB1(mask) { \ RCC->AHB1ENR &= ~(mask); \ - if (lp) \ - RCC->AHB1LPENR &= ~(mask); \ + RCC->AHB1LPENR &= ~(mask); \ } /** @@ -188,14 +179,12 @@ * @brief Disables the clock of one or more peripheral on the AHB2 bus. * * @param[in] mask AHB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB2(mask, lp) { \ +#define rccDisableAHB2(mask) { \ RCC->AHB2ENR &= ~(mask); \ - if (lp) \ - RCC->AHB2LPENR &= ~(mask); \ + RCC->AHB2LPENR &= ~(mask); \ } /** @@ -228,14 +217,12 @@ * @brief Disables the clock of one or more peripheral on the AHB3 (FSMC) bus. * * @param[in] mask AHB3 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB3(mask, lp) { \ +#define rccDisableAHB3(mask) { \ RCC->AHB3ENR &= ~(mask); \ - if (lp) \ - RCC->AHB3LPENR &= ~(mask); \ + RCC->AHB3LPENR &= ~(mask); \ } /** @@ -267,11 +254,9 @@ /** * @brief Disables the ADC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -292,11 +277,9 @@ /** * @brief Disables the ADC2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC2(lp) rccDisableAPB2(RCC_APB2ENR_ADC2EN, lp) +#define rccDisableADC2() rccDisableAPB2(RCC_APB2ENR_ADC2EN) /** * @brief Resets the ADC2 peripheral. @@ -317,11 +300,9 @@ /** * @brief Disables the ADC3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC3(lp) rccDisableAPB2(RCC_APB2ENR_ADC3EN, lp) +#define rccDisableADC3() rccDisableAPB2(RCC_APB2ENR_ADC3EN) /** * @brief Resets the ADC3 peripheral. @@ -347,11 +328,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN) /** * @brief Resets the DAC1 peripheral. @@ -377,11 +356,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB1(RCC_AHB1ENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB1(RCC_AHB1ENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -402,11 +379,9 @@ /** * @brief Disables the DMA2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB1(RCC_AHB1ENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -432,11 +407,9 @@ /** * @brief Disables the BKPSRAM peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableBKPSRAM(lp) rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN, lp) +#define rccDisableBKPSRAM() rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN) /** @} */ /** @@ -455,11 +428,9 @@ /** * @brief Disables PWR interface clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -485,11 +456,9 @@ /** * @brief Disables the CAN1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp) +#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CAN1EN) /** * @brief Resets the CAN1 peripheral. @@ -510,11 +479,9 @@ /** * @brief Disables the CAN2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN2(lp) rccDisableAPB1(RCC_APB1ENR_CAN2EN, lp) +#define rccDisableCAN2() rccDisableAPB1(RCC_APB1ENR_CAN2EN) /** * @brief Resets the CAN2 peripheral. @@ -530,7 +497,6 @@ */ /** * @brief Enables the ETH peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -542,15 +508,12 @@ /** * @brief Disables the ETH peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableETH(lp) rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \ - RCC_AHB1ENR_ETHMACTXEN | \ - RCC_AHB1ENR_ETHMACRXEN, lp) +#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \ + RCC_AHB1ENR_ETHMACTXEN | \ + RCC_AHB1ENR_ETHMACRXEN) /** * @brief Resets the ETH peripheral. @@ -576,11 +539,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -601,11 +562,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -626,11 +585,9 @@ /** * @brief Disables the I2C3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C3(lp) rccDisableAPB1(RCC_APB1ENR_I2C3EN, lp) +#define rccDisableI2C3() rccDisableAPB1(RCC_APB1ENR_I2C3EN) /** * @brief Resets the I2C3 peripheral. @@ -656,11 +613,9 @@ /** * @brief Disables the OTG_FS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_FS(lp) rccDisableAHB2(RCC_AHB2ENR_OTGFSEN, lp) +#define rccDisableOTG_FS() rccDisableAHB2(RCC_AHB2ENR_OTGFSEN) /** * @brief Resets the OTG_FS peripheral. @@ -681,11 +636,9 @@ /** * @brief Disables the OTG_HS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_HS(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSEN, lp) +#define rccDisableOTG_HS() rccDisableAHB1(RCC_AHB1ENR_OTGHSEN) /** * @brief Resets the OTG_HS peripheral. @@ -706,11 +659,9 @@ /** * @brief Disables the OTG_HS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_HSULPI(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN, lp) +#define rccDisableOTG_HSULPI() rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN) /** @} */ /** @@ -729,11 +680,9 @@ /** * @brief Disables the QUADSPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableQUADSPI1(lp) rccDisableAHB3(RCC_AHB3ENR_QSPIEN, lp) +#define rccDisableQUADSPI1() rccDisableAHB3(RCC_AHB3ENR_QSPIEN) /** * @brief Resets the QUADSPI1 peripheral. @@ -749,7 +698,6 @@ */ /** * @brief Enables the SDIO peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -759,17 +707,13 @@ /** * @brief Disables the SDIO peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableSDIO(lp) rccDisableAPB2(RCC_APB2ENR_SDIOEN, lp) +#define rccDisableSDIO() rccDisableAPB2(RCC_APB2ENR_SDIOEN) /** * @brief Resets the SDIO peripheral. - * @note Not supported in this family, does nothing. * * @api */ @@ -792,11 +736,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -817,11 +759,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -842,11 +782,9 @@ /** * @brief Disables the SPI3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp) +#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN) /** * @brief Resets the SPI3 peripheral. @@ -867,11 +805,9 @@ /** * @brief Disables the SPI4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI4(lp) rccDisableAPB2(RCC_APB2ENR_SPI4EN, lp) +#define rccDisableSPI4() rccDisableAPB2(RCC_APB2ENR_SPI4EN) /** * @brief Resets the SPI4 peripheral. @@ -892,11 +828,9 @@ /** * @brief Disables the SPI5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI5(lp) rccDisableAPB2(RCC_APB2ENR_SPI5EN, lp) +#define rccDisableSPI5() rccDisableAPB2(RCC_APB2ENR_SPI5EN) /** * @brief Resets the SPI5 peripheral. @@ -917,11 +851,9 @@ /** * @brief Disables the SPI6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI6(lp) rccDisableAPB2(RCC_APB2ENR_SPI6EN, lp) +#define rccDisableSPI6() rccDisableAPB2(RCC_APB2ENR_SPI6EN) /** * @brief Resets the SPI6 peripheral. @@ -937,7 +869,6 @@ */ /** * @brief Enables the TIM1 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -947,13 +878,10 @@ /** * @brief Disables the TIM1 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -974,11 +902,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -999,11 +925,9 @@ /** * @brief Disables the TIM3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -1024,11 +948,9 @@ /** * @brief Disables the TIM4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -1039,7 +961,6 @@ /** * @brief Enables the TIM5 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1049,13 +970,10 @@ /** * @brief Disables the TIM5 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp) +#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -1066,7 +984,6 @@ /** * @brief Enables the TIM6 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1076,13 +993,10 @@ /** * @brief Disables the TIM6 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -1093,7 +1007,6 @@ /** * @brief Enables the TIM7 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1103,13 +1016,10 @@ /** * @brief Disables the TIM7 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -1120,7 +1030,6 @@ /** * @brief Enables the TIM8 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1130,13 +1039,10 @@ /** * @brief Disables the TIM8 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM8(lp) rccDisableAPB2(RCC_APB2ENR_TIM8EN, lp) +#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN) /** * @brief Resets the TIM8 peripheral. @@ -1147,7 +1053,6 @@ /** * @brief Enables the TIM9 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1157,13 +1062,10 @@ /** * @brief Disables the TIM9 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp) +#define rccDisableTIM9() rccDisableAPB2(RCC_APB2ENR_TIM9EN) /** * @brief Resets the TIM9 peripheral. @@ -1174,7 +1076,6 @@ /** * @brief Enables the TIM10 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1184,13 +1085,10 @@ /** * @brief Disables the TIM10 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp) +#define rccDisableTIM10() rccDisableAPB2(RCC_APB2ENR_TIM10EN) /** * @brief Resets the TIM10 peripheral. @@ -1201,7 +1099,6 @@ /** * @brief Enables the TIM11 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1211,13 +1108,10 @@ /** * @brief Disables the TIM11 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp) +#define rccDisableTIM11() rccDisableAPB2(RCC_APB2ENR_TIM11EN) /** * @brief Resets the TIM11 peripheral. @@ -1228,7 +1122,6 @@ /** * @brief Enables the TIM12 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1238,13 +1131,10 @@ /** * @brief Disables the TIM12 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp) +#define rccDisableTIM12() rccDisableAPB1(RCC_APB1ENR_TIM12EN) /** * @brief Resets the TIM12 peripheral. @@ -1255,7 +1145,6 @@ /** * @brief Enables the TIM13 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1265,13 +1154,10 @@ /** * @brief Disables the TIM13 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM13(lp) rccDisableAPB1(RCC_APB1ENR_TIM13EN, lp) +#define rccDisableTIM13() rccDisableAPB1(RCC_APB1ENR_TIM13EN) /** * @brief Resets the TIM13 peripheral. @@ -1282,7 +1168,6 @@ /** * @brief Enables the TIM14 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1292,13 +1177,10 @@ /** * @brief Disables the TIM14 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp) +#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN) /** * @brief Resets the TIM14 peripheral. @@ -1324,11 +1206,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -1349,11 +1229,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -1374,11 +1252,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -1389,7 +1265,6 @@ /** * @brief Enables the UART4 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1399,13 +1274,10 @@ /** * @brief Disables the UART4 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -1416,7 +1288,6 @@ /** * @brief Enables the UART5 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1426,13 +1297,10 @@ /** * @brief Disables the UART5 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -1453,11 +1321,9 @@ /** * @brief Disables the USART6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp) +#define rccDisableUSART6() rccDisableAPB2(RCC_APB2ENR_USART6EN) /** * @brief Resets the USART6 peripheral. @@ -1468,7 +1334,6 @@ /** * @brief Enables the UART7 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1478,13 +1343,10 @@ /** * @brief Disables the UART7 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART7(lp) rccDisableAPB1(RCC_APB1ENR_UART7EN, lp) +#define rccDisableUART7() rccDisableAPB1(RCC_APB1ENR_UART7EN) /** * @brief Resets the UART7 peripheral. @@ -1495,7 +1357,6 @@ /** * @brief Enables the UART8 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -1505,13 +1366,10 @@ /** * @brief Disables the UART8 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableUART8(lp) rccDisableAPB1(RCC_APB1ENR_UART8EN, lp) +#define rccDisableUART8() rccDisableAPB1(RCC_APB1ENR_UART8EN) /** * @brief Resets the UART8 peripheral. @@ -1537,11 +1395,9 @@ /** * @brief Disables the LTDC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableLTDC(lp) rccDisableAPB2(RCC_APB2ENR_LTDCEN, lp) +#define rccDisableLTDC() rccDisableAPB2(RCC_APB2ENR_LTDCEN) /** * @brief Resets the LTDC peripheral. @@ -1566,11 +1422,9 @@ /** * @brief Disables the DMA2D peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2D(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2DEN, lp) +#define rccDisableDMA2D() rccDisableAHB1(RCC_AHB1ENR_DMA2DEN) /** * @brief Resets the DMA2D peripheral. @@ -1596,11 +1450,9 @@ /** * @brief Disables the CRC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCRC(lp) rccDisableAHB1(RCC_AHB1ENR_CRCEN, lp) +#define rccDisableCRC() rccDisableAHB1(RCC_AHB1ENR_CRCEN) /** * @brief Resets the CRC peripheral. @@ -1632,15 +1484,13 @@ /** * @brief Disables the FSMC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ #if STM32_HAS_FSMC || defined(__DOXYGEN__) #if STM32_FSMC_IS_FMC || defined(__DOXYGEN__) - #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FMCEN, lp) + #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FMCEN) #else - #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FSMCEN, lp) + #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FSMCEN) #endif #endif @@ -1669,6 +1519,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h index 27e52e3a4..f0c7dfb99 100644 --- a/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F7xx/stm32_rcc.h @@ -23,8 +23,8 @@ * @addtogroup STM32F7xx_RCC * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -68,14 +68,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ - if (lp) \ - RCC->APB1LPENR &= ~(mask); \ + RCC->APB1LPENR &= ~(mask); \ } /** @@ -108,14 +106,12 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ - if (lp) \ - RCC->APB2LPENR &= ~(mask); \ + RCC->APB2LPENR &= ~(mask); \ } /** @@ -148,14 +144,12 @@ * @brief Disables the clock of one or more peripheral on the AHB1 bus. * * @param[in] mask AHB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB1(mask, lp) { \ +#define rccDisableAHB1(mask) { \ RCC->AHB1ENR &= ~(mask); \ - if (lp) \ - RCC->AHB1LPENR &= ~(mask); \ + RCC->AHB1LPENR &= ~(mask); \ } /** @@ -188,14 +182,12 @@ * @brief Disables the clock of one or more peripheral on the AHB2 bus. * * @param[in] mask AHB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB2(mask, lp) { \ +#define rccDisableAHB2(mask) { \ RCC->AHB2ENR &= ~(mask); \ - if (lp) \ - RCC->AHB2LPENR &= ~(mask); \ + RCC->AHB2LPENR &= ~(mask); \ } /** @@ -228,14 +220,12 @@ * @brief Disables the clock of one or more peripheral on the AHB3 (FSMC) bus. * * @param[in] mask AHB3 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB3(mask, lp) { \ +#define rccDisableAHB3(mask) { \ RCC->AHB3ENR &= ~(mask); \ - if (lp) \ - RCC->AHB3LPENR &= ~(mask); \ + RCC->AHB3LPENR &= ~(mask); \ } /** @@ -267,11 +257,9 @@ /** * @brief Disables the ADC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -292,11 +280,9 @@ /** * @brief Disables the ADC2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC2(lp) rccDisableAPB2(RCC_APB2ENR_ADC2EN, lp) +#define rccDisableADC2() rccDisableAPB2(RCC_APB2ENR_ADC2EN) /** * @brief Resets the ADC2 peripheral. @@ -317,11 +303,9 @@ /** * @brief Disables the ADC3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC3(lp) rccDisableAPB2(RCC_APB2ENR_ADC3EN, lp) +#define rccDisableADC3() rccDisableAPB2(RCC_APB2ENR_ADC3EN) /** * @brief Resets the ADC3 peripheral. @@ -347,11 +331,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN) /** * @brief Resets the DAC1 peripheral. @@ -377,11 +359,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB1(RCC_AHB1ENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB1(RCC_AHB1ENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -402,11 +382,9 @@ /** * @brief Disables the DMA2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB1(RCC_AHB1ENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -432,11 +410,9 @@ /** * @brief Disables the BKPSRAM peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableBKPSRAM(lp) rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN, lp) +#define rccDisableBKPSRAM() rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN) /** @} */ /** @@ -455,11 +431,9 @@ /** * @brief Disables PWR interface clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -485,11 +459,9 @@ /** * @brief Disables the CAN1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1(RCC_APB1ENR_CAN1EN, lp) +#define rccDisableCAN1() rccDisableAPB1(RCC_APB1ENR_CAN1EN) /** * @brief Resets the CAN1 peripheral. @@ -510,11 +482,9 @@ /** * @brief Disables the CAN2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN2(lp) rccDisableAPB1(RCC_APB1ENR_CAN2EN, lp) +#define rccDisableCAN2() rccDisableAPB1(RCC_APB1ENR_CAN2EN) /** * @brief Resets the CAN2 peripheral. @@ -542,11 +512,9 @@ /** * @brief Disables the CAN3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN3(lp) rccDisableAPB1(RCC_APB1ENR_CAN3EN, lp) +#define rccDisableCAN3() rccDisableAPB1(RCC_APB1ENR_CAN3EN) /** @} */ /** @@ -556,13 +524,11 @@ /** * @brief Enables the ETH peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ #define rccEnableETH(lp) rccEnableAHB1(RCC_AHB1ENR_ETHMACEN | \ RCC_AHB1ENR_ETHMACTXEN | \ - RCC_AHB1ENR_ETHMACRXEN, lp) + RCC_AHB1ENR_ETHMACRXEN) /** * @brief Disables the ETH peripheral clock. @@ -571,9 +537,9 @@ * * @api */ -#define rccDisableETH(lp) rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \ - RCC_AHB1ENR_ETHMACTXEN | \ - RCC_AHB1ENR_ETHMACRXEN, lp) +#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \ + RCC_AHB1ENR_ETHMACTXEN | \ + RCC_AHB1ENR_ETHMACRXEN) /** * @brief Resets the ETH peripheral. @@ -599,11 +565,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -624,11 +588,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -649,11 +611,9 @@ /** * @brief Disables the I2C3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C3(lp) rccDisableAPB1(RCC_APB1ENR_I2C3EN, lp) +#define rccDisableI2C3() rccDisableAPB1(RCC_APB1ENR_I2C3EN) /** * @brief Resets the I2C3 peripheral. @@ -674,11 +634,9 @@ /** * @brief Disables the I2C4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C4(lp) rccDisableAPB1(RCC_APB1ENR_I2C4EN, lp) +#define rccDisableI2C4() rccDisableAPB1(RCC_APB1ENR_I2C4EN) /** * @brief Resets the I2C4 peripheral. @@ -704,11 +662,9 @@ /** * @brief Disables the OTG_FS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_FS(lp) rccDisableAHB2(RCC_AHB2ENR_OTGFSEN, lp) +#define rccDisableOTG_FS() rccDisableAHB2(RCC_AHB2ENR_OTGFSEN) /** * @brief Resets the OTG_FS peripheral. @@ -729,11 +685,9 @@ /** * @brief Disables the OTG_HS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_HS(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSEN, lp) +#define rccDisableOTG_HS() rccDisableAHB1(RCC_AHB1ENR_OTGHSEN) /** * @brief Resets the OTG_HS peripheral. @@ -754,11 +708,9 @@ /** * @brief Disables the OTG_HS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_HSULPI(lp) rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN, lp) +#define rccDisableOTG_HSULPI() rccDisableAHB1(RCC_AHB1ENR_OTGHSULPIEN) /** @} */ /** @@ -777,11 +729,9 @@ /** * @brief Disables the QUADSPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableQUADSPI1(lp) rccDisableAHB3(RCC_AHB3ENR_QSPIEN, lp) +#define rccDisableQUADSPI1() rccDisableAHB3(RCC_AHB3ENR_QSPIEN) /** * @brief Resets the QUADSPI1 peripheral. @@ -807,11 +757,9 @@ /** * @brief Disables the SDMMC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSDMMC1(lp) rccDisableAPB2(RCC_APB2ENR_SDMMC1EN, lp) +#define rccDisableSDMMC1() rccDisableAPB2(RCC_APB2ENR_SDMMC1EN) /** * @brief Resets the SDMMC1 peripheral. @@ -837,11 +785,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -862,11 +808,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -887,11 +831,9 @@ /** * @brief Disables the SPI3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI3(lp) rccDisableAPB1(RCC_APB1ENR_SPI3EN, lp) +#define rccDisableSPI3() rccDisableAPB1(RCC_APB1ENR_SPI3EN) /** * @brief Resets the SPI3 peripheral. @@ -912,11 +854,9 @@ /** * @brief Disables the SPI4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI4(lp) rccDisableAPB2(RCC_APB2ENR_SPI4EN, lp) +#define rccDisableSPI4() rccDisableAPB2(RCC_APB2ENR_SPI4EN) /** * @brief Resets the SPI4 peripheral. @@ -937,11 +877,9 @@ /** * @brief Disables the SPI5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI5(lp) rccDisableAPB2(RCC_APB2ENR_SPI5EN, lp) +#define rccDisableSPI5() rccDisableAPB2(RCC_APB2ENR_SPI5EN) /** * @brief Resets the SPI5 peripheral. @@ -962,11 +900,9 @@ /** * @brief Disables the SPI6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI6(lp) rccDisableAPB2(RCC_APB2ENR_SPI6EN, lp) +#define rccDisableSPI6() rccDisableAPB2(RCC_APB2ENR_SPI6EN) /** * @brief Resets the SPI6 peripheral. @@ -992,11 +928,9 @@ /** * @brief Disables the TIM1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -1017,11 +951,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -1042,11 +974,9 @@ /** * @brief Disables the TIM3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -1067,11 +997,9 @@ /** * @brief Disables the TIM4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -1092,11 +1020,9 @@ /** * @brief Disables the TIM5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp) +#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -1117,11 +1043,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -1142,11 +1066,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -1167,11 +1089,9 @@ /** * @brief Disables the TIM8 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM8(lp) rccDisableAPB2(RCC_APB2ENR_TIM8EN, lp) +#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN) /** * @brief Resets the TIM8 peripheral. @@ -1192,11 +1112,9 @@ /** * @brief Disables the TIM9 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp) +#define rccDisableTIM9() rccDisableAPB2(RCC_APB2ENR_TIM9EN) /** * @brief Resets the TIM9 peripheral. @@ -1217,11 +1135,9 @@ /** * @brief Disables the TIM10 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp) +#define rccDisableTIM10() rccDisableAPB2(RCC_APB2ENR_TIM10EN) /** * @brief Resets the TIM10 peripheral. @@ -1242,11 +1158,9 @@ /** * @brief Disables the TIM11 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp) +#define rccDisableTIM11() rccDisableAPB2(RCC_APB2ENR_TIM11EN) /** * @brief Resets the TIM11 peripheral. @@ -1267,11 +1181,9 @@ /** * @brief Disables the TIM12 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM12(lp) rccDisableAPB1(RCC_APB1ENR_TIM12EN, lp) +#define rccDisableTIM12() rccDisableAPB1(RCC_APB1ENR_TIM12EN) /** * @brief Resets the TIM12 peripheral. @@ -1292,11 +1204,9 @@ /** * @brief Disables the TIM13 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM13(lp) rccDisableAPB1(RCC_APB1ENR_TIM13EN, lp) +#define rccDisableTIM13() rccDisableAPB1(RCC_APB1ENR_TIM13EN) /** * @brief Resets the TIM13 peripheral. @@ -1317,11 +1227,9 @@ /** * @brief Disables the TIM14 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM14(lp) rccDisableAPB1(RCC_APB1ENR_TIM14EN, lp) +#define rccDisableTIM14() rccDisableAPB1(RCC_APB1ENR_TIM14EN) /** * @brief Resets the TIM14 peripheral. @@ -1347,11 +1255,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -1372,11 +1278,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -1397,11 +1301,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -1422,11 +1324,9 @@ /** * @brief Disables the UART4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -1447,11 +1347,9 @@ /** * @brief Disables the UART5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -1472,11 +1370,9 @@ /** * @brief Disables the USART6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART6(lp) rccDisableAPB2(RCC_APB2ENR_USART6EN, lp) +#define rccDisableUSART6() rccDisableAPB2(RCC_APB2ENR_USART6EN) /** * @brief Resets the USART6 peripheral. @@ -1497,11 +1393,9 @@ /** * @brief Disables the UART7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART7(lp) rccDisableAPB1(RCC_APB1ENR_UART7EN, lp) +#define rccDisableUART7() rccDisableAPB1(RCC_APB1ENR_UART7EN) /** * @brief Resets the UART7 peripheral. @@ -1522,11 +1416,9 @@ /** * @brief Disables the UART8 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART8(lp) rccDisableAPB1(RCC_APB1ENR_UART8EN, lp) +#define rccDisableUART8() rccDisableAPB1(RCC_APB1ENR_UART8EN) /** * @brief Resets the UART8 peripheral. @@ -1552,11 +1444,9 @@ /** * @brief Disables the LTDC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableLTDC(lp) rccDisableAPB2(RCC_APB2ENR_LTDCEN, lp) +#define rccDisableLTDC() rccDisableAPB2(RCC_APB2ENR_LTDCEN) /** * @brief Resets the LTDC peripheral. @@ -1581,11 +1471,9 @@ /** * @brief Disables the DMA2D peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2D(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2DEN, lp) +#define rccDisableDMA2D() rccDisableAHB1(RCC_AHB1ENR_DMA2DEN) /** * @brief Resets the DMA2D peripheral. @@ -1615,14 +1503,12 @@ /** * @brief Disables the FSMC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ #if defined(STM32_FSMC_IS_FMC) - #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FMCEN, lp) + #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FMCEN) #else - #define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FSMCEN, lp) + #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FSMCEN) #endif /** @@ -1648,6 +1534,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h index ad651ea11..8c3d09fa5 100644 --- a/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32H7xx/stm32_rcc.h @@ -23,8 +23,8 @@ * @addtogroup STM32F7xx_RCC * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -520,7 +520,7 @@ * * @api */ -#define rccResetBDMA1() rccEnableAHB4(RCC_AHB4RSTR_BDMARST) +#define rccResetBDMA1() rccResetAHB4(RCC_AHB4RSTR_BDMARST) /** * @brief Enables the DMA1 peripheral clock. @@ -658,7 +658,7 @@ * * @api */ -#define rccDisableETH(...) rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \ +#define rccDisableETH() rccDisableAHB1(RCC_AHB1ENR_ETHMACEN | \ RCC_AHB1ENR_ETHMACTXEN | \ RCC_AHB1ENR_ETHMACRXEN) @@ -1067,7 +1067,7 @@ * * @api */ -#define rccDisableTIM1(...) rccDisableAPB2(RCC_APB2ENR_TIM1EN) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -1090,7 +1090,7 @@ * * @api */ -#define rccDisableTIM2(...) rccDisableAPB1L(RCC_APB1LENR_TIM2EN) +#define rccDisableTIM2() rccDisableAPB1L(RCC_APB1LENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -1113,7 +1113,7 @@ * * @api */ -#define rccDisableTIM3(...) rccDisableAPB1L(RCC_APB1LENR_TIM3EN) +#define rccDisableTIM3() rccDisableAPB1L(RCC_APB1LENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -1136,7 +1136,7 @@ * * @api */ -#define rccDisableTIM4(...) rccDisableAPB1L(RCC_APB1LENR_TIM4EN) +#define rccDisableTIM4() rccDisableAPB1L(RCC_APB1LENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -1157,11 +1157,9 @@ /** * @brief Disables the TIM5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1L(RCC_APB1LENR_TIM5EN) +#define rccDisableTIM5() rccDisableAPB1L(RCC_APB1LENR_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -1184,7 +1182,7 @@ * * @api */ -#define rccDisableTIM6(...) rccDisableAPB1L(RCC_APB1LENR_TIM6EN) +#define rccDisableTIM6() rccDisableAPB1L(RCC_APB1LENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -1207,7 +1205,7 @@ * * @api */ -#define rccDisableTIM7(...) rccDisableAPB1L(RCC_APB1LENR_TIM7EN) +#define rccDisableTIM7() rccDisableAPB1L(RCC_APB1LENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -1230,7 +1228,7 @@ * * @api */ -#define rccDisableTIM8(...) rccDisableAPB2(RCC_APB2ENR_TIM8EN) +#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN) /** * @brief Resets the TIM8 peripheral. @@ -1253,7 +1251,7 @@ * * @api */ -#define rccDisableTIM12(...) rccDisableAPB1L(RCC_APB1LENR_TIM12EN) +#define rccDisableTIM12() rccDisableAPB1L(RCC_APB1LENR_TIM12EN) /** * @brief Resets the TIM12 peripheral. @@ -1276,7 +1274,7 @@ * * @api */ -#define rccDisableTIM13(...) rccDisableAPB1L(RCC_APB1LENR_TIM13EN) +#define rccDisableTIM13() rccDisableAPB1L(RCC_APB1LENR_TIM13EN) /** * @brief Resets the TIM13 peripheral. @@ -1299,7 +1297,7 @@ * * @api */ -#define rccDisableTIM14(...) rccDisableAPB1L(RCC_APB1LENR_TIM14EN) +#define rccDisableTIM14() rccDisableAPB1L(RCC_APB1LENR_TIM14EN) /** * @brief Resets the TIM14 peripheral. @@ -1322,7 +1320,7 @@ * * @api */ -#define rccDisableTIM15(...) rccDisableAPB2(RCC_APB2ENR_TIM15EN) +#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN) /** * @brief Resets the TIM15 peripheral. @@ -1345,7 +1343,7 @@ * * @api */ -#define rccDisableTIM16(...) rccDisableAPB2(RCC_APB2ENR_TIM16EN) +#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN) /** * @brief Resets the TIM16 peripheral. @@ -1368,7 +1366,7 @@ * * @api */ -#define rccDisableTIM17(...) rccDisableAPB2(RCC_APB2ENR_TIM17EN) +#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN) /** * @brief Resets the TIM17 peripheral. @@ -1396,7 +1394,7 @@ * * @api */ -#define rccDisableUSART1(...) rccDisableAPB2(RCC_APB2ENR_USART1EN) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -1419,7 +1417,7 @@ * * @api */ -#define rccDisableUSART2(...) rccDisableAPB1L(RCC_APB1LENR_USART2EN) +#define rccDisableUSART2() rccDisableAPB1L(RCC_APB1LENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -1442,7 +1440,7 @@ * * @api */ -#define rccDisableUSART3(...) rccDisableAPB1L(RCC_APB1LENR_USART3EN) +#define rccDisableUSART3() rccDisableAPB1L(RCC_APB1LENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -1465,7 +1463,7 @@ * * @api */ -#define rccDisableUART4(...) rccDisableAPB1L(RCC_APB1LENR_UART4EN) +#define rccDisableUART4() rccDisableAPB1L(RCC_APB1LENR_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -1488,7 +1486,7 @@ * * @api */ -#define rccDisableUART5(...) rccDisableAPB1L(RCC_APB1LENR_UART5EN) +#define rccDisableUART5() rccDisableAPB1L(RCC_APB1LENR_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -1511,7 +1509,7 @@ * * @api */ -#define rccDisableUSART6(...) rccDisableAPB2(RCC_APB2ENR_USART6EN) +#define rccDisableUSART6() rccDisableAPB2(RCC_APB2ENR_USART6EN) /** * @brief Resets the USART6 peripheral. @@ -1534,7 +1532,7 @@ * * @api */ -#define rccDisableUART7(...) rccDisableAPB1L(RCC_APB1LENR_UART7EN) +#define rccDisableUART7() rccDisableAPB1L(RCC_APB1LENR_UART7EN) /** * @brief Resets the UART7 peripheral. @@ -1557,7 +1555,7 @@ * * @api */ -#define rccDisableUART8(...) rccDisableAPB1L(RCC_APB1LENR_UART8EN) +#define rccDisableUART8() rccDisableAPB1L(RCC_APB1LENR_UART8EN) /** * @brief Resets the UART8 peripheral. @@ -1645,9 +1643,9 @@ * @api */ #if defined(STM32_FSMC_IS_FMC) - #define rccDisableFSMC(...) rccDisableAHB3(RCC_AHB3ENR_FMCEN) + #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FMCEN) #else - #define rccDisableFSMC(...) rccDisableAHB3(RCC_AHB3ENR_FSMCEN) + #define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FSMCEN) #endif /** @@ -1673,6 +1671,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.c b/os/hal/ports/STM32/STM32L0xx/hal_lld.c index d4d625aad..6ef788d7a 100644 --- a/os/hal/ports/STM32/STM32L0xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.c @@ -273,7 +273,7 @@ void stm32_clock_init(void) { while (!(SYSCFG->CFGR3 & SYSCFG_CFGR3_VREFINT_RDYF)) ; /* Waits until VREFINT is stable. */ /* Disabling SYSCFG clock. */ - rccDisableAPB2(RCC_APB2ENR_SYSCFGEN, FALSE); + rccDisableAPB2(RCC_APB2ENR_SYSCFGEN); /* Enabling HSI48. */ RCC->CRRCR |= RCC_CRRCR_HSI48ON; diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h index ff76739dd..01283be58 100644 --- a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -69,14 +69,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ - if (lp) \ - RCC->APB1SMENR &= ~(mask); \ + RCC->APB1SMENR &= ~(mask); \ } /** @@ -109,14 +107,12 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ - if (lp) \ - RCC->APB2SMENR &= ~(mask); \ + RCC->APB2SMENR &= ~(mask); \ } /** @@ -149,14 +145,12 @@ * @brief Disables the clock of one or more peripheral on the AHB bus. * * @param[in] mask AHB peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB(mask, lp) { \ +#define rccDisableAHB(mask) { \ RCC->AHBENR &= ~(mask); \ - if (lp) \ - RCC->AHBSMENR &= ~(mask); \ + RCC->AHBSMENR &= ~(mask); \ } /** @@ -189,14 +183,12 @@ * @brief Disables the clock of one or more peripheral on the IOP bus. * * @param[in] mask IOP peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableIOP(mask, lp) { \ +#define rccDisableIOP(mask) { \ RCC->IOPENR &= ~(mask); \ - if (lp) \ - RCC->IOPSMENR &= ~(mask); \ + RCC->IOPSMENR &= ~(mask); \ } /** @@ -228,11 +220,9 @@ /** * @brief Disables the ADC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -258,11 +248,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN) /** * @brief Resets the DAC1 peripheral. @@ -288,11 +276,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -318,11 +304,9 @@ /** * @brief Disables PWR interface clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -348,11 +332,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -373,11 +355,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -398,11 +378,9 @@ /** * @brief Disables the I2C3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C3(lp) rccDisableAPB1(RCC_APB1ENR_I2C3EN, lp) +#define rccDisableI2C3() rccDisableAPB1(RCC_APB1ENR_I2C3EN) /** * @brief Resets the I2C3 peripheral. @@ -428,11 +406,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -453,11 +429,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -483,11 +457,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -508,11 +480,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -533,11 +503,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -558,11 +526,9 @@ /** * @brief Disables the TIM21 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM21(lp) rccDisableAPB2(RCC_APB2ENR_TIM21EN, lp) +#define rccDisableTIM21() rccDisableAPB2(RCC_APB2ENR_TIM21EN) /** * @brief Resets the TIM21 peripheral. @@ -583,11 +549,9 @@ /** * @brief Disables the TIM22 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM22(lp) rccDisableAPB2(RCC_APB2ENR_TIM22EN, lp) +#define rccDisableTIM22() rccDisableAPB2(RCC_APB2ENR_TIM22EN) /** * @brief Resets the TIM22 peripheral. @@ -613,11 +577,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -638,11 +600,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -663,11 +623,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -688,11 +646,9 @@ /** * @brief Disables the UART4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_USART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_USART4EN) /** * @brief Resets the UART4 peripheral. @@ -713,11 +669,9 @@ /** * @brief Disables the UART5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_USART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_USART5EN) /** * @brief Resets the UART5 peripheral. @@ -738,11 +692,9 @@ /** * @brief Disables the LPUART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableLPUART1(lp) rccDisableAPB1(RCC_APB1ENR_LPUART1EN, lp) +#define rccDisableLPUART1() rccDisableAPB1(RCC_APB1ENR_LPUART1EN) /** * @brief Resets the USART1 peripheral. @@ -768,11 +720,9 @@ /** * @brief Disables the USB peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp) +#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN) /** * @brief Resets the USB peripheral. @@ -793,6 +743,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c b/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c index 46ff89ecc..7b6c61a3a 100644 --- a/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c +++ b/os/hal/ports/STM32/STM32L1xx/hal_adc_lld.c @@ -155,7 +155,7 @@ void adc_lld_start(ADCDriver *adcp) { (void *)adcp); osalDbgAssert(!b, "stream already allocated"); dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR); - rccEnableADC1(FALSE); + rccEnableADC1(false); } #endif /* STM32_ADC_USE_ADC1 */ @@ -186,7 +186,7 @@ void adc_lld_stop(ADCDriver *adcp) { #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) - rccDisableADC1(FALSE); + rccDisableADC1(); #endif } } diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h index 55ef32535..989735afd 100644 --- a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -69,14 +69,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus. * * @param[in] mask APB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1(mask, lp) { \ +#define rccDisableAPB1(mask) { \ RCC->APB1ENR &= ~(mask); \ - if (lp) \ - RCC->APB1LPENR &= ~(mask); \ + RCC->APB1LPENR &= ~(mask); \ } /** @@ -109,14 +107,12 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ - if (lp) \ - RCC->APB2LPENR &= ~(mask); \ + RCC->APB2LPENR &= ~(mask); \ } /** @@ -149,14 +145,12 @@ * @brief Disables the clock of one or more peripheral on the AHB bus. * * @param[in] mask AHB peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB(mask, lp) { \ +#define rccDisableAHB(mask) { \ RCC->AHBENR &= ~(mask); \ - if (lp) \ - RCC->AHBLPENR &= ~(mask); \ + RCC->AHBLPENR &= ~(mask); \ } /** @@ -188,11 +182,9 @@ /** * @brief Disables the ADC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp) +#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN) /** * @brief Resets the ADC1 peripheral. @@ -218,11 +210,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp) +#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN) /** * @brief Resets the DAC1 peripheral. @@ -248,11 +238,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -273,11 +261,9 @@ /** * @brief Disables the DMA2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -293,7 +279,6 @@ */ /** * @brief Enables the PWR interface clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -303,13 +288,10 @@ /** * @brief Disables PWR interface clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN) /** * @brief Resets the PWR interface. @@ -335,11 +317,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -360,11 +340,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -390,11 +368,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -415,11 +391,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -445,11 +419,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -470,11 +442,9 @@ /** * @brief Disables the TIM3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -495,11 +465,9 @@ /** * @brief Disables the TIM4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -520,11 +488,9 @@ /** * @brief Disables the TIM5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp) +#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -545,11 +511,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -570,11 +534,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -585,7 +547,6 @@ /** * @brief Enables the TIM9 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -595,13 +556,10 @@ /** * @brief Disables the TIM9 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp) +#define rccDisableTIM9() rccDisableAPB2(RCC_APB2ENR_TIM9EN) /** * @brief Resets the TIM9 peripheral. @@ -612,7 +570,6 @@ /** * @brief Enables the TIM10 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -622,13 +579,10 @@ /** * @brief Disables the TIM10 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp) +#define rccDisableTIM10() rccDisableAPB2(RCC_APB2ENR_TIM10EN) /** * @brief Resets the TIM10 peripheral. @@ -639,7 +593,6 @@ /** * @brief Enables the TIM10 peripheral clock. - * @note The @p lp parameter is ignored in this family. * * @param[in] lp low power enable flag * @@ -649,13 +602,10 @@ /** * @brief Disables the TIM11 peripheral clock. - * @note The @p lp parameter is ignored in this family. - * - * @param[in] lp low power enable flag * * @api */ -#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp) +#define rccDisableTIM11() rccDisableAPB2(RCC_APB2ENR_TIM11EN) /** * @brief Resets the TIM11 peripheral. @@ -682,11 +632,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -707,11 +655,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -732,11 +678,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -757,11 +701,9 @@ /** * @brief Disables the UART4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp) +#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -782,11 +724,9 @@ /** * @brief Disables the UART5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp) +#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -812,11 +752,9 @@ /** * @brief Disables the USB peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp) +#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN) /** * @brief Resets the USB peripheral. @@ -837,6 +775,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h index 384449d25..df7e93c83 100644 --- a/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L4xx/stm32_rcc.h @@ -23,8 +23,8 @@ * @addtogroup STM32L4xx_RCC * @{ */ -#ifndef _STM32_RCC_ -#define _STM32_RCC_ +#ifndef STM32_RCC_H +#define STM32_RCC_H /*===========================================================================*/ /* Driver constants. */ @@ -66,11 +66,10 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus (R1). * * @param[in] mask APB1 R1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1R1(mask, lp) { \ +#define rccDisableAPB1R1(mask) { \ RCC->APB1ENR1 &= ~(mask); \ } @@ -102,11 +101,10 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus (R2). * * @param[in] mask APB1 R2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB1R2(mask, lp) { \ +#define rccDisableAPB1R2(mask) { \ RCC->APB1ENR2 &= ~(mask); \ } @@ -138,11 +136,10 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus. * * @param[in] mask APB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAPB2(mask, lp) { \ +#define rccDisableAPB2(mask) { \ RCC->APB2ENR &= ~(mask); \ } @@ -174,11 +171,10 @@ * @brief Disables the clock of one or more peripheral on the AHB1 bus. * * @param[in] mask AHB1 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB1(mask, lp) { \ +#define rccDisableAHB1(mask) { \ RCC->AHB1ENR &= ~(mask); \ } @@ -210,11 +206,10 @@ * @brief Disables the clock of one or more peripheral on the AHB2 bus. * * @param[in] mask AHB2 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB2(mask, lp) { \ +#define rccDisableAHB2(mask) { \ RCC->AHB2ENR &= ~(mask); \ } @@ -246,11 +241,10 @@ * @brief Disables the clock of one or more peripheral on the AHB3 (FSMC) bus. * * @param[in] mask AHB3 peripherals mask - * @param[in] lp low power enable flag * * @api */ -#define rccDisableAHB3(mask, lp) { \ +#define rccDisableAHB3(mask) { \ RCC->AHB3ENR &= ~(mask); \ } @@ -283,11 +277,9 @@ /** * @brief Disables the ADC1/ADC2/ADC3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableADC123(lp) rccDisableAHB2(RCC_AHB2ENR_ADCEN, lp) +#define rccDisableADC123() rccDisableAHB2(RCC_AHB2ENR_ADCEN) /** * @brief Resets the ADC1/ADC2/ADC3 peripheral. @@ -313,11 +305,9 @@ /** * @brief Disables the DAC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDAC1(lp) rccDisableAPB1R1(RCC_APB1ENR1_DAC1EN, lp) +#define rccDisableDAC1() rccDisableAPB1R1(RCC_APB1ENR1_DAC1EN) /** * @brief Resets the DAC1 peripheral. @@ -343,11 +333,9 @@ /** * @brief Disables the DMA1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA1(lp) rccDisableAHB1(RCC_AHB1ENR_DMA1EN, lp) +#define rccDisableDMA1() rccDisableAHB1(RCC_AHB1ENR_DMA1EN) /** * @brief Resets the DMA1 peripheral. @@ -368,11 +356,9 @@ /** * @brief Disables the DMA2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableDMA2(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2EN, lp) +#define rccDisableDMA2() rccDisableAHB1(RCC_AHB1ENR_DMA2EN) /** * @brief Resets the DMA2 peripheral. @@ -398,11 +384,9 @@ /** * @brief Disables PWR interface clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisablePWRInterface(lp) rccDisableAPB1R1(RCC_APB1ENR1_PWREN, lp) +#define rccDisablePWRInterface() rccDisableAPB1R1(RCC_APB1ENR1_PWREN) /** * @brief Resets the PWR interface. @@ -428,11 +412,9 @@ /** * @brief Disables the CAN1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableCAN1(lp) rccDisableAPB1R1(RCC_APB1ENR1_CAN1EN, lp) +#define rccDisableCAN1() rccDisableAPB1R1(RCC_APB1ENR1_CAN1EN) /** * @brief Resets the CAN1 peripheral. @@ -458,11 +440,9 @@ /** * @brief Disables the I2C1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C1(lp) rccDisableAPB1R1(RCC_APB1ENR1_I2C1EN, lp) +#define rccDisableI2C1() rccDisableAPB1R1(RCC_APB1ENR1_I2C1EN) /** * @brief Resets the I2C1 peripheral. @@ -483,11 +463,9 @@ /** * @brief Disables the I2C2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C2(lp) rccDisableAPB1R1(RCC_APB1ENR1_I2C2EN, lp) +#define rccDisableI2C2() rccDisableAPB1R1(RCC_APB1ENR1_I2C2EN) /** * @brief Resets the I2C2 peripheral. @@ -508,11 +486,9 @@ /** * @brief Disables the I2C3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableI2C3(lp) rccDisableAPB1R1(RCC_APB1ENR1_I2C3EN, lp) +#define rccDisableI2C3() rccDisableAPB1R1(RCC_APB1ENR1_I2C3EN) /** * @brief Resets the I2C3 peripheral. @@ -538,11 +514,9 @@ /** * @brief Disables the OTG_FS peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableOTG_FS(lp) rccDisableAHB2(RCC_AHB2ENR_OTGFSEN, lp) +#define rccDisableOTG_FS() rccDisableAHB2(RCC_AHB2ENR_OTGFSEN) /** * @brief Resets the OTG_FS peripheral. @@ -568,11 +542,9 @@ /** * @brief Disables the QUADSPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableQUADSPI1(lp) rccDisableAHB3(RCC_AHB3ENR_QSPIEN, lp) +#define rccDisableQUADSPI1() rccDisableAHB3(RCC_AHB3ENR_QSPIEN) /** * @brief Resets the QUADSPI1 peripheral. @@ -598,11 +570,9 @@ /** * @brief Disables the SDMMC1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSDMMC1(lp) rccDisableAPB2(RCC_APB2ENR_SDMMC1EN, lp) +#define rccDisableSDMMC1() rccDisableAPB2(RCC_APB2ENR_SDMMC1EN) /** * @brief Resets the SDMMC1 peripheral. @@ -628,11 +598,9 @@ /** * @brief Disables the SPI1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp) +#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN) /** * @brief Resets the SPI1 peripheral. @@ -653,11 +621,9 @@ /** * @brief Disables the SPI2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI2(lp) rccDisableAPB1R1(RCC_APB1ENR1_SPI2EN, lp) +#define rccDisableSPI2() rccDisableAPB1R1(RCC_APB1ENR1_SPI2EN) /** * @brief Resets the SPI2 peripheral. @@ -678,11 +644,9 @@ /** * @brief Disables the SPI3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableSPI3(lp) rccDisableAPB1R1(RCC_APB1ENR1_SPI3EN, lp) +#define rccDisableSPI3() rccDisableAPB1R1(RCC_APB1ENR1_SPI3EN) /** * @brief Resets the SPI3 peripheral. @@ -708,11 +672,9 @@ /** * @brief Disables the TIM1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM1(lp) rccDisableAPB2(RCC_APB2ENR_TIM1EN, lp) +#define rccDisableTIM1() rccDisableAPB2(RCC_APB2ENR_TIM1EN) /** * @brief Resets the TIM1 peripheral. @@ -733,11 +695,9 @@ /** * @brief Disables the TIM2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM2(lp) rccDisableAPB1R1(RCC_APB1ENR1_TIM2EN, lp) +#define rccDisableTIM2() rccDisableAPB1R1(RCC_APB1ENR1_TIM2EN) /** * @brief Resets the TIM2 peripheral. @@ -758,11 +718,9 @@ /** * @brief Disables the TIM3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM3(lp) rccDisableAPB1R1(RCC_APB1ENR1_TIM3EN, lp) +#define rccDisableTIM3() rccDisableAPB1R1(RCC_APB1ENR1_TIM3EN) /** * @brief Resets the TIM3 peripheral. @@ -783,11 +741,9 @@ /** * @brief Disables the TIM4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM4(lp) rccDisableAPB1R1(RCC_APB1ENR1_TIM4EN, lp) +#define rccDisableTIM4() rccDisableAPB1R1(RCC_APB1ENR1_TIM4EN) /** * @brief Resets the TIM4 peripheral. @@ -808,11 +764,9 @@ /** * @brief Disables the TIM5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM5(lp) rccDisableAPB1R1(RCC_APB1ENR1_TIM5EN, lp) +#define rccDisableTIM5() rccDisableAPB1R1(RCC_APB1ENR1_TIM5EN) /** * @brief Resets the TIM5 peripheral. @@ -833,11 +787,9 @@ /** * @brief Disables the TIM6 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM6(lp) rccDisableAPB1R1(RCC_APB1ENR1_TIM6EN, lp) +#define rccDisableTIM6() rccDisableAPB1R1(RCC_APB1ENR1_TIM6EN) /** * @brief Resets the TIM6 peripheral. @@ -858,11 +810,9 @@ /** * @brief Disables the TIM7 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM7(lp) rccDisableAPB1R1(RCC_APB1ENR1_TIM7EN, lp) +#define rccDisableTIM7() rccDisableAPB1R1(RCC_APB1ENR1_TIM7EN) /** * @brief Resets the TIM7 peripheral. @@ -883,11 +833,9 @@ /** * @brief Disables the TIM8 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM8(lp) rccDisableAPB2(RCC_APB2ENR_TIM8EN, lp) +#define rccDisableTIM8() rccDisableAPB2(RCC_APB2ENR_TIM8EN) /** * @brief Resets the TIM8 peripheral. @@ -908,11 +856,9 @@ /** * @brief Disables the TIM15 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM15(lp) rccDisableAPB2(RCC_APB2ENR_TIM15EN, lp) +#define rccDisableTIM15() rccDisableAPB2(RCC_APB2ENR_TIM15EN) /** * @brief Resets the TIM15 peripheral. @@ -933,11 +879,9 @@ /** * @brief Disables the TIM16 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM16(lp) rccDisableAPB2(RCC_APB2ENR_TIM16EN, lp) +#define rccDisableTIM16() rccDisableAPB2(RCC_APB2ENR_TIM16EN) /** * @brief Resets the TIM16 peripheral. @@ -958,11 +902,9 @@ /** * @brief Disables the TIM17 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableTIM17(lp) rccDisableAPB2(RCC_APB2ENR_TIM17EN, lp) +#define rccDisableTIM17() rccDisableAPB2(RCC_APB2ENR_TIM17EN) /** * @brief Resets the TIM17 peripheral. @@ -988,11 +930,9 @@ /** * @brief Disables the USART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp) +#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN) /** * @brief Resets the USART1 peripheral. @@ -1013,11 +953,9 @@ /** * @brief Disables the USART2 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART2(lp) rccDisableAPB1R1(RCC_APB1ENR1_USART2EN, lp) +#define rccDisableUSART2() rccDisableAPB1R1(RCC_APB1ENR1_USART2EN) /** * @brief Resets the USART2 peripheral. @@ -1038,11 +976,9 @@ /** * @brief Disables the USART3 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSART3(lp) rccDisableAPB1R1(RCC_APB1ENR1_USART3EN, lp) +#define rccDisableUSART3() rccDisableAPB1R1(RCC_APB1ENR1_USART3EN) /** * @brief Resets the USART3 peripheral. @@ -1063,11 +999,9 @@ /** * @brief Disables the UART4 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART4(lp) rccDisableAPB1R1(RCC_APB1ENR1_UART4EN, lp) +#define rccDisableUART4() rccDisableAPB1R1(RCC_APB1ENR1_UART4EN) /** * @brief Resets the UART4 peripheral. @@ -1088,11 +1022,9 @@ /** * @brief Disables the UART5 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUART5(lp) rccDisableAPB1R1(RCC_APB1ENR1_UART5EN, lp) +#define rccDisableUART5() rccDisableAPB1R1(RCC_APB1ENR1_UART5EN) /** * @brief Resets the UART5 peripheral. @@ -1113,11 +1045,9 @@ /** * @brief Disables the LPUART1 peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableLPUART1(lp) rccDisableAPB1R2(RCC_APB1ENR2_LPUART1EN, lp) +#define rccDisableLPUART1() rccDisableAPB1R2(RCC_APB1ENR2_LPUART1EN) /** * @brief Resets the USART1 peripheral. @@ -1143,11 +1073,9 @@ /** * @brief Disables the USB peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableUSB(lp) rccDisableAPB1R1(RCC_APB1ENR1_USBFSEN, lp) +#define rccDisableUSB() rccDisableAPB1R1(RCC_APB1ENR1_USBFSEN) /** * @brief Resets the USB peripheral. @@ -1173,11 +1101,9 @@ /** * @brief Disables the FSMC peripheral clock. * - * @param[in] lp low power enable flag - * * @api */ -#define rccDisableFSMC(lp) rccDisableAHB3(RCC_AHB3ENR_FMCEN, lp) +#define rccDisableFSMC() rccDisableAHB3(RCC_AHB3ENR_FMCEN) /** * @brief Resets the FSMC peripheral. @@ -1198,6 +1124,6 @@ extern "C" { } #endif -#endif /* _STM32_RCC_ */ +#endif /* STM32_RCC_H */ /** @} */ diff --git a/os/hal/templates/hal_can_lld.c b/os/hal/templates/hal_can_lld.c index fedce5bdf..07795e59e 100644 --- a/os/hal/templates/hal_can_lld.c +++ b/os/hal/templates/hal_can_lld.c @@ -119,8 +119,8 @@ void can_lld_stop(CANDriver *canp) { * @param[in] mailbox mailbox number, @p CAN_ANY_MAILBOX for any mailbox * * @return The queue space availability. - * @retval FALSE no space in the transmit queue. - * @retval TRUE transmit slot available. + * @retval false no space in the transmit queue. + * @retval true transmit slot available. * * @notapi */ @@ -168,8 +168,8 @@ void can_lld_transmit(CANDriver *canp, * @param[in] mailbox mailbox number, @p CAN_ANY_MAILBOX for any mailbox * * @return The queue space availability. - * @retval FALSE no space in the transmit queue. - * @retval TRUE transmit slot available. + * @retval false no space in the transmit queue. + * @retval true transmit slot available. * * @notapi */ diff --git a/os/hal/templates/hal_spi_lld.c b/os/hal/templates/hal_spi_lld.c index 6dd582677..7e75f1299 100644 --- a/os/hal/templates/hal_spi_lld.c +++ b/os/hal/templates/hal_spi_lld.c @@ -222,6 +222,20 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { } +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) +/** + * @brief Aborts the ongoing SPI operation, if any. + * + * @param[in] spip pointer to the @p SPIDriver object + * + * @notapi + */ +void spi_lld_abort(SPIDriver *spip) { + + (void)spip; +} +#endif /* SPI_SUPPORTS_CIRCULAR == TRUE */ + /** * @brief Exchanges one frame using a polled wait. * @details This synchronous function exchanges one frame using a polled @@ -233,6 +247,8 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { * @param[in] spip pointer to the @p SPIDriver object * @param[in] frame the data frame to send over the SPI bus * @return The received data frame from the SPI bus. + * + * @notapi */ uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { diff --git a/os/hal/templates/hal_spi_lld.h b/os/hal/templates/hal_spi_lld.h index 6f4b63bfa..79502d422 100644 --- a/os/hal/templates/hal_spi_lld.h +++ b/os/hal/templates/hal_spi_lld.h @@ -31,6 +31,11 @@ /* Driver constants. */ /*===========================================================================*/ +/** + * @brief Circular mode support flag. + */ +#define SPI_SUPPORTS_CIRCULAR TRUE + /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ @@ -76,6 +81,12 @@ typedef void (*spicallback_t)(SPIDriver *spip); * architecture dependent, fields. */ typedef struct { +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) + /** + * @brief Enables the circular buffer mode. + */ + bool circular; +#endif /** * @brief Operation complete callback or @p NULL. */ @@ -159,13 +170,18 @@ extern "C" { void spi_lld_init(void); void spi_lld_start(SPIDriver *spip); void spi_lld_stop(SPIDriver *spip); +#if (SPI_SELECT_MODE == SPI_SELECT_MODE_LLD) || defined(__DOXYGEN__) void spi_lld_select(SPIDriver *spip); void spi_lld_unselect(SPIDriver *spip); +#endif void spi_lld_ignore(SPIDriver *spip, size_t n); void spi_lld_exchange(SPIDriver *spip, size_t n, const void *txbuf, void *rxbuf); void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf); void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf); +#if (SPI_SUPPORTS_CIRCULAR == TRUE) || defined(__DOXYGEN__) + void spi_lld_abort(SPIDriver *spip); +#endif uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame); #ifdef __cplusplus } diff --git a/testhal/STM32/STM32F1xx/SPI/main.c b/testhal/STM32/STM32F1xx/SPI/main.c index 1c510fef0..691c83b51 100644 --- a/testhal/STM32/STM32F1xx/SPI/main.c +++ b/testhal/STM32/STM32F1xx/SPI/main.c @@ -21,6 +21,7 @@ * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + false, NULL, GPIOA, GPIOA_SPI1NSS, @@ -32,6 +33,7 @@ static const SPIConfig hs_spicfg = { * Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { + false, NULL, GPIOA, GPIOA_SPI1NSS, diff --git a/testhal/STM32/STM32F37x/SPI/main.c b/testhal/STM32/STM32F37x/SPI/main.c index 2d6409abf..48970f6f2 100644 --- a/testhal/STM32/STM32F37x/SPI/main.c +++ b/testhal/STM32/STM32F37x/SPI/main.c @@ -21,6 +21,7 @@ * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 10, @@ -32,6 +33,7 @@ static const SPIConfig hs_spicfg = { * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { + false, NULL, GPIOB, 10, diff --git a/testhal/STM32/STM32F3xx/CAN/mcuconf.h b/testhal/STM32/STM32F3xx/CAN/mcuconf.h index 3da290a6d..0c8b738d7 100644 --- a/testhal/STM32/STM32F3xx/CAN/mcuconf.h +++ b/testhal/STM32/STM32F3xx/CAN/mcuconf.h @@ -115,7 +115,7 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* diff --git a/testhal/STM32/STM32F4xx/DMA_STORM/main.c b/testhal/STM32/STM32F4xx/DMA_STORM/main.c index 67ec7fb3e..13fc7ef63 100644 --- a/testhal/STM32/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32/STM32F4xx/DMA_STORM/main.c @@ -86,6 +86,7 @@ static const ADCConversionGroup adcgrpcfg2 = { * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 12, diff --git a/testhal/STM32/STM32F7xx/SPI/main.c b/testhal/STM32/STM32F7xx/SPI/main.c index 411020808..90001f1c2 100644 --- a/testhal/STM32/STM32F7xx/SPI/main.c +++ b/testhal/STM32/STM32F7xx/SPI/main.c @@ -29,6 +29,7 @@ * Maximum speed SPI configuration (27MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + false, NULL, GPIOB, GPIOB_ARD_D15, @@ -40,6 +41,7 @@ static const SPIConfig hs_spicfg = { * Low speed SPI configuration (421.875kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { + false, NULL, GPIOB, GPIOB_ARD_D14, diff --git a/testhal/STM32/STM32L0xx/SPI/main.c b/testhal/STM32/STM32L0xx/SPI/main.c index 6c5de1173..7cacee323 100644 --- a/testhal/STM32/STM32L0xx/SPI/main.c +++ b/testhal/STM32/STM32L0xx/SPI/main.c @@ -21,6 +21,7 @@ * Maximum speed SPI configuration (16MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 12, @@ -32,6 +33,7 @@ static const SPIConfig hs_spicfg = { * Low speed SPI configuration (250kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { + false, NULL, GPIOB, 12, diff --git a/testhal/STM32/STM32L1xx/SPI/main.c b/testhal/STM32/STM32L1xx/SPI/main.c index f70d4f7c8..cac88f4f6 100644 --- a/testhal/STM32/STM32L1xx/SPI/main.c +++ b/testhal/STM32/STM32L1xx/SPI/main.c @@ -21,6 +21,7 @@ * Maximum speed SPI configuration (16MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 12, @@ -32,6 +33,7 @@ static const SPIConfig hs_spicfg = { * Low speed SPI configuration (256kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { + false, NULL, GPIOB, 12, diff --git a/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.c b/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.c index 8c5f7426e..7b2b98439 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.c +++ b/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.c @@ -34,10 +34,25 @@ /* Module exported variables. */ /*===========================================================================*/ +void spi_circular_cb(SPIDriver *spip); + +/* + * Circular SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +const SPIConfig c_spicfg = { + true, + spi_circular_cb, + GPIOB, + 12, + 0, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + /* * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 12, @@ -49,6 +64,7 @@ const SPIConfig hs_spicfg = { * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig ls_spicfg = { + false, NULL, GPIOB, 12, diff --git a/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.h b/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.h index 3283d07a9..fee7874b7 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.h +++ b/testhal/STM32/multi/SPI/cfg-stm32f091_nucleo64/portab.h @@ -33,6 +33,8 @@ //#define PORTAB_LINE_LED2 #define PORTAB_LED_OFF PAL_LOW #define PORTAB_LED_ON PAL_HIGH +#define PORTAB_LINE_BUTTON LINE_BUTTON +#define PORTAB_BUTTON_PRESSED PAL_HIGH #define PORTAB_SPI1 SPID2 @@ -56,6 +58,7 @@ /* External declarations. */ /*===========================================================================*/ +extern const SPIConfig c_spicfg; extern const SPIConfig hs_spicfg; extern const SPIConfig ls_spicfg; diff --git a/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.c b/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.c index 0cc734175..e5a3687bc 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.c +++ b/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.c @@ -33,10 +33,25 @@ /* Module exported variables. */ /*===========================================================================*/ +void spi_circular_cb(SPIDriver *spip); + +/* + * Circular SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +const SPIConfig c_spicfg = { + true, + spi_circular_cb, + GPIOB, + 12, + 0, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + /* * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 12, @@ -48,6 +63,7 @@ const SPIConfig hs_spicfg = { * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig ls_spicfg = { + false, NULL, GPIOB, 12, diff --git a/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.h b/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.h index 4840cf265..01344c9d8 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.h +++ b/testhal/STM32/multi/SPI/cfg-stm32f303_discovery/portab.h @@ -29,11 +29,14 @@ /* Module constants. */ /*===========================================================================*/ -#define PORTAB_LINE_LED1 LINE_LED10_RED -//#define PORTAB_LINE_LED2 LINE_LED3_RED +#define PORTAB_LINE_LED1 LINE_LED4_BLUE +#define PORTAB_LINE_LED2 LINE_LED3_RED #define PORTAB_LED_OFF PAL_LOW #define PORTAB_LED_ON PAL_HIGH +#define PORTAB_LINE_BUTTON LINE_BUTTON +#define PORTAB_BUTTON_PRESSED PAL_HIGH + #define PORTAB_SPI1 SPID1 /*===========================================================================*/ @@ -56,6 +59,7 @@ /* External declarations. */ /*===========================================================================*/ +extern const SPIConfig c_spicfg; extern const SPIConfig hs_spicfg; extern const SPIConfig ls_spicfg; diff --git a/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.c b/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.c index 89a3a439f..02ff7047b 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.c +++ b/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.c @@ -34,10 +34,25 @@ /* Module exported variables. */ /*===========================================================================*/ +void spi_circular_cb(SPIDriver *spip); + +/* + * Circular SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). + */ +const SPIConfig c_spicfg = { + true, + spi_circular_cb, + GPIOB, + 12, + 0, + 0 +}; + /* * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig hs_spicfg = { + false, NULL, GPIOB, 12, @@ -49,6 +64,7 @@ const SPIConfig hs_spicfg = { * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). */ const SPIConfig ls_spicfg = { + false, NULL, GPIOB, 12, diff --git a/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.h b/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.h index cb2e2d1e3..73293a0cf 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.h +++ b/testhal/STM32/multi/SPI/cfg-stm32f407_discovery/portab.h @@ -29,11 +29,14 @@ /* Module constants. */ /*===========================================================================*/ -#define PORTAB_LINE_LED1 LINE_LED5 -//#define PORTAB_LINE_LED2 +#define PORTAB_LINE_LED1 LINE_LED3 +#define PORTAB_LINE_LED2 LINE_LED4 #define PORTAB_LED_OFF PAL_LOW #define PORTAB_LED_ON PAL_HIGH +#define PORTAB_LINE_BUTTON LINE_BUTTON +#define PORTAB_BUTTON_PRESSED PAL_HIGH + #define PORTAB_SPI1 SPID2 /*===========================================================================*/ @@ -56,6 +59,7 @@ /* External declarations. */ /*===========================================================================*/ +extern const SPIConfig c_spicfg; extern const SPIConfig hs_spicfg; extern const SPIConfig ls_spicfg; diff --git a/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/portab.h b/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/portab.h index b36241ad9..b60b8584e 100644 --- a/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/portab.h +++ b/testhal/STM32/multi/SPI/cfg-stm32h743_nucleo144/portab.h @@ -35,6 +35,7 @@ #define PORTAB_LED_ON PAL_HIGH #define PORTAB_LINE_BUTTON LINE_BUTTON #define PORTAB_BUTTON_PRESSED PAL_HIGH + #define PORTAB_SPI1 SPID1 /*===========================================================================*/ -- cgit v1.2.3