From 9b9e7833b19414060061d47a17acdf6015a9dbdd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Jul 2014 13:18:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7010 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/include/rtc.h | 26 +++++++++++------- os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c | 49 ++++++++++++++++++++++++++++------ os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h | 44 +++++++++++++----------------- testhal/STM32/STM32F4xx/RTC/.project | 2 +- 4 files changed, 78 insertions(+), 43 deletions(-) diff --git a/os/hal/include/rtc.h b/os/hal/include/rtc.h index df11cbc92..bfa45553d 100644 --- a/os/hal/include/rtc.h +++ b/os/hal/include/rtc.h @@ -39,6 +39,11 @@ /* Driver constants. */ /*===========================================================================*/ +/** + * @brief Base year of the calendar. + */ +#define RTC_BASE_YEAR 1980 + /** * @name Date/Time bit masks for FAT format * @{ @@ -86,12 +91,12 @@ typedef struct RTCDriver RTCDriver; * @brief Type of a structure representing an RTC date/time stamp. */ typedef struct { - uint32_t year:8; - uint32_t month: 4; - uint32_t dstflag: 1; - uint32_t dayofweek: 3; - uint32_t day: 5; - uint32_t millisecond: 27; + uint32_t year:8; /**< @brief Years since 1980. */ + uint32_t month: 4; /**< @brief Months 1..12. */ + uint32_t dstflag: 1; /**< @brief DST correction flag. */ + uint32_t dayofweek: 3; /**< @brief Day of week 1..7. */ + uint32_t day: 5; /**< @brief Day of the month 1..31. */ + uint32_t millisecond: 27; /**< @brief Milliseconds since midnight.*/ } RTCDateTime; #include "rtc_lld.h" @@ -108,7 +113,8 @@ typedef struct { * * @iclass */ -#define rtcSetTimeI(rtcp, timespec) rtc_lld_set_time(rtcp, timespec) +#define rtcSetTimeI(rtcp, timespec) \ + rtc_lld_set_time(rtcp, timespec) /** * @brief Get current time. @@ -118,7 +124,8 @@ typedef struct { * * @iclass */ -#define rtcGetTimeI(rtcp, timespec) rtc_lld_get_time(rtcp, timespec) +#define rtcGetTimeI(rtcp, timespec) \ + rtc_lld_get_time(rtcp, timespec) #if (RTC_ALARMS > 0) || defined(__DOXYGEN__) /** @@ -159,7 +166,8 @@ typedef struct { * * @iclass */ -#define rtcSetCallbackI(rtcp, callback) rtc_lld_set_callback(rtcp, callback) +#define rtcSetCallbackI(rtcp, callback) \ + rtc_lld_set_callback(rtcp, callback) #endif /* RTC_SUPPORTS_CALLBACKS */ /*===========================================================================*/ diff --git a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c index 402c5e048..27bc79137 100644 --- a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c +++ b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c @@ -34,6 +34,22 @@ /* Driver local definitions. */ /*===========================================================================*/ +#define RTC_TR_PM_OFFSET 22 +#define RTC_TR_HT_OFFSET 20 +#define RTC_TR_HU_OFFSET 16 +#define RTC_TR_MNT_OFFSET 12 +#define RTC_TR_MNU_OFFSET 8 +#define RTC_TR_ST_OFFSET 4 +#define RTC_TR_SU_OFFSET 0 + +#define RTC_DR_YT_OFFSET 20 +#define RTC_DR_YU_OFFSET 16 +#define RTC_DR_WDU_OFFSET 13 +#define RTC_DR_MT_OFFSET 12 +#define RTC_DR_MU_OFFSET 8 +#define RTC_DR_DT_OFFSET 4 +#define RTC_DR_DU_OFFSET 0 + /*===========================================================================*/ /* Driver exported variables. */ /*===========================================================================*/ @@ -95,7 +111,15 @@ static inline void rtc_exit_init(void) { * @notapi */ static void rtc_decode_time(uint32_t tr, RTCDateTime *timespec) { - + uint32_t n; + + n = ((tr >> RTC_TR_HT_OFFSET) & 3) * 36000000; + n += ((tr >> RTC_TR_HU_OFFSET) & 15) * 3600000; + n += ((tr >> RTC_TR_MNT_OFFSET) & 7) * 600000; + n += ((tr >> RTC_TR_MNU_OFFSET) & 15) * 60000; + n += ((tr >> RTC_TR_ST_OFFSET) & 7) * 10000; + n += ((tr >> RTC_TR_SU_OFFSET) & 15) * 1000; + timespec->millisecond = n; } /** @@ -156,7 +180,7 @@ static uint32_t rtc_encode_date(const RTCDateTime *timespec) { uint32_t n, dr = 0; /* Year conversion. Note, only years last two digits are considered.*/ - n = 1980 + timespec->year; + n = RTC_BASE_YEAR + timespec->year; dr = dr | ((n % 10) << RTC_DR_YU_OFFSET); n /= 10; dr = dr | ((n % 10) << RTC_DR_YT_OFFSET); @@ -207,8 +231,9 @@ void rtc_lld_init(void) { rtc_enter_init(); RTCD1.rtc->CR = 0; - RTCD1.rtc->PRER = STM32_RTC_PRES_VALUE; - RTCD1.rtc->PRER = STM32_RTC_PRES_VALUE; + RTCD1.rtc->ISR = 0; + RTCD1.rtc->PRER = STM32_RTC_PRER_BITS; + RTCD1.rtc->PRER = STM32_RTC_PRER_BITS; rtc_exit_init(); } @@ -253,14 +278,21 @@ void rtc_lld_get_time(RTCDriver *rtcp, RTCDateTime *timespec) { rtc_regs_sync(); + /* Decoding day time, this starts the atomic read sequence, see "Reading + the calendar" in the RTC documentation.*/ + rtc_decode_time(rtcp->rtc->TR, timespec); + + /* If the RTC is capable of sub-second counting then the value is + normalized in milliseconds and added to the time.*/ #if STM32_RTC_HAS_SUBSECONDS - subs = (1000 * ((rtcp->rtc->PRER & 0x7FFF) - rtcp->rtc->SSR)) / - ((rtcp->rtc->PRER & 0x7FFF) + 1); + subs = (((rtcp->rtc->SSR << 16) / STM32_RTC_PRESS_VALUE) * 1000) >> 16); #else subs = 0; #endif /* STM32_RTC_HAS_SUBSECONDS */ -/* timespec->tv_time = rtcp->rtc->TR; - timespec->tv_date = rtcp->rtc->DR;*/ + timespec->millisecond += subs; + + /* Decoding date, this concludes the atomic read sequence.*/ + rtc_decode_date(rtcp->rtc->DR, timespec); } #if (STM32_RTC_NUM_ALARMS > 0) || defined(__DOXYGEN__) @@ -279,6 +311,7 @@ void rtc_lld_get_time(RTCDriver *rtcp, RTCDateTime *timespec) { void rtc_lld_set_alarm(RTCDriver *rtcp, rtcalarm_t alarm, const RTCAlarm *alarmspec) { + if (alarm == 1){ if (alarmspec != NULL){ rtcp->id_rtc->CR &= ~RTC_CR_ALRAE; diff --git a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h index c5720ba6e..938868553 100644 --- a/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h +++ b/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h @@ -41,30 +41,9 @@ #define RTC_SUPPORTS_CALLBACKS STM32_RTC_HAS_INTERRUPTS /** - * @name Data offsets in RTC date and time registers - * @{ + * @brief RTC PRER register initializer. */ -#define RTC_TR_PM_OFFSET 22 -#define RTC_TR_HT_OFFSET 20 -#define RTC_TR_HU_OFFSET 16 -#define RTC_TR_MNT_OFFSET 12 -#define RTC_TR_MNU_OFFSET 8 -#define RTC_TR_ST_OFFSET 4 -#define RTC_TR_SU_OFFSET 0 - -#define RTC_DR_YT_OFFSET 20 -#define RTC_DR_YU_OFFSET 16 -#define RTC_DR_WDU_OFFSET 13 -#define RTC_DR_MT_OFFSET 12 -#define RTC_DR_MU_OFFSET 8 -#define RTC_DR_DT_OFFSET 4 -#define RTC_DR_DU_OFFSET 0 -/** @} */ - -/** - * @brief RTC PRES register initializer. - */ -#define RTC_PRES(a, s) ((((a) - 1) << 16) | ((s) - 1)) +#define RTC_PRER(a, s) ((((a) - 1) << 16) | ((s) - 1)) /*===========================================================================*/ /* Driver pre-compile time settings. */ @@ -78,9 +57,18 @@ * @brief RTC PRES register initialization. * @note The default is calculated for a 32768Hz clock. */ -#if !defined(STM32_RTC_PRES_VALUE) || defined(__DOXYGEN__) -#define STM32_RTC_PRES_VALUE RTC_PRES(32, 1024) +#if !defined(STM32_RTC_PRESA_VALUE) || defined(__DOXYGEN__) +#define STM32_RTC_PRESA_VALUE 32 +#endif + +/** + * @brief RTC PRESS divider initialization. + * @note The default is calculated for a 32768Hz clock. + */ +#if !defined(STM32_RTC_PRESS_VALUE) || defined(__DOXYGEN__) +#define STM32_RTC_PRESS_VALUE 1024 #endif +/** @} */ /*===========================================================================*/ /* Derived constants and error checks. */ @@ -100,6 +88,12 @@ #error "STM32_PCLK1 frequency is too low" #endif +/** + * @brief Initialization for the RTC_PRER register. + */ +#define STM32_RTC_PRER_BITS RTC_PRER(STM32_RTC_PRESA_VALUE, \ + STM32_RTC_PRESS_VALUE) + /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ diff --git a/testhal/STM32/STM32F4xx/RTC/.project b/testhal/STM32/STM32F4xx/RTC/.project index b281eb7d2..33e5a2740 100644 --- a/testhal/STM32/STM32F4xx/RTC/.project +++ b/testhal/STM32/STM32F4xx/RTC/.project @@ -27,7 +27,7 @@ board 2 - CHIBIOS/boards/ST_STM32F4_DISCOVERY + CHIBIOS/os/hal/boards/ST_STM32F4_DISCOVERY os -- cgit v1.2.3