From 99b95e812c1e07572bf410aee11bf0bcca164023 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Sat, 9 Nov 2013 09:28:24 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6420 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/SPC5xx/eMIOS_v1/icu_lld.c | 31 ++--- os/hal/platforms/SPC5xx/eMIOS_v1/pwm_lld.c | 51 ++------ os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.c | 171 +++++++++++++++----------- os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.h | 30 +++-- 4 files changed, 138 insertions(+), 145 deletions(-) diff --git a/os/hal/platforms/SPC5xx/eMIOS_v1/icu_lld.c b/os/hal/platforms/SPC5xx/eMIOS_v1/icu_lld.c index 2c6a1b203..f465e064b 100644 --- a/os/hal/platforms/SPC5xx/eMIOS_v1/icu_lld.c +++ b/os/hal/platforms/SPC5xx/eMIOS_v1/icu_lld.c @@ -380,12 +380,8 @@ void icu_lld_init(void) { A2_3 = 0U; /* eMIOSx channels initially all not in use.*/ -#if SPC5_HAS_EMIOS0 reset_emios0_active_channels(); -#endif -#if SPC5_HAS_EMIOS1 reset_emios1_active_channels(); -#endif #if SPC5_ICU_USE_EMIOS0_CH0 /* Driver initialization.*/ @@ -493,14 +489,11 @@ void icu_lld_init(void) { */ void icu_lld_start(ICUDriver *icup) { -#if SPC5_HAS_EMIOS0 - chDbgAssert(get_emios0_active_channels() < 25, "icu_lld_start(), #1", + chDbgAssert(get_emios0_active_channels() < 28, "icu_lld_start(), #1", "too many channels"); -#endif -#if SPC5_HAS_EMIOS1 - chDbgAssert(get_emios1_active_channels() < 25, "icu_lld_start(), #2", + + chDbgAssert(get_emios1_active_channels() < 28, "icu_lld_start(), #2", "too many channels"); -#endif if (icup->state == ICU_STOP) { /* Enables the peripheral.*/ @@ -547,12 +540,12 @@ void icu_lld_start(ICUDriver *icup) { /* Set eMIOS0 Clock.*/ #if SPC5_ICU_USE_EMIOS0 - active_emios0_clock(icup, NULL); + icu_active_emios0_clock(icup); #endif /* Set eMIOS1 Clock.*/ #if SPC5_ICU_USE_EMIOS1 - active_emios1_clock(icup, NULL); + icu_active_emios1_clock(icup); #endif } @@ -570,7 +563,7 @@ void icu_lld_start(ICUDriver *icup) { chDbgAssert((psc <= 0xFFFF) && (((psc) * icup->config->frequency) == icup->clock) && ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "icu_lld_start(), #3", "invalid frequency"); + "icu_lld_start(), #1", "invalid frequency"); icup->emiosp->CH[icup->ch_number].CCR.B.UCPEN = 0; icup->emiosp->CH[icup->ch_number].CCR.R |= @@ -605,14 +598,10 @@ void icu_lld_start(ICUDriver *icup) { */ void icu_lld_stop(ICUDriver *icup) { -#if SPC5_HAS_EMIOS0 - chDbgAssert(get_emios0_active_channels() < 25, "icu_lld_stop(), #1", + chDbgAssert(get_emios0_active_channels() < 28, "icu_lld_stop(), #1", "too many channels"); -#endif -#if SPC5_HAS_EMIOS1 - chDbgAssert(get_emios1_active_channels() < 25, "icu_lld_stop(), #2", + chDbgAssert(get_emios1_active_channels() < 28, "icu_lld_stop(), #2", "too many channels"); -#endif if (icup->state == ICU_READY) { @@ -700,12 +689,12 @@ void icu_lld_stop(ICUDriver *icup) { /* eMIOS0 clock deactivation.*/ #if SPC5_ICU_USE_EMIOS0 - deactive_emios0_clock(icup, NULL); + icu_deactive_emios0_clock(icup); #endif /* eMIOS1 clock deactivation.*/ #if SPC5_ICU_USE_EMIOS1 - deactive_emios1_clock(icup, NULL); + icu_deactive_emios1_clock(icup); #endif } } diff --git a/os/hal/platforms/SPC5xx/eMIOS_v1/pwm_lld.c b/os/hal/platforms/SPC5xx/eMIOS_v1/pwm_lld.c index 942f5bc79..88000781f 100644 --- a/os/hal/platforms/SPC5xx/eMIOS_v1/pwm_lld.c +++ b/os/hal/platforms/SPC5xx/eMIOS_v1/pwm_lld.c @@ -696,12 +696,8 @@ CH_IRQ_HANDLER(SPC5_EMIOS1_GFR_F22F23_HANDLER) { */ void pwm_lld_init(void) { /* eMIOSx channels initially all not in use.*/ -#if SPC5_HAS_EMIOS0 reset_emios0_active_channels(); -#endif -#if SPC5_HAS_EMIOS1 reset_emios1_active_channels(); -#endif #if SPC5_PWM_USE_EMIOS0_GROUP0 /* Driver initialization.*/ @@ -776,14 +772,10 @@ void pwm_lld_start(PWMDriver *pwmp) { uint32_t psc = 0, i = 0; -#if SPC5_HAS_EMIOS0 - chDbgAssert(get_emios0_active_channels() < 25, + chDbgAssert(get_emios0_active_channels() < 28, "pwm_lld_start(), #1", "too many channels"); -#endif -#if SPC5_HAS_EMIOS1 - chDbgAssert(get_emios1_active_channels() < 25, + chDbgAssert(get_emios1_active_channels() < 28, "pwm_lld_start(), #2", "too many channels"); -#endif if (pwmp->state == PWM_STOP) { #if SPC5_PWM_USE_EMIOS0_GROUP0 @@ -818,12 +810,12 @@ void pwm_lld_start(PWMDriver *pwmp) { /* Set eMIOS0 Clock.*/ #if SPC5_PWM_USE_EMIOS0 - active_emios0_clock(NULL, pwmp); + pwm_active_emios0_clock(pwmp); #endif /* Set eMIOS1 Clock.*/ #if SPC5_PWM_USE_EMIOS1 - active_emios1_clock(NULL, pwmp); + pwm_active_emios1_clock(pwmp); #endif } @@ -890,37 +882,20 @@ void pwm_lld_start(PWMDriver *pwmp) { #endif /* Set clock prescaler and control register.*/ -#if SPC5_HAS_EMIOS0 && SPC5_HAS_EMIOS1 if (pwmp->emiosp == &EMIOS_0) { psc = (SPC5_EMIOS0_CLK / pwmp->config->frequency); chDbgAssert((psc <= 0xFFFF) && (((psc) * pwmp->config->frequency) == SPC5_EMIOS0_CLK) && ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "pwm_lld_start(), #3", "invalid frequency"); + "pwm_lld_start(), #1", "invalid frequency"); } else if (pwmp->emiosp == &EMIOS_1) { psc = (SPC5_EMIOS1_CLK / pwmp->config->frequency); chDbgAssert((psc <= 0xFFFF) && (((psc) * pwmp->config->frequency) == SPC5_EMIOS1_CLK) && ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "pwm_lld_start(), #4", "invalid frequency"); - } -#elif SPC5_HAS_EMIOS0 - if (pwmp->emiosp == &EMIOS_0) { - psc = (SPC5_EMIOS0_CLK / pwmp->config->frequency); - chDbgAssert((psc <= 0xFFFF) && - (((psc) * pwmp->config->frequency) == SPC5_EMIOS0_CLK) && - ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "pwm_lld_start(), #3", "invalid frequency"); + "pwm_lld_start(), #2", "invalid frequency"); } -#elif SPC5_HAS_EMIOS1 - if (pwmp->emiosp == &EMIOS_1) { - psc = (SPC5_EMIOS1_CLK / pwmp->config->frequency); - chDbgAssert((psc <= 0xFFFF) && - (((psc) * pwmp->config->frequency) == SPC5_EMIOS1_CLK) && - ((psc == 1) || (psc == 2) || (psc == 3) || (psc == 4)), - "pwm_lld_start(), #3", "invalid frequency"); - } -#endif + #if SPC5_PWM_USE_EMIOS0_GROUP0 if (&PWMD1 == pwmp) { @@ -1335,14 +1310,10 @@ void pwm_lld_stop(PWMDriver *pwmp) { uint32_t i = 0; -#if SPC5_HAS_EMIOS0 - chDbgAssert(get_emios0_active_channels() < 25, "pwm_lld_stop(), #1", + chDbgAssert(get_emios0_active_channels() < 28, "pwm_lld_stop(), #1", "too many channels"); -#endif -#if SPC5_HAS_EMIOS1 - chDbgAssert(get_emios1_active_channels() < 25, "pwm_lld_stop(), #2", + chDbgAssert(get_emios1_active_channels() < 28, "pwm_lld_stop(), #2", "too many channels"); -#endif if (pwmp->state == PWM_READY) { @@ -1399,12 +1370,12 @@ void pwm_lld_stop(PWMDriver *pwmp) { /* eMIOS0 clock deactivation.*/ #if SPC5_PWM_USE_EMIOS0 - deactive_emios0_clock(NULL, pwmp); + pwm_deactive_emios0_clock(pwmp); #endif /* eMIOS1 clock deactivation.*/ #if SPC5_PWM_USE_EMIOS1 - deactive_emios1_clock(NULL, pwmp); + pwm_deactive_emios1_clock(pwmp); #endif } } diff --git a/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.c b/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.c index 4b2b64ea9..25bdd282a 100644 --- a/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.c +++ b/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.c @@ -44,26 +44,29 @@ /** * @brief Number of active eMIOSx Channels. */ -#if SPC5_HAS_EMIOS0 static uint32_t emios0_active_channels; -#endif -#if SPC5_HAS_EMIOS1 static uint32_t emios1_active_channels; -#endif /*===========================================================================*/ /* Driver local functions. */ /*===========================================================================*/ -#if SPC5_HAS_EMIOS0 void reset_emios0_active_channels() { emios0_active_channels = 0; } +void reset_emios1_active_channels() { + emios1_active_channels = 0; +} + uint32_t get_emios0_active_channels() { return emios0_active_channels; } +uint32_t get_emios1_active_channels() { + return emios1_active_channels; +} + void increase_emios0_active_channels() { emios0_active_channels++; } @@ -72,115 +75,137 @@ void decrease_emios0_active_channels() { emios0_active_channels--; } -void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp) { +void increase_emios1_active_channels() { + emios1_active_channels++; +} + +void decrease_emios1_active_channels() { + emios1_active_channels--; +} + +#if HAL_USE_ICU +void icu_active_emios0_clock(ICUDriver *icup) { /* If this is the first Channel activated then the eMIOS0 is enabled.*/ if (emios0_active_channels == 1) { halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL, SPC5_EMIOS0_START_PCTL); /* Disable all unified channels.*/ - if (icup != NULL) { - icup->emiosp->MCR.B.GPREN = 0; - icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS0_GPRE_VALUE); - icup->emiosp->MCR.R |= EMIOSMCR_GPREN; + icup->emiosp->MCR.B.GPREN = 0; + icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS0_GPRE_VALUE); + icup->emiosp->MCR.R |= EMIOSMCR_GPREN; - icup->emiosp->MCR.B.GTBE = 1U; + icup->emiosp->MCR.B.GTBE = 1U; - icup->emiosp->UCDIS.R = 0xFFFFFFFF; + icup->emiosp->UCDIS.R = 0xFFFFFFFF; - } else if (pwmp != NULL) { - pwmp->emiosp->MCR.B.GPREN = 0; - pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS0_GPRE_VALUE); - pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN; - - pwmp->emiosp->MCR.B.GTBE = 1U; + } +} +#endif - pwmp->emiosp->UCDIS.R = 0xFFFFFFFF; +#if HAL_USE_PWM +void pwm_active_emios0_clock(PWMDriver *pwmp) { + /* If this is the first Channel activated then the eMIOS0 is enabled.*/ + if (emios0_active_channels == 1) { + halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL, + SPC5_EMIOS0_START_PCTL); - } + /* Disable all unified channels.*/ + pwmp->emiosp->MCR.B.GPREN = 0; + pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS0_GPRE_VALUE); + pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN; - } -} + pwmp->emiosp->MCR.B.GTBE = 1U; + pwmp->emiosp->UCDIS.R = 0xFFFFFFFF; -void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp) { - /* If it is the last active channels then the eMIOS0 is disabled.*/ - if (emios0_active_channels == 0) { - if (icup != NULL) { - if (icup->emiosp->UCDIS.R == 0) { - halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL, - SPC5_EMIOS0_STOP_PCTL); - } - } else if (pwmp != NULL) { - if (pwmp->emiosp->UCDIS.R == 0) { - halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL, - SPC5_EMIOS0_STOP_PCTL); - } - } } } #endif -#if SPC5_HAS_EMIOS1 -void reset_emios1_active_channels() { - emios1_active_channels = 0; -} +#if HAL_USE_ICU +void icu_active_emios1_clock(ICUDriver *icup) { + /* If this is the first Channel activated then the eMIOS1 is enabled.*/ + if (emios1_active_channels == 1) { + halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL, + SPC5_EMIOS1_START_PCTL); -uint32_t get_emios1_active_channels() { - return emios1_active_channels; -} + /* Disable all unified channels.*/ + icup->emiosp->MCR.B.GPREN = 0; + icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS1_GPRE_VALUE); + icup->emiosp->MCR.R |= EMIOSMCR_GPREN; -void increase_emios1_active_channels() { - emios1_active_channels++; -} + icup->emiosp->MCR.B.GTBE = 1U; -void decrease_emios1_active_channels() { - emios1_active_channels--; + icup->emiosp->UCDIS.R = 0xFFFFFFFF; + + } } +#endif -void active_emios1_clock(ICUDriver *icup, PWMDriver *pwmp) { +#if HAL_USE_PWM +void pwm_active_emios1_clock(PWMDriver *pwmp) { /* If this is the first Channel activated then the eMIOS1 is enabled.*/ if (emios1_active_channels == 1) { halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL, SPC5_EMIOS1_START_PCTL); /* Disable all unified channels.*/ - if (icup != NULL) { - icup->emiosp->MCR.B.GPREN = 0; - icup->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS1_GPRE_VALUE); - icup->emiosp->MCR.R |= EMIOSMCR_GPREN; + pwmp->emiosp->MCR.B.GPREN = 0; + pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS1_GPRE_VALUE); + pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN; - icup->emiosp->MCR.B.GTBE = 1U; + pwmp->emiosp->MCR.B.GTBE = 1U; - icup->emiosp->UCDIS.R = 0xFFFFFFFF; + pwmp->emiosp->UCDIS.R = 0xFFFFFFFF; - } else if (pwmp != NULL) { - pwmp->emiosp->MCR.B.GPREN = 0; - pwmp->emiosp->MCR.R = EMIOSMCR_GPRE(SPC5_EMIOS1_GPRE_VALUE); - pwmp->emiosp->MCR.R |= EMIOSMCR_GPREN; - - pwmp->emiosp->MCR.B.GTBE = 1U; + } +} +#endif - pwmp->emiosp->UCDIS.R = 0xFFFFFFFF; +#if HAL_USE_ICU +void icu_deactive_emios0_clock(ICUDriver *icup) { + /* If it is the last active channels then the eMIOS0 is disabled.*/ + if (emios0_active_channels == 0) { + if (icup->emiosp->UCDIS.R == 0) { + halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL, + SPC5_EMIOS0_STOP_PCTL); + } + } +} +#endif +#if HAL_USE_PWM +void pwm_deactive_emios0_clock(PWMDriver *pwmp) { + /* If it is the last active channels then the eMIOS0 is disabled.*/ + if (emios0_active_channels == 0) { + if (pwmp->emiosp->UCDIS.R == 0) { + halSPCSetPeripheralClockMode(SPC5_EMIOS0_PCTL, + SPC5_EMIOS0_STOP_PCTL); } + } +} +#endif +#if HAL_USE_ICU +void icu_deactive_emios1_clock(ICUDriver *icup) { + /* If it is the last active channels then the eMIOS1 is disabled.*/ + if (emios1_active_channels == 0) { + if (icup->emiosp->UCDIS.R == 0) { + halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL, + SPC5_EMIOS1_STOP_PCTL); + } } } +#endif -void deactive_emios1_clock(ICUDriver *icup, PWMDriver *pwmp) { +#if HAL_USE_PWM +void pwm_deactive_emios1_clock(PWMDriver *pwmp) { /* If it is the last active channels then the eMIOS1 is disabled.*/ if (emios1_active_channels == 0) { - if (icup != NULL) { - if (icup->emiosp->UCDIS.R == 0) { - halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL, - SPC5_EMIOS1_STOP_PCTL); - } - } else if (pwmp != NULL) { - if (pwmp->emiosp->UCDIS.R == 0) { - halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL, - SPC5_EMIOS1_STOP_PCTL); - } + if (pwmp->emiosp->UCDIS.R == 0) { + halSPCSetPeripheralClockMode(SPC5_EMIOS1_PCTL, + SPC5_EMIOS1_STOP_PCTL); } } } diff --git a/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.h b/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.h index e9e685bf2..e8f69bfba 100644 --- a/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.h +++ b/os/hal/platforms/SPC5xx/eMIOS_v1/spc5_emios.h @@ -25,7 +25,7 @@ #ifndef _SPC5_EMIOS_H_ #define _SPC5_EMIOS_H_ -#if HAL_USE_ICU || defined(__DOXYGEN__) +#if HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -149,24 +149,32 @@ /* External declarations. */ /*===========================================================================*/ -#if SPC5_HAS_EMIOS0 void reset_emios0_active_channels(void); +void reset_emios1_active_channels(void); uint32_t get_emios0_active_channels(void); +uint32_t get_emios1_active_channels(void); void increase_emios0_active_channels(void); void decrease_emios0_active_channels(void); -void active_emios0_clock(ICUDriver *icup, PWMDriver *pwmp); -void deactive_emios0_clock(ICUDriver *icup, PWMDriver *pwmp); -#endif -#if SPC5_HAS_EMIOS1 -void reset_emios1_active_channels(void); -uint32_t get_emios1_active_channels(void); void increase_emios1_active_channels(void); void decrease_emios1_active_channels(void); -void active_emios1_clock(ICUDriver *icup, PWMDriver *pwmp); -void deactive_emios1_clock(ICUDriver *icup, PWMDriver *pwmp); +#if HAL_USE_ICU +void icu_active_emios0_clock(ICUDriver *icup); +void icu_active_emios1_clock(ICUDriver *icup); +#endif +#if HAL_USE_PWM +void pwm_active_emios0_clock(PWMDriver *pwmp); +void pwm_active_emios1_clock(PWMDriver *pwmp); +#endif +#if HAL_USE_ICU +void icu_deactive_emios0_clock(ICUDriver *icup); +void icu_deactive_emios1_clock(ICUDriver *icup); +#endif +#if HAL_USE_PWM +void pwm_deactive_emios0_clock(PWMDriver *pwmp); +void pwm_deactive_emios1_clock(PWMDriver *pwmp); #endif -#endif /* HAL_USE_ICU */ +#endif /* HAL_USE_ICU || HAL_USE_PWM */ #endif /* _SPC5_EMIOS_H_ */ -- cgit v1.2.3