From 952fb6d0ef339ac9f3ee13e0119fe0e5af742a4b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 18 Jun 2011 10:23:43 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3054 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.ewp | 2103 +++++++++++++++++++++++++++ demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.eww | 10 + demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.icf | 39 + os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h | 57 + os/ports/IAR/ARMCMx/STM32L1xx/vectors.s | 231 +++ os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h | 57 + os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s | 227 +++ 7 files changed, 2724 insertions(+) create mode 100644 demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.ewp create mode 100644 demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.eww create mode 100644 demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.icf create mode 100644 os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h create mode 100644 os/ports/IAR/ARMCMx/STM32L1xx/vectors.s create mode 100644 os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h create mode 100644 os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s diff --git a/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.ewp b/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.ewp new file mode 100644 index 000000000..7506d9d0c --- /dev/null +++ b/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.ewp @@ -0,0 +1,2103 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 18 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 26 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 11 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 18 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 26 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 11 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + board + + $PROJ_DIR$\..\..\..\boards\ST_STM32L_DISCOVERY\board.c + + + $PROJ_DIR$\..\..\..\boards\ST_STM32L_DISCOVERY\board.h + + + + os + + hal + + include + + $PROJ_DIR$\..\..\..\os\hal\include\adc.h + + + $PROJ_DIR$\..\..\..\os\hal\include\can.h + + + $PROJ_DIR$\..\..\..\os\hal\include\hal.h + + + $PROJ_DIR$\..\..\..\os\hal\include\i2c.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mac.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mii.h + + + $PROJ_DIR$\..\..\..\os\hal\include\mmc_spi.h + + + $PROJ_DIR$\..\..\..\os\hal\include\pal.h + + + $PROJ_DIR$\..\..\..\os\hal\include\pwm.h + + + $PROJ_DIR$\..\..\..\os\hal\include\serial.h + + + $PROJ_DIR$\..\..\..\os\hal\include\spi.h + + + $PROJ_DIR$\..\..\..\os\hal\include\uart.h + + + + src + + $PROJ_DIR$\..\..\..\os\hal\src\adc.c + + + $PROJ_DIR$\..\..\..\os\hal\src\can.c + + + $PROJ_DIR$\..\..\..\os\hal\src\hal.c + + + $PROJ_DIR$\..\..\..\os\hal\src\i2c.c + + + $PROJ_DIR$\..\..\..\os\hal\src\mac.c + + + $PROJ_DIR$\..\..\..\os\hal\src\mmc_spi.c + + + $PROJ_DIR$\..\..\..\os\hal\src\pal.c + + + $PROJ_DIR$\..\..\..\os\hal\src\pwm.c + + + $PROJ_DIR$\..\..\..\os\hal\src\serial.c + + + $PROJ_DIR$\..\..\..\os\hal\src\spi.c + + + $PROJ_DIR$\..\..\..\os\hal\src\uart.c + + + + + kernel + + include + + $PROJ_DIR$\..\..\..\os\kernel\include\ch.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chcond.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chdebug.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chdynamic.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chevents.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chheap.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chinline.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chioch.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chlists.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmboxes.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmemcore.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmempools.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmsg.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chmtx.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chqueues.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chregistry.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chschd.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chsem.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chstreams.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chsys.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chthreads.h + + + $PROJ_DIR$\..\..\..\os\kernel\include\chvt.h + + + + src + + $PROJ_DIR$\..\..\..\os\kernel\src\chcond.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdebug.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chdynamic.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chevents.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chheap.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chlists.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmboxes.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmemcore.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmempools.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmsg.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chmtx.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chqueues.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chregistry.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chschd.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chsem.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chsys.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chthreads.c + + + $PROJ_DIR$\..\..\..\os\kernel\src\chvt.c + + + + + platform + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\core_cm3.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\hal_lld.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\hal_lld.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.c + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\stm32_dma.h + + + $PROJ_DIR$\..\..\..\os\hal\platforms\STM32L1xx\stm32l1xx.h + + + + port + + STM32Lxx + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32L1xx\cmparams.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\STM32L1xx\vectors.s + + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\chtypes.h + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\cstartup.s + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.c + + + $PROJ_DIR$\..\..\..\os\ports\IAR\ARMCMx\nvic.h + + + + + test + + $PROJ_DIR$\..\..\..\test\test.c + + + $PROJ_DIR$\..\..\..\test\test.h + + + $PROJ_DIR$\..\..\..\test\testbmk.c + + + $PROJ_DIR$\..\..\..\test\testbmk.h + + + $PROJ_DIR$\..\..\..\test\testdyn.c + + + $PROJ_DIR$\..\..\..\test\testdyn.h + + + $PROJ_DIR$\..\..\..\test\testevt.c + + + $PROJ_DIR$\..\..\..\test\testevt.h + + + $PROJ_DIR$\..\..\..\test\testheap.c + + + $PROJ_DIR$\..\..\..\test\testheap.h + + + $PROJ_DIR$\..\..\..\test\testmbox.c + + + $PROJ_DIR$\..\..\..\test\testmbox.h + + + $PROJ_DIR$\..\..\..\test\testmsg.c + + + $PROJ_DIR$\..\..\..\test\testmsg.h + + + $PROJ_DIR$\..\..\..\test\testmtx.c + + + $PROJ_DIR$\..\..\..\test\testmtx.h + + + $PROJ_DIR$\..\..\..\test\testpools.c + + + $PROJ_DIR$\..\..\..\test\testpools.h + + + $PROJ_DIR$\..\..\..\test\testqueues.c + + + $PROJ_DIR$\..\..\..\test\testqueues.h + + + $PROJ_DIR$\..\..\..\test\testsem.c + + + $PROJ_DIR$\..\..\..\test\testsem.h + + + $PROJ_DIR$\..\..\..\test\testthd.c + + + $PROJ_DIR$\..\..\..\test\testthd.h + + + + $PROJ_DIR$\..\chconf.h + + + $PROJ_DIR$\..\halconf.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\mcuconf.h + + + + diff --git a/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.eww b/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\ch.ewp + + + + + diff --git a/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.icf b/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.icf new file mode 100644 index 000000000..376fd3e5d --- /dev/null +++ b/demos/ARMCM3-STM32L152-DISCOVERY/iar/ch.icf @@ -0,0 +1,39 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x400; +/**** End of ICF editor section. ###ICF###*/ + +/* Size of the IRQ Stack (Main Stack).*/ +define symbol __ICFEDIT_size_irqstack__ = 0x400; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK}; +define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {}; +define block SYSHEAP with alignment = 8 {section SYSHEAP}; +define block DATABSS with alignment = 8 {readwrite, zeroinit}; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section .intvec }; + +place at address mem:__ICFEDIT_intvec_start__ {section .intvec}; +place in ROM_region {readonly}; +place at start of RAM_region {block IRQSTACK}; +place in RAM_region {block DATABSS, block HEAP}; +place in RAM_region {block SYSHEAP}; +place at end of RAM_region {block CSTACK}; diff --git a/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h new file mode 100644 index 000000000..e4012ef82 --- /dev/null +++ b/os/ports/IAR/ARMCMx/STM32L1xx/cmparams.h @@ -0,0 +1,57 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file IAR/ARMCMx/STM32L1xx/cmparams.h + * @brief ARM Cortex-M3 parameters for the STM32L1xx. + * + * @defgroup IAR_ARMCMx_STM32L1xx STM32L1xx Specific Parameters + * @ingroup IAR_ARMCMx_SPECIFIC + * @details This file contains the Cortex-M3 specific parameters for the + * STM32L1xx platform. + * @{ + */ + +#ifndef _CMPARAMS_H_ +#define _CMPARAMS_H_ + +/** + * @brief Cortex core model. + */ +#define CORTEX_MODEL CORTEX_M3 + +/** + * @brief Systick unit presence. + */ +#define CORTEX_HAS_ST TRUE + +/** + * @brief Memory Protection unit presence. + */ +#define CORTEX_HAS_MPU TRUE + +/** + * @brief Number of bits in priority masks. + */ +#define CORTEX_PRIORITY_BITS 4 + +#endif /* _CMPARAMS_H_ */ + +/** @} */ diff --git a/os/ports/IAR/ARMCMx/STM32L1xx/vectors.s b/os/ports/IAR/ARMCMx/STM32L1xx/vectors.s new file mode 100644 index 000000000..2e2c373af --- /dev/null +++ b/os/ports/IAR/ARMCMx/STM32L1xx/vectors.s @@ -0,0 +1,231 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#if !defined(STM32L1XX_MD) +#define _FROM_ASM_ +#include "board.h" +#endif + + MODULE ?vectors + + AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE + PRESERVE8 + + SECTION IRQSTACK:DATA:NOROOT(3) + SECTION .intvec:CODE:NOROOT(3) + + EXTERN __iar_program_start + PUBLIC __vector_table + + DATA + +__vector_table: + DCD SFE(IRQSTACK) + DCD __iar_program_start + DCD NMIVector + DCD HardFaultVector + DCD MemManageVector + DCD BusFaultVector + DCD UsageFaultVector + DCD Vector1C + DCD Vector20 + DCD Vector24 + DCD Vector28 + DCD SVCallVector + DCD DebugMonitorVector + DCD Vector34 + DCD PendSVVector + DCD SysTickVector + DCD Vector40 + DCD Vector44 + DCD Vector48 + DCD Vector4C + DCD Vector50 + DCD Vector54 + DCD Vector58 + DCD Vector5C + DCD Vector60 + DCD Vector64 + DCD Vector68 + DCD Vector6C + DCD Vector70 + DCD Vector74 + DCD Vector78 + DCD Vector7C + DCD Vector80 + DCD Vector84 + DCD Vector88 + DCD Vector8C + DCD Vector90 + DCD Vector94 + DCD Vector98 + DCD Vector9C + DCD VectorA0 + DCD VectorA4 + DCD VectorA8 + DCD VectorAC + DCD VectorB0 + DCD VectorB4 + DCD VectorB8 + DCD VectorBC + DCD VectorC0 + DCD VectorC4 + DCD VectorC8 + DCD VectorCC + DCD VectorD0 + DCD VectorD4 + DCD VectorD8 + DCD VectorDC + DCD VectorE0 + DCD VectorE4 + DCD VectorE8 + DCD VectorEC + DCD VectorF0 + +/* + * Default interrupt handlers. + */ + PUBWEAK NMIVector + PUBWEAK HardFaultVector + PUBWEAK MemManageVector + PUBWEAK BusFaultVector + PUBWEAK UsageFaultVector + PUBWEAK Vector1C + PUBWEAK Vector20 + PUBWEAK Vector24 + PUBWEAK Vector28 + PUBWEAK SVCallVector + PUBWEAK DebugMonitorVector + PUBWEAK Vector34 + PUBWEAK PendSVVector + PUBWEAK SysTickVector + PUBWEAK Vector40 + PUBWEAK Vector44 + PUBWEAK Vector48 + PUBWEAK Vector4C + PUBWEAK Vector50 + PUBWEAK Vector54 + PUBWEAK Vector58 + PUBWEAK Vector5C + PUBWEAK Vector60 + PUBWEAK Vector64 + PUBWEAK Vector68 + PUBWEAK Vector6C + PUBWEAK Vector70 + PUBWEAK Vector74 + PUBWEAK Vector78 + PUBWEAK Vector7C + PUBWEAK Vector80 + PUBWEAK Vector84 + PUBWEAK Vector88 + PUBWEAK Vector8C + PUBWEAK Vector90 + PUBWEAK Vector94 + PUBWEAK Vector98 + PUBWEAK Vector9C + PUBWEAK VectorA0 + PUBWEAK VectorA4 + PUBWEAK VectorA8 + PUBWEAK VectorAC + PUBWEAK VectorB0 + PUBWEAK VectorB4 + PUBWEAK VectorB8 + PUBWEAK VectorBC + PUBWEAK VectorC0 + PUBWEAK VectorC4 + PUBWEAK VectorC8 + PUBWEAK VectorCC + PUBWEAK VectorD0 + PUBWEAK VectorD4 + PUBWEAK VectorD8 + PUBWEAK VectorDC + PUBWEAK VectorE0 + PUBWEAK VectorE4 + PUBWEAK VectorE8 + PUBWEAK VectorEC + PUBWEAK VectorF0 + PUBLIC _unhandled_exception + + SECTION .text:CODE:REORDER(1) + THUMB + +NMIVector +HardFaultVector +MemManageVector +BusFaultVector +UsageFaultVector +Vector1C +Vector20 +Vector24 +Vector28 +SVCallVector +DebugMonitorVector +Vector34 +PendSVVector +SysTickVector +Vector40 +Vector44 +Vector48 +Vector4C +Vector50 +Vector54 +Vector58 +Vector5C +Vector60 +Vector64 +Vector68 +Vector6C +Vector70 +Vector74 +Vector78 +Vector7C +Vector80 +Vector84 +Vector88 +Vector8C +Vector90 +Vector94 +Vector98 +Vector9C +VectorA0 +VectorA4 +VectorA8 +VectorAC +VectorB0 +VectorB4 +VectorB8 +VectorBC +VectorC0 +VectorC4 +VectorC8 +VectorCC +VectorD0 +VectorD4 +VectorD8 +VectorDC +VectorE0 +VectorE4 +VectorE8 +VectorEC +VectorF0 +_unhandled_exception + b _unhandled_exception + + END diff --git a/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h b/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h new file mode 100644 index 000000000..b43bbd92a --- /dev/null +++ b/os/ports/RVCT/ARMCMx/STM32L1xx/cmparams.h @@ -0,0 +1,57 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file RVCT/ARMCMx/STM32L1xx/cmparams.h + * @brief ARM Cortex-M3 parameters for the STM32L1xx. + * + * @defgroup RVCT_ARMCMx_STM32L1xx STM32L1xx Specific Parameters + * @ingroup RVCT_ARMCMx_SPECIFIC + * @details This file contains the Cortex-M3 specific parameters for the + * STM32L1xx platform. + * @{ + */ + +#ifndef _CMPARAMS_H_ +#define _CMPARAMS_H_ + +/** + * @brief Cortex core model. + */ +#define CORTEX_MODEL CORTEX_M3 + +/** + * @brief Systick unit presence. + */ +#define CORTEX_HAS_ST TRUE + +/** + * @brief Memory Protection unit presence. + */ +#define CORTEX_HAS_MPU TRUE + +/** + * @brief Number of bits in priority masks. + */ +#define CORTEX_PRIORITY_BITS 4 + +#endif /* _CMPARAMS_H_ */ + +/** @} */ diff --git a/os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s b/os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s new file mode 100644 index 000000000..0898c9d61 --- /dev/null +++ b/os/ports/RVCT/ARMCMx/STM32L1xx/vectors.s @@ -0,0 +1,227 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#if !defined(STM32L1XX_MD) +#define _FROM_ASM_ +#include "board.h" +#endif + + PRESERVE8 + + AREA RESET, DATA, READONLY + + IMPORT __initial_msp + IMPORT Reset_Handler + EXPORT __Vectors + +__Vectors + DCD __initial_msp + DCD Reset_Handler + DCD NMIVector + DCD HardFaultVector + DCD MemManageVector + DCD BusFaultVector + DCD UsageFaultVector + DCD Vector1C + DCD Vector20 + DCD Vector24 + DCD Vector28 + DCD SVCallVector + DCD DebugMonitorVector + DCD Vector34 + DCD PendSVVector + DCD SysTickVector + DCD Vector40 + DCD Vector44 + DCD Vector48 + DCD Vector4C + DCD Vector50 + DCD Vector54 + DCD Vector58 + DCD Vector5C + DCD Vector60 + DCD Vector64 + DCD Vector68 + DCD Vector6C + DCD Vector70 + DCD Vector74 + DCD Vector78 + DCD Vector7C + DCD Vector80 + DCD Vector84 + DCD Vector88 + DCD Vector8C + DCD Vector90 + DCD Vector94 + DCD Vector98 + DCD Vector9C + DCD VectorA0 + DCD VectorA4 + DCD VectorA8 + DCD VectorAC + DCD VectorB0 + DCD VectorB4 + DCD VectorB8 + DCD VectorBC + DCD VectorC0 + DCD VectorC4 + DCD VectorC8 + DCD VectorCC + DCD VectorD0 + DCD VectorD4 + DCD VectorD8 + DCD VectorDC + DCD VectorE0 + DCD VectorE4 + DCD VectorE8 + DCD VectorEC + DCD VectorF0 + + AREA |.text|, CODE, READONLY + THUMB + +/* + * Default interrupt handlers. + */ + EXPORT _unhandled_exception +_unhandled_exception PROC + EXPORT NMIVector [WEAK] + EXPORT HardFaultVector [WEAK] + EXPORT MemManageVector [WEAK] + EXPORT BusFaultVector [WEAK] + EXPORT UsageFaultVector [WEAK] + EXPORT Vector1C [WEAK] + EXPORT Vector20 [WEAK] + EXPORT Vector24 [WEAK] + EXPORT Vector28 [WEAK] + EXPORT SVCallVector [WEAK] + EXPORT DebugMonitorVector [WEAK] + EXPORT Vector34 [WEAK] + EXPORT PendSVVector [WEAK] + EXPORT SysTickVector [WEAK] + EXPORT Vector40 [WEAK] + EXPORT Vector44 [WEAK] + EXPORT Vector48 [WEAK] + EXPORT Vector4C [WEAK] + EXPORT Vector50 [WEAK] + EXPORT Vector54 [WEAK] + EXPORT Vector58 [WEAK] + EXPORT Vector5C [WEAK] + EXPORT Vector60 [WEAK] + EXPORT Vector64 [WEAK] + EXPORT Vector68 [WEAK] + EXPORT Vector6C [WEAK] + EXPORT Vector70 [WEAK] + EXPORT Vector74 [WEAK] + EXPORT Vector78 [WEAK] + EXPORT Vector7C [WEAK] + EXPORT Vector80 [WEAK] + EXPORT Vector84 [WEAK] + EXPORT Vector88 [WEAK] + EXPORT Vector8C [WEAK] + EXPORT Vector90 [WEAK] + EXPORT Vector94 [WEAK] + EXPORT Vector98 [WEAK] + EXPORT Vector9C [WEAK] + EXPORT VectorA0 [WEAK] + EXPORT VectorA4 [WEAK] + EXPORT VectorA8 [WEAK] + EXPORT VectorAC [WEAK] + EXPORT VectorB0 [WEAK] + EXPORT VectorB4 [WEAK] + EXPORT VectorB8 [WEAK] + EXPORT VectorBC [WEAK] + EXPORT VectorC0 [WEAK] + EXPORT VectorC4 [WEAK] + EXPORT VectorC8 [WEAK] + EXPORT VectorCC [WEAK] + EXPORT VectorD0 [WEAK] + EXPORT VectorD4 [WEAK] + EXPORT VectorD8 [WEAK] + EXPORT VectorDC [WEAK] + EXPORT VectorE0 [WEAK] + EXPORT VectorE4 [WEAK] + EXPORT VectorE8 [WEAK] + EXPORT VectorEC [WEAK] + EXPORT VectorF0 [WEAK] + +NMIVector +HardFaultVector +MemManageVector +BusFaultVector +UsageFaultVector +Vector1C +Vector20 +Vector24 +Vector28 +SVCallVector +DebugMonitorVector +Vector34 +PendSVVector +SysTickVector +Vector40 +Vector44 +Vector48 +Vector4C +Vector50 +Vector54 +Vector58 +Vector5C +Vector60 +Vector64 +Vector68 +Vector6C +Vector70 +Vector74 +Vector78 +Vector7C +Vector80 +Vector84 +Vector88 +Vector8C +Vector90 +Vector94 +Vector98 +Vector9C +VectorA0 +VectorA4 +VectorA8 +VectorAC +VectorB0 +VectorB4 +VectorB8 +VectorBC +VectorC0 +VectorC4 +VectorC8 +VectorCC +VectorD0 +VectorD4 +VectorD8 +VectorDC +VectorE0 +VectorE4 +VectorE8 +VectorEC +VectorF0 + b _unhandled_exception + ENDP + + END -- cgit v1.2.3