From 81168cec2f17661adfd41595dbb3c6e836efc59e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Jan 2012 09:13:33 +0000 Subject: Added DMA copy to the DMA stress test application. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3835 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- readme.txt | 2 + testhal/STM32F4xx/DMA_STORM/main.c | 80 ++++++++++++++++++++++++++++++++------ 2 files changed, 71 insertions(+), 11 deletions(-) diff --git a/readme.txt b/readme.txt index 0aeefcfb4..8ee555086 100644 --- a/readme.txt +++ b/readme.txt @@ -79,6 +79,8 @@ - FIX: Fixed SYSCFG clock not started in STM32L1/F4 HALs (bug 3449139). - FIX: Fixed wrong definitions in STM32L-Discovery board file (bug 3449076). - OPT: Improved the exception exit code in the GCC Cortex-Mx ports. +- NEW: Added a DMA stress test application for the STM32F4 in order to assess + robustness of the whole HAL. - NEW: Added a Time Measurement driver to the HAL, this generic driver uses the realtime counters abstracted in the HAL driver. - NEW: Improved the STM32F1xx HAL driver, it now has the same features and diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index eec06dc77..a8f7e130b 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -18,10 +18,11 @@ along with this program. If not, see . */ +#include + #include "ch.h" #include "hal.h" - #define ADC_GRP2_NUM_CHANNELS 8 #define ADC_GRP2_BUF_DEPTH 16 @@ -82,9 +83,9 @@ static void tmo(void *p) { /* * SPI thread. */ -static WORKING_AREA(waSPI1, 512); -static WORKING_AREA(waSPI2, 512); -static WORKING_AREA(waSPI3, 512); +static WORKING_AREA(waSPI1, 1024); +static WORKING_AREA(waSPI2, 1024); +static WORKING_AREA(waSPI3, 1024); static msg_t spi_thread(void *p) { unsigned i; SPIDriver *spip = (SPIDriver *)p; @@ -101,7 +102,7 @@ static msg_t spi_thread(void *p) { /* Starts a VT working as watchdog to catch a malfunction in the SPI driver.*/ chSysLock(); - chVTSetI(&vt, MS2ST(500), tmo, NULL); + chVTSetI(&vt, MS2ST(10), tmo, NULL); chSysUnlock(); spiExchange(spip, sizeof(txbuf), txbuf, rxbuf); @@ -111,9 +112,6 @@ static msg_t spi_thread(void *p) { if (chVTIsArmedI(&vt)) chVTResetI(&vt); chSysUnlock(); - - /* Releases a bit of CPU time.*/ - chThdSleep(1); } } @@ -138,6 +136,8 @@ static msg_t Thread1(void *arg) { * Application entry point. */ int main(void) { + unsigned i; + static uint8_t patterns1[4096], patterns2[4096], buf1[4096], buf2[4096]; /* System initializations. - HAL initialization, this also initializes the configured device drivers @@ -148,7 +148,8 @@ int main(void) { chSysInit(); /* Creates the blinker thread.*/ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 10, + Thread1, NULL); /* Activates the ADC1 driver and the thermal sensor.*/ adcStart(&ADCD1, NULL); @@ -167,9 +168,66 @@ int main(void) { chThdCreateStatic(waSPI2, sizeof(waSPI2), NORMALPRIO + 1, spi_thread, &SPID2); chThdCreateStatic(waSPI3, sizeof(waSPI3), NORMALPRIO + 1, spi_thread, &SPID3); - /* Normal main() thread activity, in this demo it does nothing.*/ + /* Allocating two DMA2 streams for memory copy operations.*/ + if (dmaStreamAllocate(STM32_DMA2_STREAM6, 0, NULL, NULL)) + chSysHalt(); + if (dmaStreamAllocate(STM32_DMA2_STREAM7, 0, NULL, NULL)) + chSysHalt(); + for (i = 0; i < sizeof (patterns1); i++) + patterns1[i] = (uint8_t)i; + for (i = 0; i < sizeof (patterns2); i++) + patterns2[i] = (uint8_t)(i ^ 0xAA); + + /* Normal main() thread activity, it does continues memory copy operations + using 2 DMA streams at the lowest priority.*/ while (TRUE) { - chThdSleepMilliseconds(500); + VirtualTimer vt; + + /* Starts a VT working as watchdog to catch a malfunction in the DMA + driver.*/ + chSysLock(); + chVTSetI(&vt, MS2ST(10), tmo, NULL); + chSysUnlock(); + + /* Copy pattern 1.*/ + dmaStartMemCopy(STM32_DMA2_STREAM6, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns1, buf1, sizeof (patterns1)); + dmaStartMemCopy(STM32_DMA2_STREAM7, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns1, buf2, sizeof (patterns1)); + dmaWaitCompletion(STM32_DMA2_STREAM6); + dmaWaitCompletion(STM32_DMA2_STREAM7); + if (memcmp(patterns1, buf1, sizeof (patterns1))) + chSysHalt(); + if (memcmp(patterns1, buf2, sizeof (patterns1))) + chSysHalt(); + + /* Copy pattern 2.*/ + dmaStartMemCopy(STM32_DMA2_STREAM6, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns2, buf1, sizeof (patterns2)); + dmaStartMemCopy(STM32_DMA2_STREAM7, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns2, buf2, sizeof (patterns2)); + dmaWaitCompletion(STM32_DMA2_STREAM6); + dmaWaitCompletion(STM32_DMA2_STREAM7); + if (memcmp(patterns2, buf1, sizeof (patterns1))) + chSysHalt(); + if (memcmp(patterns2, buf2, sizeof (patterns1))) + chSysHalt(); + + /* Stops the watchdog.*/ + chSysLock(); + if (chVTIsArmedI(&vt)) + chVTResetI(&vt); + chSysUnlock(); + + chThdSleepMilliseconds(2); } return 0; } -- cgit v1.2.3