From 71b7be3d452756b85d4d05876a1e1c16ee62558c Mon Sep 17 00:00:00 2001 From: isiora Date: Wed, 22 Nov 2017 21:08:30 +0000 Subject: minor changes git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11065 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c index 8450b8bca..e2ae36efd 100644 --- a/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c +++ b/os/common/startup/ARMCAx-TZ/devices/SAMA5D2/mmu.c @@ -327,7 +327,7 @@ void __mmu_init(void) { TTE_SECT_EXE_NEVER | TTE_SECT_S | TTE_TYPE_SECT; /* - * Invalidate I/D cache + * Invalidate L1 I/D cache * Enable caches and MMU */ __set_TTBR0((uint32_t)mmuTable|0x5B); @@ -336,7 +336,7 @@ void __mmu_init(void) { __ISB(); /* - * I cache invalidate and enable + * L1 I cache invalidate and enable */ pm = __get_SCTLR(); if ((pm & SCTLR_I_Msk) == 0) { @@ -350,7 +350,7 @@ void __mmu_init(void) { if ((pm & SCTLR_M_Msk) == 0) __set_SCTLR(pm | SCTLR_M_Msk); /* - * D cache clean, invalidate and enable + * L1 D cache clean, invalidate and enable */ pm = __get_SCTLR(); if ((pm & SCTLR_C_Msk) == 0) { -- cgit v1.2.3