From 631660116597bf80cc90d4aed5235cb4b46e2b27 Mon Sep 17 00:00:00 2001 From: Theodore Ateba Date: Fri, 14 Jul 2017 21:52:58 +0000 Subject: Add NIL support for AVR Tiny architecture. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10332 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- demos/AVR/NIL-DIGISPARK-ATTINY-167/Makefile | 584 +++++++++++++++++++++++++ demos/AVR/NIL-DIGISPARK-ATTINY-167/chconf.h | 274 ++++++++++++ demos/AVR/NIL-DIGISPARK-ATTINY-167/halconf.h | 402 +++++++++++++++++ demos/AVR/NIL-DIGISPARK-ATTINY-167/main.c | 91 ++++ demos/AVR/NIL-DIGISPARK-ATTINY-167/mcuconf.h | 121 +++++ os/common/ports/AVR/chcore.c | 7 +- os/hal/boards/DIGISPARK_ATTINY_167/board.c | 72 +++ os/hal/boards/DIGISPARK_ATTINY_167/board.h | 49 +++ os/hal/boards/DIGISPARK_ATTINY_167/board.mk | 5 + os/hal/ports/AVR/TINY/GPIOv1/driver.mk | 9 + os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c | 156 +++++++ os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.h | 331 ++++++++++++++ os/hal/ports/AVR/TINY/TIMv1/driver.mk | 19 + os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c | 373 ++++++++++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.h | 221 ++++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c | 335 ++++++++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.h | 195 +++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c | 565 ++++++++++++++++++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.h | 233 ++++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.c | 253 +++++++++++ os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.h | 168 +++++++ os/hal/ports/AVR/TINY/USARTv1/driver.mk | 13 + os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c | 408 +++++++++++++++++ os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.h | 158 +++++++ os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c | 227 ++++++++++ os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.h | 217 +++++++++ os/hal/ports/AVR/TINY/avr_pins.h | 159 +++++++ os/hal/ports/AVR/TINY/avr_timers.h | 55 +++ os/hal/ports/AVR/TINY/hal_lld.c | 55 +++ os/hal/ports/AVR/TINY/hal_lld.h | 72 +++ os/hal/ports/AVR/TINY/platform.mk | 11 + 31 files changed, 5837 insertions(+), 1 deletion(-) create mode 100644 demos/AVR/NIL-DIGISPARK-ATTINY-167/Makefile create mode 100644 demos/AVR/NIL-DIGISPARK-ATTINY-167/chconf.h create mode 100644 demos/AVR/NIL-DIGISPARK-ATTINY-167/halconf.h create mode 100644 demos/AVR/NIL-DIGISPARK-ATTINY-167/main.c create mode 100644 demos/AVR/NIL-DIGISPARK-ATTINY-167/mcuconf.h create mode 100644 os/hal/boards/DIGISPARK_ATTINY_167/board.c create mode 100644 os/hal/boards/DIGISPARK_ATTINY_167/board.h create mode 100644 os/hal/boards/DIGISPARK_ATTINY_167/board.mk create mode 100644 os/hal/ports/AVR/TINY/GPIOv1/driver.mk create mode 100644 os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c create mode 100644 os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.h create mode 100644 os/hal/ports/AVR/TINY/TIMv1/driver.mk create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.h create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.h create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.h create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.c create mode 100644 os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.h create mode 100644 os/hal/ports/AVR/TINY/USARTv1/driver.mk create mode 100644 os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c create mode 100644 os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.h create mode 100644 os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c create mode 100644 os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.h create mode 100644 os/hal/ports/AVR/TINY/avr_pins.h create mode 100644 os/hal/ports/AVR/TINY/avr_timers.h create mode 100644 os/hal/ports/AVR/TINY/hal_lld.c create mode 100644 os/hal/ports/AVR/TINY/hal_lld.h create mode 100644 os/hal/ports/AVR/TINY/platform.mk diff --git a/demos/AVR/NIL-DIGISPARK-ATTINY-167/Makefile b/demos/AVR/NIL-DIGISPARK-ATTINY-167/Makefile new file mode 100644 index 000000000..4c76fa724 --- /dev/null +++ b/demos/AVR/NIL-DIGISPARK-ATTINY-167/Makefile @@ -0,0 +1,584 @@ +# Hey Emacs, this is a -*- makefile -*- +#---------------------------------------------------------------------------- +# WinAVR Makefile Template written by Eric B. Weddington, Jörg Wunsch, et al. +# +# Released to the Public Domain +# +# Additional material for this makefile was written by: +# Peter Fleury +# Tim Henigan +# Colin O'Flynn +# Reiner Patommel +# Markus Pfaff +# Sander Pool +# Frederik Rouleau +# Carlos Lamas +# +#---------------------------------------------------------------------------- +# On command line: +# +# make all = Make software. +# +# make clean = Clean out built project files. +# +# make coff = Convert ELF to AVR COFF. +# +# make extcoff = Convert ELF to AVR Extended COFF. +# +# make program = Download the hex file to the device, using avrdude. +# Please customize the avrdude settings below first! +# +# make debug = Start either simulavr or avarice as specified for debugging, +# with avr-gdb or avr-insight as the front end for debugging. +# +# make filename.s = Just compile filename.c into the assembler code only. +# +# make filename.i = Create a preprocessed source file for use in submitting +# bug reports to the GCC project. +# +# To rebuild project do "make clean" then "make all". +#---------------------------------------------------------------------------- + +# Activation of the smart build +USE_SMART_BUILD = yes + +# MCU name +MCU = attiny167 + +# Processor frequency. +F_CPU = 16000000 + +# Output format. (can be srec, ihex, binary) +FORMAT = ihex + +# Target file name (without extension). +TARGET = ch + +# Object files directory +# To put object files in current directory, use a dot (.), do NOT make +# this an empty or blank macro! +OBJDIR = . + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/boards/DIGISPARK_ATTINY_167/board.mk +include $(CHIBIOS)/os/hal/ports/AVR/TINY/platform.mk +include $(CHIBIOS)/os/hal/osal/nil/osal.mk +include $(CHIBIOS)/os/nil/nil.mk +include $(CHIBIOS)/os/common/ports/AVR/compilers/GCC/mk/port.mk + +# List C source files here. (C dependencies are automatically generated.) +SRC = $(KERNSRC) \ + $(PORTSRC) \ + $(OSALSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# List C++ source files here. (C dependencies are automatically generated.) +CPPSRC = + +# List Assembler source files here. +# Make them always end in a capital .S. Files ending in a lowercase .s +# will not be considered source files but generated files (assembler +# output from the compiler), and will be deleted upon "make clean"! +# Even though the DOS/Win* filesystem matches both .s and .S the same, +# it will preserve the spelling of the filenames, and gcc itself does +# care about how the name is spelled on its command-line. +ASRC = + +# Optimization level, can be [0, 1, 2, 3, s]. +# 0 = turn off optimization. s = optimize for size. +# (Note: 3 is not always the best optimization level. See avr-libc FAQ.) +OPT = 2 + +# Debugging format. +# Native formats for AVR-GCC's -g are dwarf-2 [default] or stabs. +# AVR Studio 4.10 requires dwarf-2. +# AVR [Extended] COFF format requires stabs, plus an avr-objcopy run. +DEBUG = dwarf-2 + +# List any extra directories to look for include files here. +# Each directory must be seperated by a space. +# Use forward slashes for directory separators. +# For a directory that has spaces, enclose it in quotes. +EXTRAINCDIRS = $(CHIBIOS)/os/license $(PORTINC) $(KERNINC) \ + $(HALINC) $(OSALINC) $(PLATFORMINC) \ + $(BOARDINC) $(CHIBIOS)/os/various + +# Compiler flag to set the C Standard level. +# c89 = "ANSI" C +# gnu89 = c89 plus GCC extensions +# c99 = ISO C99 standard (not yet fully implemented) +# gnu99 = c99 plus GCC extensions +CSTANDARD = -std=gnu11 + +# Place -D or -U options here for C sources +CDEFS = -DF_CPU=$(F_CPU)UL + +# Place -D or -U options here for ASM sources +ADEFS = -DF_CPU=$(F_CPU) + +# Place -D or -U options here for C++ sources +CPPDEFS = -DF_CPU=$(F_CPU)UL +#CPPDEFS += -D__STDC_LIMIT_MACROS +#CPPDEFS += -D__STDC_CONSTANT_MACROS + +#---------------- Compiler Options C ---------------- +# -g*: generate debugging information +# -O*: optimization level +# -f...: tuning, see GCC manual and avr-libc documentation +# -Wall...: warning level +# -Wa,...: tell GCC to pass this to the assembler. +# -adhlns...: create assembler listing +CFLAGS = -g$(DEBUG) +CFLAGS += $(CDEFS) +CFLAGS += -O$(OPT) +CFLAGS += -funsigned-char +CFLAGS += -funsigned-bitfields +CFLAGS += -fpack-struct +CFLAGS += -fshort-enums +#CFLAGS += -fno-strict-aliasing +CFLAGS += -Wall +CFLAGS += -Wstrict-prototypes +#CFLAGS += -mshort-calls +#CFLAGS += -fno-unit-at-a-time +#CFLAGS += -Wundef +#CFLAGS += -Wunreachable-code +#CFLAGS += -Wsign-compare +CFLAGS += -Wa,-adhlns=$(<:%.c=$(OBJDIR)/%.lst) +CFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +CFLAGS += $(CSTANDARD) +#CFLAGS += -mrelax +CFLAGS += -fdata-sections +CFLAGS += -ffunction-sections + +#---------------- Compiler Options C++ ---------------- +# -g*: generate debugging information +# -O*: optimization level +# -f...: tuning, see GCC manual and avr-libc documentation +# -Wall...: warning level +# -Wa,...: tell GCC to pass this to the assembler. +# -adhlns...: create assembler listing +CPPFLAGS = -g$(DEBUG) +CPPFLAGS += $(CPPDEFS) +CPPFLAGS += -O$(OPT) +CPPFLAGS += -funsigned-char +CPPFLAGS += -funsigned-bitfields +CPPFLAGS += -fpack-struct +CPPFLAGS += -fshort-enums +CPPFLAGS += -fno-exceptions +CPPFLAGS += -Wall +CFLAGS += -Wundef +#CPPFLAGS += -mshort-calls +#CPPFLAGS += -fno-unit-at-a-time +#CPPFLAGS += -Wstrict-prototypes +#CPPFLAGS += -Wunreachable-code +#CPPFLAGS += -Wsign-compare +CPPFLAGS += -Wa,-adhlns=$(<:%.cpp=$(OBJDIR)/%.lst) +CPPFLAGS += $(patsubst %,-I%,$(EXTRAINCDIRS)) +#CPPFLAGS += $(CSTANDARD) +CPPFLAGS += -fdata-sections +CPPFLAGS += -ffunction-sections + +#---------------- Assembler Options ---------------- +# -Wa,...: tell GCC to pass this to the assembler. +# -adhlns: create listing +# -gstabs: have the assembler create line number information; note that +# for use in COFF files, additional information about filenames +# and function names needs to be present in the assembler source +# files -- see avr-libc docs [FIXME: not yet described there] +# -listing-cont-lines: Sets the maximum number of continuation lines of hex +# dump that will be displayed for a given single line of source input. +ASFLAGS = $(ADEFS) -Wa,-adhlns=$(<:%.S=$(OBJDIR)/%.lst),-gstabs,--listing-cont-lines=100 + +#---------------- Library Options ---------------- +# Minimalistic printf version +PRINTF_LIB_MIN = -Wl,-u,vfprintf -lprintf_min + +# Floating point printf version (requires MATH_LIB = -lm below) +PRINTF_LIB_FLOAT = -Wl,-u,vfprintf -lprintf_flt + +# If this is left blank, then it will use the Standard printf version. +PRINTF_LIB = $(PRINTF_LIB_MIN) +#PRINTF_LIB = $(PRINTF_LIB_MIN) +#PRINTF_LIB = $(PRINTF_LIB_FLOAT) + +# Minimalistic scanf version +SCANF_LIB_MIN = -Wl,-u,vfscanf -lscanf_min + +# Floating point + %[ scanf version (requires MATH_LIB = -lm below) +SCANF_LIB_FLOAT = -Wl,-u,vfscanf -lscanf_flt + +# If this is left blank, then it will use the Standard scanf version. +SCANF_LIB = $(SCANF_LIB_MIN) +#SCANF_LIB = $(SCANF_LIB_MIN) +#SCANF_LIB = $(SCANF_LIB_FLOAT) + +MATH_LIB = -lm + +# List any extra directories to look for libraries here. +# Each directory must be seperated by a space. +# Use forward slashes for directory separators. +# For a directory that has spaces, enclose it in quotes. +EXTRALIBDIRS = + +#---------------- External Memory Options ---------------- + +# 64 KB of external RAM, starting after internal RAM (ATmega128!), +# used for variables (.data/.bss) and heap (malloc()). +#EXTMEMOPTS = -Wl,-Tdata=0x801100,--defsym=__heap_end=0x80ffff + +# 64 KB of external RAM, starting after internal RAM (ATmega128!), +# only used for heap (malloc()). +#EXTMEMOPTS = -Wl,--section-start,.data=0x801100,--defsym=__heap_end=0x80ffff + +EXTMEMOPTS = + +#---------------- Linker Options ---------------- +# -Wl,...: tell GCC to pass this to linker. +# -Map: create map file +# --cref: add cross reference to map file +LDFLAGS = -Wl,-Map=$(TARGET).map,--cref,--gc-sections +LDFLAGS += $(EXTMEMOPTS) +LDFLAGS += $(patsubst %,-L%,$(EXTRALIBDIRS)) +LDFLAGS += $(PRINTF_LIB) $(SCANF_LIB) $(MATH_LIB) +#LDFLAGS += -T linker_script.x + +#---------------- Programming Options (avrdude) ---------------- + +# Programming hardware: alf avr910 avrisp bascom bsd +# dt006 pavr picoweb pony-stk200 sp12 stk200 stk500 +# +# Type: avrdude -c ? +# to get a full listing. +# +AVRDUDE_PROGRAMMER = arduino + +# com1 = serial port. Use lpt1 to connect to parallel port. +AVRDUDE_PORT = /dev/ttyACM0 # programmer connected to serial device + +AVRDUDE_WRITE_FLASH = -U flash:w:$(TARGET).hex +#AVRDUDE_WRITE_EEPROM = -U eeprom:w:$(TARGET).eep + +# Uncomment the following if you want avrdude's erase cycle counter. +# Note that this counter needs to be initialized first using -Yn, +# see avrdude manual. +#AVRDUDE_ERASE_COUNTER = -y + +# Uncomment the following if you do /not/ wish a verification to be +# performed after programming the device. +#AVRDUDE_NO_VERIFY = -V + +# Increase verbosity level. Please use this when submitting bug +# reports about avrdude. See +# to submit bug reports. +#AVRDUDE_VERBOSE = -v -v + +AVRDUDE_FLAGS = -p $(MCU) +AVRDUDE_FLAGS += -P $(AVRDUDE_PORT) +AVRDUDE_FLAGS += -b 115200 +AVRDUDE_FLAGS += -c $(AVRDUDE_PROGRAMMER) +AVRDUDE_FLAGS += $(AVRDUDE_NO_VERIFY) +AVRDUDE_FLAGS += $(AVRDUDE_VERBOSE) +AVRDUDE_FLAGS += $(AVRDUDE_ERASE_COUNTER) + +#---------------- Debugging Options ---------------- + +# For simulavr only - target MCU frequency. +DEBUG_MFREQ = $(F_CPU) + +# Set the DEBUG_UI to either gdb or insight. +# DEBUG_UI = gdb +DEBUG_UI = insight + +# Set the debugging back-end to either avarice, simulavr. +DEBUG_BACKEND = avarice +#DEBUG_BACKEND = simulavr + +# GDB Init Filename. +GDBINIT_FILE = __avr_gdbinit + +# When using avarice settings for the JTAG +JTAG_DEV = /dev/com1 + +# Debugging port used to communicate between GDB / avarice / simulavr. +DEBUG_PORT = 4242 + +# Debugging host used to communicate between GDB / avarice / simulavr, normally +# just set to localhost unless doing some sort of crazy debugging when +# avarice is running on a different computer. +DEBUG_HOST = localhost + +#============================================================================ + +# Define programs and commands. +SHELL = sh +CC = avr-gcc +OBJCOPY = avr-objcopy +OBJDUMP = avr-objdump +SIZE = avr-size +AR = avr-ar rcs +NM = avr-nm +AVRDUDE = avrdude +REMOVE = rm -f +REMOVEDIR = rm -rf +COPY = cp +WINSHELL = cmd + +# Define Messages +# English +MSG_ERRORS_NONE = Errors: none +MSG_BEGIN = -------- begin -------- +MSG_END = -------- end -------- +MSG_SIZE_BEFORE = Size before: +MSG_SIZE_AFTER = Size after: +MSG_COFF = Converting to AVR COFF: +MSG_EXTENDED_COFF = Converting to AVR Extended COFF: +MSG_FLASH = Creating load file for Flash: +MSG_EEPROM = Creating load file for EEPROM: +MSG_EXTENDED_LISTING = Creating Extended Listing: +MSG_SYMBOL_TABLE = Creating Symbol Table: +MSG_LINKING = Linking: +MSG_COMPILING = Compiling C: +MSG_COMPILING_CPP = Compiling C++: +MSG_ASSEMBLING = Assembling: +MSG_CLEANING = Cleaning project: +MSG_CREATING_LIBRARY = Creating library: + +# Define all object files. +OBJ = $(SRC:%.c=$(OBJDIR)/%.o) $(CPPSRC:%.cpp=$(OBJDIR)/%.o) $(ASRC:%.S=$(OBJDIR)/%.o) + +# Define all listing files. +LST = $(SRC:%.c=$(OBJDIR)/%.lst) $(CPPSRC:%.cpp=$(OBJDIR)/%.lst) $(ASRC:%.S=$(OBJDIR)/%.lst) + +# Compiler flags to generate dependency files. +GENDEPFLAGS = -MMD -MP -MF .dep/$(@F).d + +# Combine all necessary flags and optional flags. +# Add target processor to flags. +ALL_CFLAGS = -mmcu=$(MCU) -I. $(CFLAGS) $(GENDEPFLAGS) +ALL_CPPFLAGS = -mmcu=$(MCU) -I. -x c++ $(CPPFLAGS) $(GENDEPFLAGS) +ALL_ASFLAGS = -mmcu=$(MCU) -I. -x assembler-with-cpp $(ASFLAGS) + +# Default target. +all: begin gccversion sizebefore build sizeafter end + +# Change the build target to build a HEX file or a library. +build: elf hex bin eep lss sym +#build: lib + +elf: $(TARGET).elf +hex: $(TARGET).hex +bin: $(TARGET).bin +eep: $(TARGET).eep +lss: $(TARGET).lss +sym: $(TARGET).sym +LIBNAME=lib$(TARGET).a +lib: $(LIBNAME) + +# Eye candy. +# AVR Studio 3.x does not check make's exit code but relies on +# the following magic strings to be generated by the compile job. +begin: + @echo + @echo $(MSG_BEGIN) + +end: + @echo $(MSG_END) + @echo + +# Display size of file. +HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex +ELFSIZE = $(SIZE) --mcu=$(MCU) --format=avr $(TARGET).elf + +sizebefore: + @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_BEFORE); $(ELFSIZE); \ + 2>/dev/null; echo; fi + +sizeafter: + @if test -f $(TARGET).elf; then echo; echo $(MSG_SIZE_AFTER); $(ELFSIZE); \ + 2>/dev/null; echo; fi + +# Display compiler version information. +gccversion : + @$(CC) --version + +# Program the device. +#program: $(TARGET).hex $(TARGET).eep +# $(AVRDUDE) $(AVRDUDE_FLAGS) $(AVRDUDE_WRITE_FLASH) $(AVRDUDE_WRITE_EEPROM) + +# +# Rule and variable used to program the ATtiny 85. +################################################################################ +MICRONUCLEUS = micronucleus # Micronucleus command +MICRONUCLEUS_TIMEOUT_ARG = --timeout 60 # Time out command argument +MICRONUCLEUS_RUN_ARG = --run # Use to run program after flashing +MICRONUCLEUS_TYPE_ARG = --type raw # intel-hex(.hex) | raw(.bin) +MICRONUCLEUS_DUMP_PROGRESS = --dump-progress # dump progress while flashing + +MICRONUCLEUS_FLAGS = $(MICRONUCLEUS_TYPE_ARG) +MICRONUCLEUS_FLAGS += $(MICRONUCLEUS_TIMEOUT_ARG) +MICRONUCLEUS_FLAGS += $(MICRONUCLEUS_RUN_ARG) + +program: $(TARGET).bin + @echo + @echo $(MSG_BEGIN) + $(MICRONUCLEUS) $(MICRONUCLEUS_FLAGS) $(TARGET).bin + @echo $(MSG_END) + @echo + + +# Generate avr-gdb config/init file which does the following: +# define the reset signal, load the target file, connect to target, and set +# a breakpoint at main(). +gdb-config: + @$(REMOVE) $(GDBINIT_FILE) + @echo define reset >> $(GDBINIT_FILE) + @echo SIGNAL SIGHUP >> $(GDBINIT_FILE) + @echo end >> $(GDBINIT_FILE) + @echo file $(TARGET).elf >> $(GDBINIT_FILE) + @echo target remote $(DEBUG_HOST):$(DEBUG_PORT) >> $(GDBINIT_FILE) +ifeq ($(DEBUG_BACKEND),simulavr) + @echo load >> $(GDBINIT_FILE) +endif + @echo break main >> $(GDBINIT_FILE) + +debug: gdb-config $(TARGET).elf +ifeq ($(DEBUG_BACKEND), avarice) + @echo Starting AVaRICE - Press enter when "waiting to connect" message displays. + @$(WINSHELL) /c start avarice --jtag $(JTAG_DEV) --erase --program --file \ + $(TARGET).elf $(DEBUG_HOST):$(DEBUG_PORT) + @$(WINSHELL) /c pause + +else + @$(WINSHELL) /c start simulavr --gdbserver --device $(MCU) --clock-freq \ + $(DEBUG_MFREQ) --port $(DEBUG_PORT) +endif + @$(WINSHELL) /c start avr-$(DEBUG_UI) --command=$(GDBINIT_FILE) + +# Convert ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. +COFFCONVERT = $(OBJCOPY) --debugging +COFFCONVERT += --change-section-address .data-0x800000 +COFFCONVERT += --change-section-address .bss-0x800000 +COFFCONVERT += --change-section-address .noinit-0x800000 +COFFCONVERT += --change-section-address .eeprom-0x810000 + +coff: $(TARGET).elf + @echo + @echo $(MSG_COFF) $(TARGET).cof + $(COFFCONVERT) -O coff-avr $< $(TARGET).cof + +extcoff: $(TARGET).elf + @echo + @echo $(MSG_EXTENDED_COFF) $(TARGET).cof + $(COFFCONVERT) -O coff-ext-avr $< $(TARGET).cof + +# Create final output files (.hex, .eep) from ELF output file. +%.hex: %.elf + @echo + @echo $(MSG_FLASH) $@ + $(OBJCOPY) -O $(FORMAT) -R .eeprom $< $@ + +%.bin: %.elf + @echo + @echo $(MSG_FLASH) $@ + $(OBJCOPY) -O binary -R .eeprom $< $@ + +%.eep: %.elf + @echo + @echo $(MSG_EEPROM) $@ + -$(OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" \ + --change-section-lma .eeprom=0 --no-change-warnings -O $(FORMAT) $< $@ || exit 0 + +# Create extended listing file from ELF output file. +%.lss: %.elf + @echo + @echo $(MSG_EXTENDED_LISTING) $@ + $(OBJDUMP) -h -S $< > $@ + +# Create a symbol table from ELF output file. +%.sym: %.elf + @echo + @echo $(MSG_SYMBOL_TABLE) $@ + $(NM) -n $< > $@ + +# Create library from object files. +.SECONDARY : $(TARGET).a +.PRECIOUS : $(OBJ) +%.a: $(OBJ) + @echo + @echo $(MSG_CREATING_LIBRARY) $@ + $(AR) $@ $(OBJ) + +# Link: create ELF output file from object files. +.SECONDARY : $(TARGET).elf +.PRECIOUS : $(OBJ) +%.elf: $(OBJ) + @echo + @echo $(MSG_LINKING) $@ + $(CC) $(ALL_CFLAGS) $^ --output $@ $(LDFLAGS) + +# Compile: create object files from C source files. +$(OBJDIR)/%.o : %.c + @echo + @echo $(MSG_COMPILING) $< + $(CC) -c $(ALL_CFLAGS) $< -o $@ + +# Compile: create object files from C++ source files. +$(OBJDIR)/%.o : %.cpp + @echo + @echo $(MSG_COMPILING_CPP) $< + $(CC) -c $(ALL_CPPFLAGS) $< -o $@ + +# Compile: create assembler files from C source files. +%.s : %.c + $(CC) -S $(ALL_CFLAGS) $< -o $@ + +# Compile: create assembler files from C++ source files. +%.s : %.cpp + $(CC) -S $(ALL_CPPFLAGS) $< -o $@ + +# Assemble: create object files from assembler source files. +$(OBJDIR)/%.o : %.S + @echo + @echo $(MSG_ASSEMBLING) $< + $(CC) -c $(ALL_ASFLAGS) $< -o $@ + +# Create preprocessed source for use in sending a bug report. +%.i : %.c + $(CC) -E -mmcu=$(MCU) -I. $(CFLAGS) $< -o $@ + +# Target: clean project. +clean: begin clean_list end + +clean_list : + @echo + @echo $(MSG_CLEANING) + $(REMOVE) $(TARGET).hex + $(REMOVE) $(TARGET).bin + $(REMOVE) $(TARGET).eep + $(REMOVE) $(TARGET).cof + $(REMOVE) $(TARGET).elf + $(REMOVE) $(TARGET).map + $(REMOVE) $(TARGET).sym + $(REMOVE) $(TARGET).lss + $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.o) + $(REMOVE) $(SRC:%.c=$(OBJDIR)/%.lst) + $(REMOVE) $(SRC:.c=.s) + $(REMOVE) $(SRC:.c=.d) + $(REMOVE) $(SRC:.c=.i) + $(REMOVEDIR) .dep + +# Create object files directory +$(shell mkdir $(OBJDIR) 2>/dev/null) + +# Include the dependency files. +-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + +# Listing of phony targets. +.PHONY : all begin finish end sizebefore sizeafter gccversion \ +build elf hex bin eep lss sym coff extcoff \ +clean clean_list program debug gdb-config diff --git a/demos/AVR/NIL-DIGISPARK-ATTINY-167/chconf.h b/demos/AVR/NIL-DIGISPARK-ATTINY-167/chconf.h new file mode 100644 index 000000000..e2c8ea18e --- /dev/null +++ b/demos/AVR/NIL-DIGISPARK-ATTINY-167/chconf.h @@ -0,0 +1,274 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_NIL_CONF_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of user threads in the application. + * @note This number is not inclusive of the idle thread which is + * Implicitly handled. + */ +#define CH_CFG_NUM_THREADS 1 + +/** @} */ + +/*===========================================================================*/ +/** + * @name System timer settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 16 + +/** + * @brief System tick frequency. + * @note This value together with the @p CH_CFG_ST_RESOLUTION + * option defines the maximum amount of time allowed for + * timeouts. + */ +#define CH_CFG_ST_FREQUENCY 15624 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_SEMAPHORES TRUE + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#define CH_CFG_USE_MUTEXES FALSE + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_EVENTS TRUE + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#define CH_CFG_USE_MAILBOXES TRUE + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMCORE TRUE + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_HEAP TRUE + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_MEMPOOLS TRUE + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#define CH_CFG_MEMCORE_SIZE 0 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + +/** + * @brief Debug option, system state check. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_SYSTEM_STATE_CHECK FALSE + +/** + * @brief Debug option, parameters checks. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_CHECKS FALSE + +/** + * @brief System assertions. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_ASSERTS FALSE + +/** + * @brief Stack check. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_ENABLE_STACK_CHECK FALSE + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System initialization hook. + */ +#if !defined(CH_CFG_SYSTEM_INIT_HOOK) || defined(__DOXYGEN__) +#define CH_CFG_SYSTEM_INIT_HOOK() { \ +} +#endif + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + */ +#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) { \ + /* Add custom threads initialization code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ +} + +/** + * @brief System halt hook. + */ +#if !defined(CH_CFG_SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in nilcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/demos/AVR/NIL-DIGISPARK-ATTINY-167/halconf.h b/demos/AVR/NIL-DIGISPARK-ATTINY-167/halconf.h new file mode 100644 index 000000000..797b62138 --- /dev/null +++ b/demos/AVR/NIL-DIGISPARK-ATTINY-167/halconf.h @@ -0,0 +1,402 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the QSPI subsystem. + */ +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__) +#define HAL_USE_QSPI FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/demos/AVR/NIL-DIGISPARK-ATTINY-167/main.c b/demos/AVR/NIL-DIGISPARK-ATTINY-167/main.c new file mode 100644 index 000000000..0ecf9eb35 --- /dev/null +++ b/demos/AVR/NIL-DIGISPARK-ATTINY-167/main.c @@ -0,0 +1,91 @@ +/* + ChibiOS - Copyright (C) 2016..2017 Theodore Ateba + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "ch.h" + +/* + * UART 1 configuration structure. + */ +const UARTConfig uartConf = { + NULL, /* UART transmission buffer callback. */ + NULL, /* UART physical end of transmission callback. */ + NULL, /* UART Receiver receiver filled callback. */ + NULL, /* UART caracter received callback. */ + NULL, /* UART received error callback. */ + 38400, /* UART baudrate. */ +}; + +THD_WORKING_AREA(waThread1, 32); +THD_FUNCTION(Thread1, arg) { + + (void)arg; + + while (true) { + palTogglePad(IOPORT2, PORTB_LED1); + uartStartSend(&UARTD1, 30, (const void *) "ChibiOS PORT on ATtiny-167!.\n\r"); + chThdSleepMilliseconds(1000); + } +} + +/* + * Threads static table, one entry per thread. The number of entries must + * match NIL_CFG_NUM_THREADS. + */ +THD_TABLE_BEGIN + THD_TABLE_ENTRY(waThread1, "blinker", Thread1, NULL) +THD_TABLE_END + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initialize the UART interface. + */ + uartInit(); + + /* + * Start the Uart 1 interface. + */ + uartStart(&UARTD1, &uartConf); + + /* + * Send an message via the UART 1 interface. + */ + uartStartSend(&UARTD1, 15, (const void *) "Hello world!.\n\r"); + + /* + * This is now the idle thread loop, you may perform here a low priority + * task but you must never try to sleep or wait in this loop. Note that + * this tasks runs at the lowest priority level so any instruction added + * here will be executed after all other tasks have been started. + */ + while (true) { + } +} + diff --git a/demos/AVR/NIL-DIGISPARK-ATTINY-167/mcuconf.h b/demos/AVR/NIL-DIGISPARK-ATTINY-167/mcuconf.h new file mode 100644 index 000000000..130c6f71e --- /dev/null +++ b/demos/AVR/NIL-DIGISPARK-ATTINY-167/mcuconf.h @@ -0,0 +1,121 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * AVR drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + */ + +/* + * ADC driver system settings. + */ +#define AVR_ADC_USE_ADC1 FALSE + +/* + * EXT drivers system settings. + */ +#define AVR_EXT_USE_INT0 FALSE +#define AVR_EXT_USE_INT1 FALSE +#define AVR_EXT_USE_INT2 FALSE +#define AVR_EXT_USE_INT3 FALSE +#define AVR_EXT_USE_INT4 FALSE +#define AVR_EXT_USE_INT5 FALSE + +/* + * PCINT driver system settings. + */ +#define AVR_EXT_USE_PCINT0 FALSE +#define AVR_EXT_USE_PCINT1 FALSE +#define AVR_EXT_USE_PCINT2 FALSE +#define AVR_EXT_USE_PCINT3 FALSE +#define AVR_EXT_USE_PCINT4 FALSE +#define AVR_EXT_USE_PCINT5 FALSE +#define AVR_EXT_USE_PCINT6 FALSE +#define AVR_EXT_USE_PCINT7 FALSE +#define AVR_EXT_USE_PCINT8 FALSE +#define AVR_EXT_USE_PCINT9 FALSE +#define AVR_EXT_USE_PCINT10 FALSE + +/* + * CAN driver system settings. + */ + +/* + * MAC driver system settings. + */ + +/* + * PWM driver system settings. + */ +#define AVR_PWM_USE_TIM1 FALSE +#define AVR_PWM_USE_TIM2 FALSE +#define AVR_PWM_USE_TIM3 FALSE +#define AVR_PWM_USE_TIM4 FALSE +#define AVR_PWM_USE_TIM5 FALSE + +/* + * ICU driver system settings. + */ +#define AVR_ICU_USE_TIM1 FALSE +#define AVR_ICU_USE_TIM3 FALSE +#define AVR_ICU_USE_TIM4 FALSE +#define AVR_ICU_USE_TIM5 FALSE + +/* + * GPT driver system settings. + */ +#define AVR_GPT_USE_TIM1 FALSE +#define AVR_GPT_USE_TIM2 FALSE +#define AVR_GPT_USE_TIM3 FALSE +#define AVR_GPT_USE_TIM4 FALSE +#define AVR_GPT_USE_TIM5 FALSE + +/* + * UART driver system settings. + */ +#define AVR_UART_USE_USART1 TRUE +#define AVR_UART_USE_USART2 FALSE + +/* + * SERIAL driver system settings. + */ +#define AVR_SERIAL_USE_USART0 FALSE +#define AVR_SERIAL_USE_USART1 FALSE + +/* + * I2C driver system settings. + */ +#define AVR_I2C_USE_I2C1 FALSE + +/* + * SPI driver system settings. + */ +#define AVR_SPI_USE_SPI1 FALSE +#define AVR_SPI_USE_16BIT_POLLED_EXCHANGE FALSE + +/* + * USB driver system settings. + */ +#define AVR_USB_USE_USB1 FALSE +#define AVR_USB_USE_NAMED_ADDRESS_SPACES FALSE + +#endif /* MCUCONF_H */ diff --git a/os/common/ports/AVR/chcore.c b/os/common/ports/AVR/chcore.c index ca70ccc5f..77f6ace9f 100644 --- a/os/common/ports/AVR/chcore.c +++ b/os/common/ports/AVR/chcore.c @@ -150,7 +150,12 @@ void _port_thread_start(void) { asm volatile ("movw r24, r4"); asm volatile ("movw r30, r2"); asm volatile ("icall"); - asm volatile ("call chSysHalt"); +#if defined(_CHIBIOS_RT_) + asm volatile ("call chThdExit"); /* Used for avr5 Architecture. */ +#endif +#if defined(_CHIBIOS_NIL_) + asm volatile ("call chSysHalt"); /* Used for avr5 Architecture. */ +#endif } /** @} */ diff --git a/os/hal/boards/DIGISPARK_ATTINY_167/board.c b/os/hal/boards/DIGISPARK_ATTINY_167/board.c new file mode 100644 index 000000000..aab4dbd85 --- /dev/null +++ b/os/hal/boards/DIGISPARK_ATTINY_167/board.c @@ -0,0 +1,72 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" + +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +#if HAL_USE_PAL || defined(__DOXYGEN__) +const PALConfig pal_default_config = +{ +#if defined(PORTA) + {VAL_PORTA, VAL_DDRA}, +#endif +#if defined(PORTB) + {VAL_PORTB, VAL_DDRB}, +#endif +#if defined(PORTC) + {VAL_PORTC, VAL_DDRC}, +#endif +#if defined(PORTD) + {VAL_PORTD, VAL_DDRD}, +#endif +#if defined(PORTE) + {VAL_PORTE, VAL_DDRE}, +#endif +#if defined(PORTF) + {VAL_PORTF, VAL_DDRF}, +#endif +#if defined(PORTG) + {VAL_PORTG, VAL_DDRG}, +#endif +#if defined(PORTH) + {VAL_PORTH, VAL_DDRH}, +#endif +#if defined(PORTJ) + {VAL_PORTJ, VAL_DDRJ}, +#endif +#if defined(PORTK) + {VAL_PORTK, VAL_DDRK}, +#endif +#if defined(PORTL) + {VAL_PORTL, VAL_DDRL}, +#endif +}; +#endif /* HAL_USE_PAL */ + +/** + * Board-specific initialization code. + */ +void boardInit(void) { + + /* + * External interrupts setup, all disabled initially. + */ + cli(); +} diff --git a/os/hal/boards/DIGISPARK_ATTINY_167/board.h b/os/hal/boards/DIGISPARK_ATTINY_167/board.h new file mode 100644 index 000000000..f142eca53 --- /dev/null +++ b/os/hal/boards/DIGISPARK_ATTINY_167/board.h @@ -0,0 +1,49 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef BOARD_H +#define BOARD_H + +/* + * Setup for the Digispark ATtiny 167 board. + */ + +/* + * Board identifier. + */ +#define BOARD_NAME "Digispark Pro board ATtiny167" + +/* All inputs. */ +#define VAL_DDRA 0x00 +#define VAL_PORTA 0xFF + +/* All inputs except PB1 which has a LED connected. */ +#define VAL_DDRB 0x02 +#define VAL_PORTB 0xFF + +#define PORTB_LED1 1 + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* BOARD_H */ diff --git a/os/hal/boards/DIGISPARK_ATTINY_167/board.mk b/os/hal/boards/DIGISPARK_ATTINY_167/board.mk new file mode 100644 index 000000000..75cb1749b --- /dev/null +++ b/os/hal/boards/DIGISPARK_ATTINY_167/board.mk @@ -0,0 +1,5 @@ +# List of all the board related files. +BOARDSRC = ${CHIBIOS}/os/hal/boards/DIGISPARK_ATTINY_167/board.c + +# Required include directories +BOARDINC = ${CHIBIOS}/os/hal/boards/DIGISPARK_ATTINY_167 diff --git a/os/hal/ports/AVR/TINY/GPIOv1/driver.mk b/os/hal/ports/AVR/TINY/GPIOv1/driver.mk new file mode 100644 index 000000000..6675bfaf9 --- /dev/null +++ b/os/hal/ports/AVR/TINY/GPIOv1/driver.mk @@ -0,0 +1,9 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),) +PLATFORMSRC += ${CHIBIOS}/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c +endif +else +PLATFORMSRC += ${CHIBIOS}/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c +endif + +PLATFORMINC += ${CHIBIOS}/os/hal/ports/AVR/TINY/GPIOv1 diff --git a/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c b/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c new file mode 100644 index 000000000..142247ce6 --- /dev/null +++ b/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.c @@ -0,0 +1,156 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_pal_lld.c + * @brief AVR GPIO low level driver code. + * + * @addtogroup PAL + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief AVR GPIO ports configuration. + * @details GPIO registers initialization. + * + * @param[in] config the AVR ports configuration + * + * @notapi + */ +void _pal_lld_init(const PALConfig *config) { + +#if defined(PORTA) || defined(__DOXYGEN__) + PORTA = config->porta.out; + DDRA = config->porta.dir; +#endif + +#if defined(PORTB) || defined(__DOXYGEN__) + PORTB = config->portb.out; + DDRB = config->portb.dir; +#endif + +#if defined(PORTC) || defined(__DOXYGEN__) + PORTC = config->portc.out; + DDRC = config->portc.dir; +#endif + +#if defined(PORTD) || defined(__DOXYGEN__) + PORTD = config->portd.out; + DDRD = config->portd.dir; +#endif + +#if defined(PORTE) || defined(__DOXYGEN__) + PORTE = config->porte.out; + DDRE = config->porte.dir; +#endif + +#if defined(PORTF) || defined(__DOXYGEN__) + PORTF = config->portf.out; + DDRF = config->portf.dir; +#endif + +#if defined(PORTG) || defined(__DOXYGEN__) + PORTG = config->portg.out; + DDRG = config->portg.dir; +#endif + +#if defined(PORTH) || defined(__DOXYGEN__) + PORTH = config->porth.out; + DDRH = config->porth.dir; +#endif + +#if defined(PORTJ) || defined(__DOXYGEN__) + PORTJ = config->portj.out; + DDRJ = config->portj.dir; +#endif + +#if defined(PORTK) || defined(__DOXYGEN__) + PORTK = config->portk.out; + DDRK = config->portk.dir; +#endif + +#if defined(PORTL) || defined(__DOXYGEN__) + PORTL = config->portl.out; + DDRL = config->portl.dir; +#endif +} + +/** + * @brief Pads mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * + * @param[in] port the port identifier + * @param[in] mask the group mask + * @param[in] mode the mode + * + * @note This function is not meant to be invoked directly by the application + * code. + * @note @p PAL_MODE_UNCONNECTED is implemented as output as recommended by + * the AVR Family User's Guide. Unconnected pads are set to input + * with pull-up by default. + * + * @notapi + */ +void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode) { + + switch (mode) { + case PAL_MODE_RESET: + case PAL_MODE_INPUT: + case PAL_MODE_INPUT_ANALOG: + port->dir &= ~mask; + port->out &= ~mask; + break; + case PAL_MODE_UNCONNECTED: + case PAL_MODE_INPUT_PULLUP: + port->dir &= ~mask; + port->out |= mask; + break; + case PAL_MODE_OUTPUT_PUSHPULL: + port->dir |= mask; + break; + } +} + +#endif /* HAL_USE_PAL */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.h b/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.h new file mode 100644 index 000000000..68694f9b0 --- /dev/null +++ b/os/hal/ports/AVR/TINY/GPIOv1/hal_pal_lld.h @@ -0,0 +1,331 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_pal_lld.h + * @brief AVR GPIO low level driver header. + * + * @addtogroup PAL + * @{ + */ + +#ifndef HAL_PAL_LLD_H +#define HAL_PAL_LLD_H + +#include "avr_pins.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Unsupported modes and specific modes. */ +/*===========================================================================*/ + +#undef PAL_MODE_INPUT_PULLDOWN +#undef PAL_MODE_OUTPUT_OPENDRAIN + +/*===========================================================================*/ +/* I/O Ports Types and constants. */ +/*===========================================================================*/ + +/** + * @brief Width, in bits, of an I/O port. + */ +#define PAL_IOPORTS_WIDTH 8 + +/** + * @brief Whole port mask. + * @details This macro specifies all the valid bits into a port. + */ +#define PAL_WHOLE_PORT ((ioportmask_t)0xFF) + +/** + * @brief AVR setup registers. + */ +typedef struct { + uint8_t out; + uint8_t dir; +} avr_gpio_setup_t; + +/** + * @brief AVR registers block. + * @note On some devices registers do not follow this layout on some + * ports, the ports with abnormal layout cannot be used through + * PAL driver. Example: PORT F on Mega128. + */ +typedef struct { + volatile uint8_t in; + volatile uint8_t dir; + volatile uint8_t out; +} avr_gpio_registers_t; + +/** + * @brief Generic I/O ports static initializer. + * @details An instance of this structure must be passed to @p palInit() at + * system startup time in order to initialized the digital I/O + * subsystem. This represents only the initial setup, specific pads + * or whole ports can be reprogrammed at later time. + */ +typedef struct { +#if defined(PORTA) || defined(__DOXYGEN__) + avr_gpio_setup_t porta; +#endif +#if defined(PORTB) || defined(__DOXYGEN__) + avr_gpio_setup_t portb; +#endif +#if defined(PORTC) || defined(__DOXYGEN__) + avr_gpio_setup_t portc; +#endif +#if defined(PORTD) || defined(__DOXYGEN__) + avr_gpio_setup_t portd; +#endif +#if defined(PORTE) || defined(__DOXYGEN__) + avr_gpio_setup_t porte; +#endif +#if defined(PORTF) || defined(__DOXYGEN__) + avr_gpio_setup_t portf; +#endif +#if defined(PORTG) || defined(__DOXYGEN__) + avr_gpio_setup_t portg; +#endif +#if defined(PORTH) || defined(__DOXYGEN__) + avr_gpio_setup_t porth; +#endif +#if defined(PORTJ) || defined(__DOXYGEN__) + avr_gpio_setup_t portj; +#endif +#if defined(PORTK) || defined(__DOXYGEN__) + avr_gpio_setup_t portk; +#endif +#if defined(PORTL) || defined(__DOXYGEN__) + avr_gpio_setup_t portl; +#endif +} PALConfig; + +/** + * @brief Digital I/O port sized unsigned type. + */ +typedef uint8_t ioportmask_t; + +/** + * @brief Digital I/O modes. + */ +typedef uint8_t iomode_t; + +/** + * @brief Port Identifier. + * @details This type can be a scalar or some kind of pointer, do not make + * any assumption about it, use the provided macros when populating + * variables of this type. + */ +typedef volatile avr_gpio_registers_t * ioportid_t; + +/*===========================================================================*/ +/* I/O Ports Identifiers. */ +/*===========================================================================*/ + +#if defined(PORTA) || defined(__DOXYGEN__) +/** + * @brief GPIO port A identifier. + */ +#define IOPORT1 ((volatile avr_gpio_registers_t *)&PINA) +#endif + +#if defined(PORTB) || defined(__DOXYGEN__) +/** + * @brief GPIO port B identifier. + */ +#define IOPORT2 ((volatile avr_gpio_registers_t *)&PINB) +#endif + +#if defined(PORTC) || defined(__DOXYGEN__) +/** + * @brief GPIO port C identifier. + */ +#define IOPORT3 ((volatile avr_gpio_registers_t *)&PINC) +#endif + +#if defined(PORTD) || defined(__DOXYGEN__) +/** + * @brief GPIO port D identifier. + */ +#define IOPORT4 ((volatile avr_gpio_registers_t *)&PIND) +#endif + +#if defined(PORTE) || defined(__DOXYGEN__) +/** + * @brief GPIO port E identifier. + */ +#define IOPORT5 ((volatile avr_gpio_registers_t *)&PINE) +#endif + +#if defined(PORTF) || defined(__DOXYGEN__) +/** + * @brief GPIO port F identifier. + */ +#define IOPORT6 ((volatile avr_gpio_registers_t *)&PINF) +#endif + +#if defined(PORTG) || defined(__DOXYGEN__) +/** + * @brief GPIO port G identifier. + */ +#define IOPORT7 ((volatile avr_gpio_registers_t *)&PING) +#endif + +#if defined(PORTH) || defined(__DOXYGEN__) +/** + * @brief GPIO port H identifier. + */ +#define IOPORT8 ((volatile avr_gpio_registers_t *)&PINH) +#endif + +#if defined(PORTJ) || defined(__DOXYGEN__) +/** + * @brief GPIO port J identifier. + */ +#define IOPORT9 ((volatile avr_gpio_registers_t *)&PINJ) +#endif + +#if defined(PORTK) || defined(__DOXYGEN__) +/** + * @brief GPIO port K identifier. + */ +#define IOPORT10 ((volatile avr_gpio_registers_t *)&PINK) +#endif + +#if defined(PORTL) || defined(__DOXYGEN__) +/** + * @brief GPIO port L identifier. + */ +#define IOPORT11 ((volatile avr_gpio_registers_t *)&PINL) +#endif + +#if defined(PORTADC) || defined(__DOXYGEN__) +/** + * @brief GPIO port ADC identifier. + */ +#define IOPORTADC ((volatile avr_gpio_registers_t *)&PINADC) +#endif + +#if defined(PORT_SPI1) || defined(__DOXYGEN__) +/** + * @brief GPIO port SPI1 identifier. + */ +#define IOPORTSPI1 ((volatile avr_gpio_registers_t *)&PIN_SPI1) +#endif + +/*===========================================================================*/ +/* Implementation, some of the following macros could be implemented as */ +/* functions, if so please put them in hal_pal_lld.c. */ +/*===========================================================================*/ + +/** + * @brief Low level PAL subsystem initialization. + * + * @param[in] config the architecture-dependent ports configuration + * + * @notapi + */ +#define pal_lld_init(config) _pal_lld_init(config) + +/** + * @brief Reads the physical I/O port states. + * + * @param[in] port port identifier + * @return The port bits. + * + * @notapi + */ +#define pal_lld_readport(port) ((port)->in) + +/** + * @brief Reads the output latch. + * @details The purpose of this function is to read back the latched output + * value. + * + * @param[in] port port identifier + * @return The latched logical states. + * + * @notapi + */ +#define pal_lld_readlatch(port) ((port)->out) + +/** + * @brief Writes a bits mask on a I/O port. + * + * @param[in] port port identifier + * @param[in] bits bits to be written on the specified port + * + * @notapi + */ +#define pal_lld_writeport(port, bits) ((port)->out = bits) + +/** + * @brief Pads group mode setup. + * @details This function programs a pads group belonging to the same port + * with the specified mode. + * @note Programming an unknown or unsupported mode is silently ignored. + * + * @param[in] port port identifier + * @param[in] mask group mask + * @param[in] offset group bit offset within the port + * @param[in] mode group mode + * + * @notapi + */ +#define pal_lld_setgroupmode(port, mask, offset, mode) \ + _pal_lld_setgroupmode(port, mask << offset, mode) + +/** + * @brief Sets a pad logical state to @p PAL_HIGH. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_setpad(port, pad) \ + port->out |= _BV(pad) + +/** + * @brief Clears a pad logical state to @p PAL_LOW. + * + * @param[in] port port identifier + * @param[in] pad pad number within the port + * + * @notapi + */ +#define pal_lld_clearpad(port, pad) \ + port->out &= ~_BV(pad) + +extern ROMCONST PALConfig pal_default_config; + +#ifdef __cplusplus +extern "C" { +#endif + void _pal_lld_init(const PALConfig *config); + void _pal_lld_setgroupmode(ioportid_t port, + ioportmask_t mask, + iomode_t mode); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PAL */ + +#endif /* HAL_PAL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/driver.mk b/os/hal/ports/AVR/TINY/TIMv1/driver.mk new file mode 100644 index 000000000..982db5635 --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/driver.mk @@ -0,0 +1,19 @@ +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.c + +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_GPT TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c +endif +ifneq ($(findstring HAL_USE_ICU TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c +endif +ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),) +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c +endif +else +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c +PLATFORMSRC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c +endif + +PLATFORMINC += $(CHIBIOS)/os/hal/ports/AVR/TINY/TIMv1 diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c b/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c new file mode 100644 index 000000000..6ccc7cadd --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.c @@ -0,0 +1,373 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + This driver is based on the work done by Matteo Serva available at + http://github.com/matteoserva/ChibiOS-AVR +*/ + +/** + * @file hal_gpt_lld.c + * @brief AVR GPT driver subsystem low level driver. + * + * @addtogroup GPT + * @{ + */ + +#include "hal.h" + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +#define PRESCALER_SIZE_BASE 5 +#define PRESCALER_SIZE_EXTENDED 7 + +// FIXME: could use better names here! +typedef struct { + volatile uint8_t *tccra; + volatile uint8_t *tccrb; + volatile uint8_t *ocr1; + volatile uint8_t *ocr2; + volatile uint8_t *tcnt1; + volatile uint8_t *tcnt2; + volatile uint8_t *tifr; + volatile uint8_t *timsk; +} timer_registers_t; + +const timer_registers_t regs_table[] = { +#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) + { &TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &TCNT1H, &TCNT1L, &TIFR1, &TIMSK1 }, +#endif +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) + { &TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &TCNT2, &TCNT2, &TIFR2, &TIMSK2 }, +#endif +#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) + { &TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &TCNT3H, &TCNT3L, &TIFR3, &TIMSK3 }, +#endif +#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) + { &TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &TCNT4H, &TCNT4L, &TIFR4, &TIMSK4 }, +#endif +#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) + { &TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &TCNT5H, &TCNT5L, &TIFR5, &TIMSK5 }, +#endif +}; + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) +GPTDriver GPTD1; +#endif +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) +GPTDriver GPTD2; +#endif +#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) +GPTDriver GPTD3; +#endif +#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) +GPTDriver GPTD4; +#endif +#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) +GPTDriver GPTD5; +#endif + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +static uint16_t ratio_base[] = { 1024, 256, 64, 8, 1 }; +static uint8_t clock_source_base[]= { 5, 4, 3, 2, 1 }; +//static uint16_t ratio_extended[] = { 1024, 256, 128, 64, 32, 8, 1 }; +//static uint8_t clock_source_extended[] = { 7, 6, 5, 4, 3, 2, 1 }; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static uint8_t prescaler(uint16_t freq, uint16_t *ratio, uint8_t n) { + uint8_t i; + + for (i = 0; i < n; ++i) { + uint32_t result = F_CPU / ratio[i] / freq; + if (result > 256UL) + return i - 1; + if ((result * ratio[i] * freq) == F_CPU) + return i; + } + return -1; // TO check +} + +static void gpt_lld_serve_interrupt(GPTDriver *gptp) { + gptp->counter++; + if (gptp->counter == gptp->period) { + gptp->counter = 0; + if (gptp->state == GPT_ONESHOT) { + gptp->state = GPT_READY; /* Back in GPT_READY state. */ + gpt_lld_stop_timer(gptp); /* Timer automatically stopped. */ + } + gptp->callback(gptp); + } +} + +static void gpt_lld_dummy_callback(GPTDriver *gptp) { +} + +static uint8_t getTimerIndex(GPTDriver *gptp) { + uint8_t index = 0; +#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) + if (gptp == &GPTD1) return index; + else index++; +#endif +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) + if (gptp == &GPTD2) return index; + else index++; +#endif +#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) + if (gptp == &GPTD3) return index; + else index++; +#endif +#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) + if (gptp == &GPTD4) return index; + else index++; +#endif +#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) + if (gptp == &GPTD5) return index; + else index++; +#endif + return -1; // To check +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) +/** + * @brief TIM1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIMER1_COMPA_vect) { + + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD1); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) +/** + * @brief TIM2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIMER2_COMPA_vect) { + + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD2); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) +/** + * @brief TIM3 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIMER3_COMPA_vect) { + + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD3); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) +/** + * @brief TIM4 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIMER4_COMPA_vect) { + + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD4); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) +/** + * @brief TIM2 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(TIMER5_COMPA_vect) { + + OSAL_IRQ_PROLOGUE(); + gpt_lld_serve_interrupt(&GPTD5); + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level GPT driver initialization. + * + * @notapi + */ +void gpt_lld_init(void) { + +#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) + gptObjectInit(&GPTD1); +#endif +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) + gptObjectInit(&GPTD2); +#endif +#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) + gptObjectInit(&GPTD3); +#endif +#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) + gptObjectInit(&GPTD4); +#endif +#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) + gptObjectInit(&GPTD5); +#endif +} + +/** + * @brief Configures and activates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_start(GPTDriver *gptp) { + uint8_t psc; + + if (gptp->state == GPT_STOP) { + /* Clock activation.*/ + } + + /* Configuration.*/ + +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) + if (gptp == &GPTD2) { + psc = prescaler(gptp->config->frequency, ratio_extended, PRESCALER_SIZE_EXTENDED); + gptp->clock_source = clock_source_extended[psc] & 0x07; + TCCR2A = (1 << WGM21) | (0 << WGM20); + TCCR2B = (0 << WGM22); + OCR2A = F_CPU / ratio_extended[psc] /gptp->config->frequency - 1; + return; + } +#endif + + uint8_t i = getTimerIndex(gptp); + psc = prescaler(gptp->config->frequency, ratio_base, PRESCALER_SIZE_BASE); + gptp->clock_source = clock_source_base[psc] & 0x07; + *regs_table[i].tccra = (0 << WGM11) | + (0 << WGM10) | + (0 << COM1A1) | + (0 << COM1A0) | + (0 << COM1B1) | + (0 << COM1B0); + *regs_table[i].tccrb = (1 << WGM12); + *regs_table[i].ocr1 = 0; + *regs_table[i].ocr2 = F_CPU / ratio_base[psc] / gptp->config->frequency - 1; +} + +/** + * @brief Deactivates the GPT peripheral. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop(GPTDriver *gptp) { + + /* nothing to be done */ + if (gptp->state == GPT_READY) { + /* Clock de-activation.*/ + } + gpt_lld_stop_timer(gptp); +} + +/** + * @brief Starts the timer in continuous mode. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] period period in ticks + * + * @notapi + */ +void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t period) { + + gptp->callback = gptp->config->callback; + gptp->period = period; + gptp->counter = 0; + + uint8_t i = getTimerIndex(gptp); + *regs_table[i].tcnt1 = 0; + *regs_table[i].tcnt2 = 0; + *regs_table[i].tifr = (1 << OCF1A); + *regs_table[i].timsk = (1 << OCIE1A); + *regs_table[i].tccrb |= (gptp->clock_source << CS10); +} + +/** + * @brief Stops the timer. + * + * @param[in] gptp pointer to the @p GPTDriver object + * + * @notapi + */ +void gpt_lld_stop_timer(GPTDriver *gptp) { + uint8_t i = getTimerIndex(gptp); + + *regs_table[i].tccrb &= ~((7 << CS10) | (1 << OCIE1A)); + *regs_table[i].tifr = (1 << OCF1A); +} + +/** + * @brief Starts the timer in one shot mode and waits for completion. + * @details This function specifically polls the timer waiting for completion + * in order to not have extra delays caused by interrupt servicing, + * this function is only recommended for short delays. + * + * @param[in] gptp pointer to the @p GPTDriver object + * @param[in] interval time interval in ticks + * + * @notapi + */ +void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) { + + gptp->callback = gpt_lld_dummy_callback; + gpt_lld_start_timer(gptp, interval); + //FIX + while (gptp->state != GPT_READY) {} +} + +#endif /* HAL_USE_GPT */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.h b/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.h new file mode 100644 index 000000000..0cd26e662 --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_gpt_lld.h @@ -0,0 +1,221 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + This driver is based on the work done by Matteo Serva available at + http://github.com/matteoserva/ChibiOS-AVR +*/ + +/** + * @file hal_gpt_lld.h + * @brief AVR GPT driver subsystem low level driver header. + * + * @addtogroup GPT + * @{ + */ + +#ifndef HAL_GPT_LLD_H +#define HAL_GPT_LLD_H + +#if HAL_USE_GPT || defined(__DOXYGEN__) + +#include "avr_timers.h" + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief GPT1 driver enable switch. + * @details If set to @p TRUE the support for GPT1 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_GPT_USE_TIM1) +#define AVR_GPT_USE_TIM1 FALSE +#endif + +/** + * @brief GPT2 driver enable switch. + * @details If set to @p TRUE the support for GPT2 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_GPT_USE_TIM2) +#define AVR_GPT_USE_TIM2 FALSE +#endif + +/** + * @brief GPT3 driver enable switch. + * @details If set to @p TRUE the support for GPT3 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_GPT_USE_TIM3) +#define AVR_GPT_USE_TIM3 FALSE +#endif + +/** + * @brief GPT4 driver enable switch. + * @details If set to @p TRUE the support for GPT4 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_GPT_USE_TIM4) +#define AVR_GPT_USE_TIM4 FALSE +#endif + +/** + * @brief GPT5 driver enable switch. + * @details If set to @p TRUE the support for GPT5 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_GPT_USE_TIM5) +#define AVR_GPT_USE_TIM5 FALSE +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief GPT frequency type. + */ +typedef uint32_t gptfreq_t; + +/** + * @brief GPT counter type. + */ +typedef uint16_t gptcnt_t; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + gptfreq_t frequency; + /** + * @brief Timer callback pointer. + * @note This callback is invoked on GPT counter events. + */ + gptcallback_t callback; + /* End of the mandatory fields.*/ +} GPTConfig; + +/** + * @brief Structure representing a GPT driver. + */ +struct GPTDriver { + /** + * @brief Driver state. + */ + volatile gptstate_t state; + /** + * @brief Current configuration data. + */ + const GPTConfig *config; + +#if defined(GPT_DRIVER_EXT_FIELDS) + GPT_DRIVER_EXT_FIELDS +#endif + + /* End of the mandatory fields.*/ + /** + * @brief input clock from prescaler + */ + uint8_t clock_source; + /** + * @brief Lenght of the period in clock ticks + */ + gptcnt_t period; + /** + * @brief Current clock tick. + */ + gptcnt_t counter; + /** + * @brief Function called from the interrupt service routine + */ + gptcallback_t callback; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Changes the interval of GPT peripheral. + * @details This function changes the interval of a running GPT unit. + * @pre The GPT unit must have been activated using @p gptStart(). + * @pre The GPT unit must have been running in continuous mode using + * @p gptStartContinuous(). + * @post The GPT unit interval is changed to the new value. + * @note The function has effect at the next cycle start. + * + * @param[in] gptp pointer to a @p GPTDriver object + * @param[in] interval new cycle time in timer ticks + * @notapi + */ + +// FIXME: placeholder to enable compile, should be implemented! +#define gpt_lld_change_interval(gptp, interval) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__) +extern GPTDriver GPTD1; +#endif +#if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__) +extern GPTDriver GPTD2; +#endif +#if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__) +extern GPTDriver GPTD3; +#endif +#if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__) +extern GPTDriver GPTD4; +#endif +#if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__) +extern GPTDriver GPTD5; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void gpt_lld_init(void); + void gpt_lld_start(GPTDriver *gptp); + void gpt_lld_stop(GPTDriver *gptp); + void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval); + void gpt_lld_stop_timer(GPTDriver *gptp); + void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_GPT */ + +#endif /* HAL_GPT_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c b/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c new file mode 100644 index 000000000..74ceffe64 --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.c @@ -0,0 +1,335 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_icu_lld.c + * @brief AVR ICU driver subsystem low level driver source. + * + * @addtogroup ICU + * @{ + */ + +#include "hal.h" + +#if HAL_USE_ICU || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +typedef struct { + volatile uint8_t *tccra; + volatile uint8_t *tccrb; + volatile uint16_t *tcnt; + volatile uint8_t *timsk; +} icu_registers_t; + +static icu_registers_t regs_table[]= +{ +#if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__) + {&TCCR1A, &TCCR1B, &TCNT1, &TIMSK1}, +#endif +#if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__) + {&TCCR3A, &TCCR3B, &TCNT3, &TIMSK3}, +#endif +#if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__) + {&TCCR4A, &TCCR4B, &TCNT4, &TIMSK4}, +#endif +#if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__) + {&TCCR5A, &TCCR5B, &TCNT5, &TIMSK5}, +#endif +}; + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief ICU1 driver identifier. + */ +#if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__) +ICUDriver ICUD1; +#endif +/** + * @brief ICU3 driver identifier. + */ +#if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__) +ICUDriver ICUD3; +#endif +/** + * @brief ICU4 driver identifier. + */ +#if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__) +ICUDriver ICUD4; +#endif +/** + * @brief ICU5 driver identifier. + */ +#if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__) +ICUDriver ICUD5; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static inline void handle_capture_isr(ICUDriver *icup, + volatile uint16_t *icr, + volatile uint8_t *tccrb, + volatile uint16_t *tcnt) +{ + uint16_t value = *icr; + uint8_t rising = (*tccrb & (1 << ICES1)) ? 1 : 0; + *tccrb ^= (1 << ICES1); + if ((icup->config->mode == ICU_INPUT_ACTIVE_HIGH && rising) || + (icup->config->mode == ICU_INPUT_ACTIVE_LOW && !rising)) { + icup->width = value; + if (icup->config->width_cb != NULL) + icup->config->width_cb(icup); + } else { + icup->period = value; + if (icup->config->period_cb != NULL) + icup->config->period_cb(icup); + /* Reset counter at the end of every cycle */ + *tcnt = 0; + } +} + +static uint8_t index(ICUDriver *icup) +{ + uint8_t index = 0; +#if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__) + if (icup == &ICUD1) return index; + else index++; +#endif +#if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__) + if (icup == &ICUD3) return index; + else index++; +#endif +#if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__) + if (icup == &ICUD4) return index; + else index++; +#endif +#if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__) + if (icup == &ICUD5) return index; + else index++; +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER1_CAPT_vect) +{ + OSAL_IRQ_PROLOGUE(); + handle_capture_isr(&ICUD1, &ICR1, &TCCR1B, &TCNT1); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER1_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + ICUD1.config->overflow_cb(&ICUD1); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER3_CAPT_vect) +{ + OSAL_IRQ_PROLOGUE(); + handle_capture_isr(&ICUD3, &ICR3, &TCCR3B, &TCNT3); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER3_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + ICUD3.config->overflow_cb(&ICUD3); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER4_CAPT_vect) +{ + OSAL_IRQ_PROLOGUE(); + handle_capture_isr(&ICUD4, &ICR4, &TCCR4B, &TCNT4); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER4_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + ICUD4.config->overflow_cb(&ICUD4); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER5_CAPT_vect) +{ + OSAL_IRQ_PROLOGUE(); + handle_capture_isr(&ICUD5, &ICR5, &TCCR5B, &TCNT5); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER5_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + ICUD5.config->overflow_cb(&ICUD5); + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level ICU driver initialization. + * + * @notapi + */ +void icu_lld_init(void) { + +#if AVR_ICU_USE_TIM1 + icuObjectInit(&ICUD1); +#endif +#if AVR_ICU_USE_TIM3 + icuObjectInit(&ICUD3); +#endif +#if AVR_ICU_USE_TIM4 + icuObjectInit(&ICUD4); +#endif +#if AVR_ICU_USE_TIM5 + icuObjectInit(&ICUD5); +#endif +} + +/** + * @brief Configures and activates the ICU peripheral. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_start(ICUDriver *icup) { + + if (icup->state == ICU_STOP) { + uint8_t i = index(icup); + /* Normal waveform generation (counts from 0 to 0xFFFF) */ + *regs_table[i].tccra &= ~((1 << WGM11) | (1 << WGM10)); + *regs_table[i].tccrb &= ~((1 << WGM13) | (1 << WGM12)); + /* Enable noise canceler, set prescale to CLK/1024 */ + *regs_table[i].tccrb |= (1 << ICNC1) | (1 << CS12) | (1 << CS10); + if (icup->config->mode == ICU_INPUT_ACTIVE_HIGH) + *regs_table[i].tccrb |= (1 << ICES1); + else + *regs_table[i].tccrb &= ~(1 << ICES1); + } +} + +/** + * @brief Deactivates the ICU peripheral. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_stop(ICUDriver *icup) { + + if (icup->state == ICU_READY) { + /* Resets the peripheral.*/ + + /* Disables the peripheral.*/ +#if AVR_ICU_USE_TIM1 + if (&ICUD1 == icup) { + + } +#endif /* AVR_ICU_USE_TIM1 */ + } +} + +/** + * @brief Enables the input capture. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_enable(ICUDriver *icup) { + + uint8_t i = index(icup); + icup->width = icup->period = 0; + *regs_table[i].tcnt = 0; + *regs_table[i].timsk |= (1 << ICIE1); + if (icup->config->overflow_cb != NULL) + *regs_table[i].timsk |= (1 << TOIE1); +} + +/** + * @brief Disables the input capture. + * + * @param[in] icup pointer to the @p ICUDriver object + * + * @notapi + */ +void icu_lld_disable(ICUDriver *icup) { + + uint8_t i = index(icup); + *regs_table[i].timsk &= ~((1 << ICIE1) | (1 << TOIE1)); +} + +/** + * @brief Returns the width of the latest pulse. + * @details The pulse width is defined as number of ticks between the start + * edge and the stop edge. + * + * @param[in] icup pointer to the @p ICUDriver object + * @return The number of ticks. + * + * @notapi + */ +icucnt_t icu_lld_get_width(ICUDriver *icup) { + + return icup->width; +} + +/** + * @brief Returns the width of the latest cycle. + * @details The cycle width is defined as number of ticks between a start + * edge and the next start edge. + * + * @param[in] icup pointer to the @p ICUDriver object + * @return The number of ticks. + * + * @notapi + */ +icucnt_t icu_lld_get_period(ICUDriver *icup) { + + return icup->period; +} + +#endif /* HAL_USE_ICU */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.h b/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.h new file mode 100644 index 000000000..d9a67ae5a --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_icu_lld.h @@ -0,0 +1,195 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_icu_lld.h + * @brief AVR ICU driver subsystem low level driver header. + * + * @addtogroup ICU + * @{ + */ + +#ifndef HAL_ICU_LLD_H +#define HAL_ICU_LLD_H + +#if HAL_USE_ICU || defined(__DOXYGEN__) + +#include "avr_timers.h" + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief ICU driver enable switch. + * @details If set to @p TRUE the support for ICU1 is included. + */ +#if !defined(AVR_ICU_USE_TIM1) || defined(__DOXYGEN__) +#define AVR_ICU_USE_TIM1 FALSE +#endif +/** + * @brief ICU driver enable switch. + * @details If set to @p TRUE the support for ICU3 is included. + */ +#if !defined(AVR_ICU_USE_TIM3) || defined(__DOXYGEN__) +#define AVR_ICU_USE_TIM3 FALSE +#endif +/** + * @brief ICU driver enable switch. + * @details If set to @p TRUE the support for ICU4 is included. + */ +#if !defined(AVR_ICU_USE_TIM4) || defined(__DOXYGEN__) +#define AVR_ICU_USE_TIM4 FALSE +#endif +/** + * @brief ICU driver enable switch. + * @details If set to @p TRUE the support for ICU5 is included. + */ +#if !defined(AVR_ICU_USE_TIM5) || defined(__DOXYGEN__) +#define AVR_ICU_USE_TIM5 FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief ICU driver mode. + */ +typedef enum { + ICU_INPUT_ACTIVE_HIGH = 0, /**< Trigger on rising edge. */ + ICU_INPUT_ACTIVE_LOW = 1, /**< Trigger on falling edge. */ +} icumode_t; + +/** + * @brief ICU frequency type. + */ +typedef uint16_t icufreq_t; + +/** + * @brief ICU counter type. + */ +typedef uint16_t icucnt_t; + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief Driver mode. + */ + icumode_t mode; + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + icufreq_t frequency; + /** + * @brief Callback for pulse width measurement. + */ + icucallback_t width_cb; + /** + * @brief Callback for cycle period measurement. + */ + icucallback_t period_cb; + /** + * @brief Callback for timer overflow. + */ + icucallback_t overflow_cb; + /* End of the mandatory fields.*/ +} ICUConfig; + +/** + * @brief Structure representing an ICU driver. + */ +struct ICUDriver { + /** + * @brief Driver state. + */ + icustate_t state; + /** + * @brief Current configuration data. + */ + const ICUConfig *config; +#if defined(ICU_DRIVER_EXT_FIELDS) + ICU_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Width value read by ISR. + */ + icucnt_t width; + /** + * @brief Period value read by ISR. + */ + icucnt_t period; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if AVR_ICU_USE_TIM1 && !defined(__DOXYGEN__) +extern ICUDriver ICUD1; +#endif +#if AVR_ICU_USE_TIM3 && !defined(__DOXYGEN__) +extern ICUDriver ICUD3; +#endif +#if AVR_ICU_USE_TIM4 && !defined(__DOXYGEN__) +extern ICUDriver ICUD4; +#endif +#if AVR_ICU_USE_TIM5 && !defined(__DOXYGEN__) +extern ICUDriver ICUD5; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void icu_lld_init(void); + void icu_lld_start(ICUDriver *icup); + void icu_lld_stop(ICUDriver *icup); + void icu_lld_enable(ICUDriver *icup); + void icu_lld_disable(ICUDriver *icup); + icucnt_t icu_lld_get_width(ICUDriver *icup); + icucnt_t icu_lld_get_period(ICUDriver *icup); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_ICU */ + +#endif /* HAL_ICU_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c b/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c new file mode 100644 index 000000000..edd112e6d --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.c @@ -0,0 +1,565 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + This driver is based on the work done by Matteo Serva available at + http://github.com/matteoserva/ChibiOS-AVR +*/ + +/** + * @file hal_pwm_lld.c + * @brief AVR PWM driver subsystem low level driver. + * + * @addtogroup PWM + * @{ + */ + +#include "hal.h" + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +typedef struct { + volatile uint8_t *tccra; + volatile uint8_t *tccrb; + volatile uint8_t *ocrah; + volatile uint8_t *ocral; + volatile uint8_t *ocrbh; + volatile uint8_t *ocrbl; + volatile uint8_t *ocrch; + volatile uint8_t *ocrcl; + volatile uint8_t *tifr; + volatile uint8_t *timsk; +} timer_registers_t; + +static timer_registers_t regs_table[]= +{ +#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) +#if defined(OCR1C) + {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, &OCR1CH, &OCR1CL, &TIFR1, &TIMSK1}, +#else + {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, NULL, NULL, &TIFR1, &TIMSK1}, +#endif +#endif +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) + {&TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &OCR2B, &OCR2B, NULL, NULL, &TIFR2, &TIMSK2}, +#endif +#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) + {&TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &OCR3BH, &OCR3BL, &OCR3CH, &OCR3CL, &TIFR3, &TIMSK3}, +#endif +#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) + {&TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &OCR4CH, &OCR4CL, &OCR4CH, &OCR4CL, &TIFR4, &TIMSK4}, +#endif +#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) + {&TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &OCR5BH, &OCR5BL, &OCR5CH, &OCR5CL, &TIFR5, &TIMSK5}, +#endif +}; + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief PWM driver identifiers.*/ +#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) +PWMDriver PWMD1; +#endif +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) +PWMDriver PWMD2; +#endif +#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) +PWMDriver PWMD3; +#endif +#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) +PWMDriver PWMD4; +#endif +#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) +PWMDriver PWMD5; +#endif + +/*===========================================================================*/ +/* Driver local variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void config_channel(volatile uint8_t *tccra, + uint8_t com1, + uint8_t com0, + pwmmode_t mode) +{ + *tccra &= ~((1 << com1) | (1 << com0)); + if (mode == PWM_OUTPUT_ACTIVE_HIGH) + *tccra |= ((1 << com1) | (0 << com0)); /* non inverting mode */ + else if (mode == PWM_OUTPUT_ACTIVE_LOW) + *tccra |= (1 << com1) | (1 << com0); /* inverting mode */ +} + +static uint8_t timer_index(PWMDriver *pwmp) +{ + uint8_t index = 0; + +#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) + if (pwmp == &PWMD1) return index; + else index++; +#endif +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) + if (pwmp == &PWMD2) return index; + else index++; +#endif +#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) + if (pwmp == &PWMD3) return index; + else index++; +#endif +#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) + if (pwmp == &PWMD4) return index; + else index++; +#endif +#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) + if (pwmp == &PWMD5) return index; + else index++; +#endif + + /* This is an error! */ + return index; +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/* + * interrupt for compare1&2 and clock overflow. pwmd1 & pwmd2 + */ +#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER1_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD1.config->callback(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER1_COMPA_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD1.config->channels[0].callback(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER1_COMPB_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD1.config->channels[1].callback(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} +#if PWM_CHANNELS > 2 +OSAL_IRQ_HANDLER(TIMER1_COMPC_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD1.config->channels[2].callback(&PWMD1); + OSAL_IRQ_EPILOGUE(); +} +#endif +#endif + +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER2_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD2.config->callback(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER2_COMPA_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD2.config->channels[0].callback(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER2_COMPB_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD2.config->channels[1].callback(&PWMD2); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER3_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD3.config->callback(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER3_COMPA_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD3.config->channels[0].callback(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER3_COMPB_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD3.config->channels[1].callback(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER3_COMPC_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD3.config->channels[2].callback(&PWMD3); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER4_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD4.config->callback(&PWMD4); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER4_COMPA_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD4.config->channels[0].callback(&PWMD4); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER4_COMPB_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD4.config->channels[1].callback(&PWMD4); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER4_COMPC_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD4.config->channels[2].callback(&PWMD4); + OSAL_IRQ_EPILOGUE(); +} +#endif + +#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) +OSAL_IRQ_HANDLER(TIMER5_OVF_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD5.config->callback(&PWMD5); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER5_COMPA_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD5.config->channels[0].callback(&PWMD5); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER5_COMPB_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD5.config->channels[1].callback(&PWMD5); + OSAL_IRQ_EPILOGUE(); +} + +OSAL_IRQ_HANDLER(TIMER5_COMPC_vect) +{ + OSAL_IRQ_PROLOGUE(); + PWMD5.config->channels[2].callback(&PWMD5); + OSAL_IRQ_EPILOGUE(); +} +#endif + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level PWM driver initialization. + * + * @notapi + */ +void pwm_lld_init(void) +{ +#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) + pwmObjectInit(&PWMD1); + PWMD1.channels = PWM_CHANNELS; + TCCR1A = (1 << WGM11) | (1 << WGM10); + TCCR1B = (0 << WGM13) | (1 << WGM12); +#endif + +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) + pwmObjectInit(&PWMD2); + PWMD2.channels = PWM_CHANNELS; + TCCR2A = (1 << WGM21) | (1 << WGM20); + TCCR2B = (0 << WGM22); +#endif + +#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) + pwmObjectInit(&PWMD3); + PWMD3.channels = PWM_CHANNELS; + TCCR3A = (1 << WGM31) | (1 << WGM30); + TCCR3B = (0 << WGM33) | (1 << WGM32); +#endif + +#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) + pwmObjectInit(&PWMD4); + PWMD4.channels = PWM_CHANNELS; + TCCR4A = (1 << WGM41) | (1 << WGM40); + TCCR4B = (0 << WGM43) | (1 << WGM42); +#endif + +#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) + pwmObjectInit(&PWMD5); + PWMD5.channels = PWM_CHANNELS; + TCCR5A = (1 << WGM51) | (1 << WGM50); + TCCR5B = (0 << WGM53) | (1 << WGM52); +#endif +} + +/** + * @brief Configures and activates the PWM peripheral. + * + * @param[in] pwmp pointer to the @p PWMDriver object + * + * @notapi + */ +void pwm_lld_start(PWMDriver *pwmp) +{ + if (pwmp->state == PWM_STOP) { + +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) + if (pwmp == &PWMD2) { + TCCR2B &= ~((1 << CS22) | (1 << CS21)); + TCCR2B |= (1 << CS20); + if (pwmp->config->callback != NULL) + TIMSK2 |= (1 << TOIE2); + return; + } +#endif + + uint8_t i = timer_index(pwmp); + + /* TODO: support other prescaler options */ + + *regs_table[i].tccrb &= ~(1 << CS11); + *regs_table[i].tccrb |= (1 << CS12) | (1 << CS10); + if (pwmp->config->callback != NULL) + *regs_table[i].timsk = (1 << TOIE1); + } +} + +/** + * @brief Deactivates the PWM peripheral. + * + * @param[in] pwmp pointer to the @p PWMDriver object + * + * @notapi + */ +void pwm_lld_stop(PWMDriver *pwmp) +{ + uint8_t i = timer_index(pwmp); + *regs_table[i].tccrb &= ~((1 << CS12) | (1 << CS11) | (1 << CS10)); + *regs_table[i].timsk = 0; +} + +/** + * @brief Changes the period the PWM peripheral. + * @details This function changes the period of a PWM unit that has already + * been activated using @p pwmStart(). + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The PWM unit period is changed to the new value. + * @note The function has effect at the next cycle start. + * @note If a period is specified that is shorter than the pulse width + * programmed in one of the channels then the behavior is not + * guaranteed. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] period new cycle time in ticks + * + * @notapi + */ +void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period) +{ +} + +/** + * @brief Enables a PWM channel. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is active using the specified configuration. + * @note Depending on the hardware implementation this function has + * effect starting on the next cycle (recommended implementation) + * or immediately (fallback implementation). + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1) + * @param[in] width PWM pulse width as clock pulses number + * + * @notapi + */ +void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width) +{ + uint16_t val = width; + if (val > MAX_PWM_VALUE) + val = MAX_PWM_VALUE; + +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) + if (pwmp == &PWMD2) { + config_channel(&TCCR2A, + 7 - 2*channel, + 6 - 2*channel, + pwmp->config->channels[channel].mode); + TIMSK2 |= (1 << (channel + 1)); + /* Timer 2 is 8 bit */ + if (val > 0xFF) + val = 0xFF; + if (pwmp->config->channels[channel].callback) { + switch (channel) { + case 0: OCR2A = val; break; + case 1: OCR2B = val; break; + } + } + return; + } +#endif + + uint8_t i = timer_index(pwmp); + config_channel(regs_table[i].tccra, + 7 - 2*channel, + 6 - 2*channel, + pwmp->config->channels[channel].mode); + volatile uint8_t *ocrh, *ocrl; + switch (channel) { + case 1: + ocrh = regs_table[i].ocrbh; + ocrl = regs_table[i].ocrbl; + break; + case 2: + ocrh = regs_table[i].ocrch; + ocrl = regs_table[i].ocrcl; + break; + default: + ocrh = regs_table[i].ocrah; + ocrl = regs_table[i].ocral; + } + *ocrh = val >> 8; + *ocrl = val & 0xFF; + *regs_table[i].tifr |= (1 << (channel + 1)); + if (pwmp->config->channels[channel].callback != NULL) + *regs_table[i].timsk |= (1 << (channel + 1)); +} + +/** + * @brief Disables a PWM channel. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @post The channel is disabled and its output line returned to the + * idle state. + * @note Depending on the hardware implementation this function has + * effect starting on the next cycle (recommended implementation) + * or immediately (fallback implementation). + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...PWM_CHANNELS-1) + * + * @notapi + */ +void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) +{ + uint8_t i = timer_index(pwmp); + config_channel(regs_table[i].tccra, + 7 - 2*channel, + 6 - 2*channel, + PWM_OUTPUT_DISABLED); + *regs_table[i].timsk &= ~(1 << (channel + 1)); +} + +/** + * @brief Enables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) { + uint8_t i = timer_index(pwmp); + *regs_table[i].timsk |= (1 << TOIE1); +} + +/** + * @brief Disables the periodic activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * + * @notapi + */ +void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) { + uint8_t i = timer_index(pwmp); + *regs_table[i].timsk &= ~(1 << TOIE1); +} + +/** + * @brief Enables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already enabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + uint8_t i = timer_index(pwmp); + *regs_table[i].timsk |= (1 << (channel + 1)); +} + +/** + * @brief Disables a channel de-activation edge notification. + * @pre The PWM unit must have been activated using @p pwmStart(). + * @pre The channel must have been activated using @p pwmEnableChannel(). + * @note If the notification is already disabled then the call has no effect. + * + * @param[in] pwmp pointer to a @p PWMDriver object + * @param[in] channel PWM channel identifier (0...channels-1) + * + * @notapi + */ +void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel) { + + uint8_t i = timer_index(pwmp); + *regs_table[i].timsk &= ~(1 << (channel + 1)); +} + +#endif /* HAL_USE_PWM */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.h b/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.h new file mode 100644 index 000000000..39dffbce8 --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_pwm_lld.h @@ -0,0 +1,233 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + This driver is based on the work done by Matteo Serva available at + http://github.com/matteoserva/ChibiOS-AVR +*/ + +/** + * @file hal_pwm_lld.h + * @brief AVR PWM driver subsystem low level driver header. + * + * @addtogroup PWM + * @{ + */ + +#ifndef HAL_PWM_LLD_H +#define HAL_PWM_LLD_H + +#if HAL_USE_PWM || defined(__DOXYGEN__) + +#include "avr_timers.h" + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +#if !defined(AVR_PWM_USE_TIM1) +#define AVR_PWM_USE_TIM1 FALSE +#endif +#if !defined(AVR_PWM_USE_TIM2) +#define AVR_PWM_USE_TIM2 FALSE +#endif +#if !defined(AVR_PWM_USE_TIM3) +#define AVR_PWM_USE_TIM3 FALSE +#endif +#if !defined(AVR_PWM_USE_TIM4) +#define AVR_PWM_USE_TIM4 FALSE +#endif +#if !defined(AVR_PWM_USE_TIM5) +#define AVR_PWM_USE_TIM5 FALSE +#endif + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief Number of PWM channels per PWM driver. + */ +#if !defined(PWM_CHANNELS) || defined(__DOXYGEN__) + #if defined(TIMER1_COMPC_vect) + #define PWM_CHANNELS 3 + #else + #define PWM_CHANNELS 2 + #endif +#endif + +#define MAX_PWM_VALUE 0x3FF + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief PWM mode type. + */ +typedef uint8_t pwmmode_t; + +/** + * @brief PWM channel type. + */ +typedef uint8_t pwmchannel_t; + +/** + * @brief Type of a channels mask. + */ +typedef uint8_t pwmchnmsk_t; + +/** + * @brief PWM counter type. + */ +typedef uint16_t pwmcnt_t; + +/** + * @brief PWM driver channel configuration structure. + * @note Some architectures may not be able to support the channel mode + * or the callback, in this case the fields are ignored. + */ +typedef struct { + /** + * @brief Channel active logic level. + */ + pwmmode_t mode; + /** + * @brief Channel callback pointer. + * @note This callback is invoked on the channel compare event. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /* End of the mandatory fields.*/ +} PWMChannelConfig; + +/** + * @brief Driver configuration structure. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ +typedef struct { + /** + * @brief Timer clock in Hz. + * @note The low level can use assertions in order to catch invalid + * frequency specifications. + */ + uint16_t frequency; + /** + * @brief PWM period in ticks. + * @note The low level can use assertions in order to catch invalid + * period specifications. + */ + pwmcnt_t period; + /** + * @brief Periodic callback pointer. + * @note This callback is invoked on PWM counter reset. If set to + * @p NULL then the callback is disabled. + */ + pwmcallback_t callback; + /** + * @brief Channels configurations. + */ + PWMChannelConfig channels[PWM_CHANNELS]; + /* End of the mandatory fields.*/ +} PWMConfig; + +/** + * @brief Structure representing an PWM driver. + * @note Implementations may extend this structure to contain more, + * architecture dependent, fields. + */ +struct PWMDriver { + /** + * @brief Driver state. + */ + pwmstate_t state; + /** + * @brief Current configuration data. + */ + const PWMConfig *config; + /** + * @brief Current PWM period in ticks. + */ + pwmcnt_t period; + /** + * @brief Mask of the enabled channels. + */ + pwmchnmsk_t enabled; + /** + * @brief Number of channels in this instance. + */ + pwmchannel_t channels; +#if defined(PWM_DRIVER_EXT_FIELDS) + PWM_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__) +extern PWMDriver PWMD1; +#endif +#if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__) +extern PWMDriver PWMD2; +#endif +#if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__) +extern PWMDriver PWMD3; +#endif +#if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__) +extern PWMDriver PWMD4; +#endif +#if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__) +extern PWMDriver PWMD5; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void pwm_lld_init(void); + void pwm_lld_start(PWMDriver *pwmp); + void pwm_lld_stop(PWMDriver *pwmp); + void pwm_lld_change_period(PWMDriver *pwmp, pwmcnt_t period); + void pwm_lld_enable_channel(PWMDriver *pwmp, + pwmchannel_t channel, + pwmcnt_t width); + void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel); + void pwm_lld_enable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_disable_periodic_notification(PWMDriver *pwmp); + void pwm_lld_enable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); + void pwm_lld_disable_channel_notification(PWMDriver *pwmp, + pwmchannel_t channel); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_PWM */ + +#endif /* HAL_PWM_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.c b/os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.c new file mode 100644 index 000000000..4732ec7dd --- /dev/null +++ b/os/hal/ports/AVR/TINY/TIMv1/hal_st_lld.c @@ -0,0 +1,253 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_st_lld.c + * @brief AVR ST subsystem low level driver source. + * + * @addtogroup ST + * @{ + */ + +#include "hal.h" + +#if (OSAL_ST_MODE != OSAL_ST_MODE_NONE) || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/** + * @brief Timer maximum value + */ +#define AVR_TIMER_COUNTER_MAX 255 + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +#if (OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC) || defined(__DOXYGEN__) + +/* Work out what the timer interrupt is called on this MCU */ +#ifdef TIMER0_COMPA_vect + #define AVR_TIMER_VECT TIMER0_COMPA_vect +#elif defined(TIMER_COMPA_vect) + #define AVR_TIMER_VECT TIMER_COMPA_vect +#elif defined(TIMER0_COMP_vect) + #define AVR_TIMER_VECT TIMER0_COMP_vect +#else + #error "Cannot find interrupt vector name for timer" +#endif + +/* Find the most suitable prescaler setting for the desired OSAL_ST_FREQUENCY */ +#if ((F_CPU / OSAL_ST_FREQUENCY) <= AVR_TIMER_COUNTER_MAX) + + #define AVR_TIMER_PRESCALER 1 + #define AVR_TIMER_PRESCALER_BITS ((0< + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/* + * TODO: for models that have many timers, + * could add AVR_ST_USE_TIMER + */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/* + * TODO: error checks for valid timer selected + */ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void st_lld_init(void); +#ifdef __cplusplus +} +#endif + +#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega162__) || \ + defined(__AVR_ATtiny85__) +#define TIFR_REG TIFR +#define TIMSK_REG TIMSK +#else +#define TIFR_REG TIFR1 +#define TIMSK_REG TIMSK1 +#endif + +/*===========================================================================*/ +/* Driver inline functions. */ +/*===========================================================================*/ + +/** + * @brief Returns the time counter value. + * + * @return The counter value. + * + * @notapi + */ +static inline systime_t st_lld_get_counter(void) { + + return (systime_t) TCNT1; +} + +/** + * @brief Starts the alarm. + * @note Makes sure that no spurious alarms are triggered after + * this call. + * + * @param[in] time the time to be set for the first alarm + * + * @notapi + */ +static inline void st_lld_start_alarm(systime_t time) { + + OCR1A = (uint16_t) time; + + /* Reset pending. */ + TIFR_REG = _BV(OCF1A); + + /* enable interrupt */ + TIMSK_REG = _BV(OCIE1A); +} + +/** + * @brief Stops the alarm interrupt. + * + * @notapi + */ +static inline void st_lld_stop_alarm(void) { + + TIMSK_REG = 0; +} + +/** + * @brief Sets the alarm time. + * + * @param[in] time the time to be set for the next alarm + * + * @notapi + */ +static inline void st_lld_set_alarm(systime_t time) { + + OCR1A = (uint16_t) time; +} + +/** + * @brief Returns the current alarm time. + * + * @return The currently set alarm time. + * + * @notapi + */ +static inline systime_t st_lld_get_alarm(void) { + + return (systime_t) OCR1A; +} + +/** + * @brief Determines if the alarm is active. + * + * @return The alarm status. + * @retval false if the alarm is not active. + * @retval true is the alarm is active + * + * @notapi + */ +static inline bool st_lld_is_alarm_active(void) { + + return (bool) ((TIMSK_REG & _BV(OCIE1A)) != 0); +} + +#endif /* HAL_ST_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/USARTv1/driver.mk b/os/hal/ports/AVR/TINY/USARTv1/driver.mk new file mode 100644 index 000000000..7a90004e6 --- /dev/null +++ b/os/hal/ports/AVR/TINY/USARTv1/driver.mk @@ -0,0 +1,13 @@ +ifeq ($(USE_SMART_BUILD),yes) +ifneq ($(findstring HAL_USE_SERIAL TRUE,$(HALCONF)),) +PLATFORMSRC += ${CHIBIOS}/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c +endif +ifneq ($(findstring HAL_USE_UART TRUE,$(HALCONF)),) +PLATFORMSRC += ${CHIBIOS}/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c +endif +else +PLATFORMSRC += ${CHIBIOS}/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c +PLATFORMSRC += ${CHIBIOS}/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c +endif + +PLATFORMINC += ${CHIBIOS}/os/hal/ports/AVR/TINY/USARTv1 diff --git a/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c b/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c new file mode 100644 index 000000000..de5143551 --- /dev/null +++ b/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.c @@ -0,0 +1,408 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_serial_lld.c + * @brief AVR low level serial driver code. + * + * @addtogroup SERIAL + * @{ + */ + +#include "hal.h" + +#if HAL_USE_SERIAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** + * @brief USART0 serial driver identifier. + * @note The name does not follow the convention used in the other ports + * (COMn) because a name conflict with the AVR headers. + */ +#if AVR_SERIAL_USE_USART0 || defined(__DOXYGEN__) +SerialDriver SD1; + + /* USARTs are not consistently named across the AVR range */ + #ifdef USART0_RX_vect + #define AVR_SD1_RX_VECT USART0_RX_vect + #define AVR_SD1_TX_VECT USART0_UDRE_vect + #elif defined(USART_RX_vect) + #define AVR_SD1_RX_VECT USART_RX_vect + #define AVR_SD1_TX_VECT USART_UDRE_vect + #elif defined(USART0_RXC_vect) + #define AVR_SD1_RX_VECT USART0_RXC_vect + #define AVR_SD1_TX_VECT USART0_UDRE_vect + #else + #error "Cannot find USART to use for SD1" + #endif +#endif /* AVR_SERIAL_USE_USART0 */ + +/** + * @brief USART1 serial driver identifier. + * @note The name does not follow the convention used in the other ports + * (COMn) because a name conflict with the AVR headers. + */ +#if AVR_SERIAL_USE_USART1 || defined(__DOXYGEN__) +SerialDriver SD2; + + /* Check if USART1 exists for this MCU */ + #ifdef USART1_RX_vect + #define AVR_SD2_RX_VECT USART1_RX_vect + #define AVR_SD2_TX_VECT USART1_UDRE_vect + #elif defined (USART1_RXC_vect) + #define AVR_SD2_RX_VECT USART1_RXC_vect + #define AVR_SD2_TX_VECT USART1_UDRE_vect + #else + #error "Cannot find USART to use for SD2" + #endif +#endif /* AVR_SERIAL_USE_USART1 */ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/** + * @brief Driver default configuration. + */ +static const SerialConfig default_config = { + UBRR2x_F(SERIAL_DEFAULT_BITRATE), + USART_CHAR_SIZE_8 +}; + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +static void set_error(uint8_t sra, SerialDriver *sdp) { + eventflags_t sts = 0; + uint8_t dor = 0; + uint8_t upe = 0; + uint8_t fe = 0; + +#if AVR_SERIAL_USE_USART0 + if (&SD1 == sdp) { + dor = (1 << DOR0); + upe = (1 << UPE0); + fe = (1 << FE0); + } +#endif + +#if AVR_SERIAL_USE_USART1 + if (&SD2 == sdp) { + dor = (1 << DOR1); + upe = (1 << UPE1); + fe = (1 << FE1); + } +#endif + + if (sra & dor) + sts |= SD_OVERRUN_ERROR; + if (sra & upe) + sts |= SD_PARITY_ERROR; + if (sra & fe) + sts |= SD_FRAMING_ERROR; + osalSysLockFromISR(); + chnAddFlagsI(sdp, sts); + osalSysUnlockFromISR(); +} + +#if AVR_SERIAL_USE_USART0 || defined(__DOXYGEN__) +static void notify1(io_queue_t *qp) { + + (void)qp; + UCSR0B |= (1 << UDRIE0); +} + +/** + * @brief USART0 initialization. + * + * @param[in] config the architecture-dependent serial driver configuration + */ +static void usart0_init(const SerialConfig *config) { + + uint8_t ucsr0c; + + UBRR0L = config->sc_brr; + UBRR0H = (config->sc_brr >> 8) & 0x0f; + UCSR0A = (1 << U2X0); + UCSR0B = (1 << RXEN0) | (1 << TXEN0) | (1 << RXCIE0); + switch (config->sc_bits_per_char) { + case USART_CHAR_SIZE_5: + ucsr0c = 0; + break; + case USART_CHAR_SIZE_6: + ucsr0c = (1 << UCSZ00); + break; + case USART_CHAR_SIZE_7: + ucsr0c = (1 << UCSZ01); + break; + case USART_CHAR_SIZE_9: + UCSR0B |= (1 << UCSZ02); + ucsr0c = (1 << UCSZ00) | (1 << UCSZ01); + break; + case USART_CHAR_SIZE_8: + default: + ucsr0c = (1 << UCSZ00) | (1 << UCSZ01); + } + +#if defined(__AVR_ATmega162__) + UCSR0C = (1 << URSEL0) | ucsr0c; +#else + UCSR0C = ucsr0c; +#endif +} + +/** + * @brief USART0 de-initialization. + */ +static void usart0_deinit(void) { + + UCSR0A = 0; + UCSR0B = 0; +#if defined(__AVR_ATmega162__) + UCSR0C = (1 << URSEL0); +#else + UCSR0C = 0; +#endif +} +#endif + +#if AVR_SERIAL_USE_USART1 || defined(__DOXYGEN__) +static void notify2(io_queue_t *qp) { + + (void)qp; + UCSR1B |= (1 << UDRIE1); +} + +/** + * @brief USART1 initialization. + * + * @param[in] config the architecture-dependent serial driver configuration + */ +static void usart1_init(const SerialConfig *config) { + + uint8_t ucsr1c; + + UBRR1L = config->sc_brr; + UBRR1H = (config->sc_brr >> 8) & 0x0f; + UCSR1A = (1 << U2X0); + UCSR1B = (1 << RXEN1) | (1 << TXEN1) | (1 << RXCIE1); + switch (config->sc_bits_per_char) { + case USART_CHAR_SIZE_5: + ucsr1c = 0; + break; + case USART_CHAR_SIZE_6: + ucsr1c = (1 << UCSZ10); + break; + case USART_CHAR_SIZE_7: + ucsr1c = (1 << UCSZ11); + break; + case USART_CHAR_SIZE_9: + UCSR1B |= (1 << UCSZ12); + ucsr1c = (1 << UCSZ10) | (1 << UCSZ11); + break; + case USART_CHAR_SIZE_8: + default: + ucsr1c = (1 << UCSZ10) | (1 << UCSZ11); + } + +#if defined(__AVR_ATmega162__) + UCSR1C = (1 << URSEL1) | ucsr1c; +#else + UCSR1C = ucsr1c; +#endif +} + +/** + * @brief USART1 de-initialization. + */ +static void usart1_deinit(void) { + + UCSR1A = 0; + UCSR1B = 0; +#if defined(__AVR_ATmega162__) + UCSR1C = (1 << URSEL1); +#else + UCSR1C = 0; +#endif +} +#endif + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if AVR_SERIAL_USE_USART0 || defined(__DOXYGEN__) +/** + * @brief USART0 RX interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(AVR_SD1_RX_VECT) { + uint8_t sra; + + OSAL_IRQ_PROLOGUE(); + + sra = UCSR0A; + if (sra & ((1 << DOR0) | (1 << UPE0) | (1 << FE0))) + set_error(sra, &SD1); + osalSysLockFromISR(); + sdIncomingDataI(&SD1, UDR0); + osalSysUnlockFromISR(); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief USART0 TX interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(AVR_SD1_TX_VECT) { + msg_t b; + + OSAL_IRQ_PROLOGUE(); + + osalSysLockFromISR(); + b = sdRequestDataI(&SD1); + osalSysUnlockFromISR(); + if (b < MSG_OK) + UCSR0B &= ~(1 << UDRIE0); + else + UDR0 = b; + + OSAL_IRQ_EPILOGUE(); +} +#endif /* AVR_SERIAL_USE_USART0 */ + +#if AVR_SERIAL_USE_USART1 || defined(__DOXYGEN__) +/** + * @brief USART1 RX interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(AVR_SD2_RX_VECT) { + uint8_t sra; + + OSAL_IRQ_PROLOGUE(); + + sra = UCSR1A; + if (sra & ((1 << DOR1) | (1 << UPE1) | (1 << FE1))) + set_error(sra, &SD2); + osalSysLockFromISR(); + sdIncomingDataI(&SD2, UDR1); + osalSysUnlockFromISR(); + + OSAL_IRQ_EPILOGUE(); +} + +/** + * @brief USART1 TX interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(AVR_SD2_TX_VECT) { + msg_t b; + + OSAL_IRQ_PROLOGUE(); + + osalSysLockFromISR(); + b = sdRequestDataI(&SD2); + osalSysUnlockFromISR(); + if (b < MSG_OK) + UCSR1B &= ~(1 << UDRIE1); + else + UDR1 = b; + + OSAL_IRQ_EPILOGUE(); +} +#endif /* AVR_SERIAL_USE_USART1 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level serial driver initialization. + * + * @notapi + */ +void sd_lld_init(void) { + +#if AVR_SERIAL_USE_USART0 + sdObjectInit(&SD1, NULL, notify1); +#endif +#if AVR_SERIAL_USE_USART1 + sdObjectInit(&SD2, NULL, notify2); +#endif +} + +/** + * @brief Low level serial driver configuration and (re)start. + * + * @param[in] sdp pointer to a @p SerialDriver object + * @param[in] config the architecture-dependent serial driver configuration. + * If this parameter is set to @p NULL then a default + * configuration is used. + * + * @notapi + */ +void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) { + + if (config == NULL) + config = &default_config; + +#if AVR_SERIAL_USE_USART0 + if (&SD1 == sdp) { + usart0_init(config); + return; + } +#endif +#if AVR_SERIAL_USE_USART1 + if (&SD2 == sdp) { + usart1_init(config); + return; + } +#endif +} + +/** + * @brief Low level serial driver stop. + * @details De-initializes the USART, stops the associated clock, resets the + * interrupt vector. + * + * @param[in] sdp pointer to a @p SerialDriver object + * + * @notapi + */ +void sd_lld_stop(SerialDriver *sdp) { + +#if AVR_SERIAL_USE_USART0 + if (&SD1 == sdp) + usart0_deinit(); +#endif +#if AVR_SERIAL_USE_USART1 + if (&SD2 == sdp) + usart1_deinit(); +#endif +} + +#endif /* HAL_USE_SERIAL */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.h b/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.h new file mode 100644 index 000000000..be53a0487 --- /dev/null +++ b/os/hal/ports/AVR/TINY/USARTv1/hal_serial_lld.h @@ -0,0 +1,158 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_serial_lld.h + * @brief AVR low level serial driver header. + * + * @addtogroup SERIAL + * @{ + */ + +#ifndef HAL_SERIAL_LLD_H +#define HAL_SERIAL_LLD_H + +#if HAL_USE_SERIAL || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @brief USART0 driver enable switch. + * @details If set to @p TRUE the support for USART0 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_SERIAL_USE_USART0) || defined(__DOXYGEN__) + #define AVR_SERIAL_USE_USART0 TRUE +#endif + +/** + * @brief USART1 driver enable switch. + * @details If set to @p TRUE the support for USART1 is included. + * @note The default is @p TRUE. + */ +#if !defined(AVR_SERIAL_USE_USART1) || defined(__DOXYGEN__) +#define AVR_SERIAL_USE_USART1 TRUE +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief AVR Serial Driver configuration structure. + * @details An instance of this structure must be passed to @p sdStart() + * in order to configure and start a serial driver operations. + */ +typedef struct { + /** + * @brief Initialization value for the BRR register. + */ + uint16_t sc_brr; + /** + * @brief Number of bits per character (USART_CHAR_SIZE_5 to USART_CHAR_SIZE_9). + */ + uint8_t sc_bits_per_char; +} SerialConfig; + +/** + * @brief @p SerialDriver specific data. + */ +#define _serial_driver_data \ + _base_asynchronous_channel_data \ + /* Driver state.*/ \ + sdstate_t state; \ + /* Input queue.*/ \ + input_queue_t iqueue; \ + /* Output queue.*/ \ + output_queue_t oqueue; \ + /* Input circular buffer.*/ \ + uint8_t ib[SERIAL_BUFFERS_SIZE]; \ + /* Output circular buffer.*/ \ + uint8_t ob[SERIAL_BUFFERS_SIZE]; \ + /* End of the mandatory fields.*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Macro for baud rate computation. + * @note Make sure the final baud rate is within tolerance. + */ +#define UBRR(b) (((F_CPU / b) >> 4) - 1) + +/** + * @brief Macro for baud rate computation when U2Xn == 1. + * @note Make sure the final baud rate is within tolerance. + */ +#define UBRR2x(b) (((F_CPU / b) >> 3) - 1) + +/** +* @brief Macro for baud rate computation. +* @note Make sure the final baud rate is within tolerance. +* @note This version uses floating point math for greater accuracy. +*/ +#define UBRR_F(b) ((((double) F_CPU / (double) b) / 16.0) - 0.5) + +/** +* @brief Macro for baud rate computation when U2Xn == 1. +* @note Make sure the final baud rate is within tolerance. +* @note This version uses floating point math for greater accuracy. +*/ +#define UBRR2x_F(b) ((((double) F_CPU / (double) b) / 8.0) - 0.5) + +#define USART_CHAR_SIZE_5 0 +#define USART_CHAR_SIZE_6 1 +#define USART_CHAR_SIZE_7 2 +#define USART_CHAR_SIZE_8 3 +#define USART_CHAR_SIZE_9 4 + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if AVR_SERIAL_USE_USART0 && !defined(__DOXYGEN__) +extern SerialDriver SD1; +#endif +#if AVR_SERIAL_USE_USART1 && !defined(__DOXYGEN__) +extern SerialDriver SD2; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void sd_lld_init(void); + void sd_lld_start(SerialDriver *sdp, const SerialConfig *config); + void sd_lld_stop(SerialDriver *sdp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_SERIAL */ + +#endif /* HAL_SERIAL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c b/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c new file mode 100644 index 000000000..1006e1509 --- /dev/null +++ b/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.c @@ -0,0 +1,227 @@ +/* + ChibiOS - Copyright (C) 2017 Theodore Ateba + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file USARTv1/hal_uart_lld.c + * @brief AVR low level UART driver code. + * + * @addtogroup UART + * @{ + */ + +#include "hal.h" + +#if HAL_USE_UART || defined(__DOXYGEN__) + +/*==========================================================================*/ +/* Macros definition. */ +/*==========================================================================*/ +#define UBRR(b) (((F_CPU / b) >> 5) - 1) + +/*===========================================================================*/ +/* Driver local definitions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/** @brief USART1 UART driver identifier.*/ +#if AVR_UART_USE_USART1 || defined(__DOXYGEN__) +UARTDriver UARTD1; +#endif + +/** @brief USART2 UART driver identifier.*/ +#if AVR_UART_USE_USART2 || defined(__DOXYGEN__) +UARTDriver UARTD2; +#endif + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/** + * @brief USART de-initialization. + * @details This function must be invoked with interrupts disabled. + * + * @param[in] uartp pointer to the @p UARTDriver object + */ +static void usart_stop(UARTDriver *uartp) { + +#if AVR_UART_USE_USART1 + LINCR &= ~(1 << LENA); /* Disable LIN/UART controller. */ +#endif +} + +/** + * @brief USART initialization. + * @details This function must be invoked with interrupts disabled. + * + * @param[in] uartp pointer to the @p UARTDriver object + */ +static void usart_start(UARTDriver *uartp) { + + /* Defensive programming, starting from a clean state.*/ + usart_stop(uartp); + +#if AVR_UART_USE_USART1 + /* Compute bit time. */ + uint16_t BIT_TIME = UBRR(uartp->config->speed); + + /* Set UART baudrate. */ + LINBRRH |= (uint8_t) (((BIT_TIME) >> 8) & 0x0F); + LINBRRL |= (uint8_t) (BIT_TIME); + + /* Enable LIN/UART controller. */ + LINCR |= (1 << LENA); +#endif +} + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +#if AVR_UART_USE_USART1 || defined(__DOXYGEN__) +/** + * @brief USART1 IRQ handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(LIN_TC_vect) { + + OSAL_IRQ_PROLOGUE(); + + // TODO: Manage the UART IRQ. + + OSAL_IRQ_EPILOGUE(); +} +#endif /* AVR_UART_USE_USART1 */ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level UART driver initialization. + * + * @notapi + */ +void uart_lld_init(void) { + +#if AVR_UART_USE_USART1 + uartObjectInit(&UARTD1); +#endif +} + +/** + * @brief Configures and activates the UART peripheral. + * + * @param[in] uartp pointer to the @p UARTDriver object + * + * @notapi + */ +void uart_lld_start(UARTDriver *uartp) { + + if (uartp->state == UART_STOP) { +#if AVR_UART_USE_USART1 + if (&UARTD1 == uartp) { + + /* Set the full duplex. */ + LINCR |= (1 << LCMD2); + LINCR |= (1 << LCMD1); + LINCR |= (1 << LCMD0); + + /* Set the Uart data format: 8-bit data, no parity, 1 stop-bit. */ + LINCR &= ~(1 << LCONF1); + LINCR &= ~(1 << LCONF0); + } +#endif + } + + uartp->rxstate = UART_RX_IDLE; + uartp->txstate = UART_TX_IDLE; + usart_start(uartp); +} + +/** + * @brief Deactivates the UART peripheral. + * + * @param[in] uartp pointer to the @p UARTDriver object + * + * @notapi + */ +void uart_lld_stop(UARTDriver *uartp) { + + if (uartp->state == UART_READY) { + usart_stop(uartp); + +#if AVR_UART_USE_USART1 + if (&UARTD1 == uartp) { + return; + } +#endif + } +} + +/** + * @brief Starts a transmission on the UART peripheral. + * @note The buffers are organized as uint8_t arrays for data sizes below + * or equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] uartp pointer to the @p UARTDriver object + * @param[in] n number of data frames to send + * @param[in] txbuf the pointer to the transmit buffer + * + * @notapi + */ +void uart_lld_start_send(UARTDriver *uartp, size_t n, const uint8_t *txbuf) { + +#if AVR_UART_USE_USART1 + if (&UARTD1 == uartp) { + /* Starting transfer.*/ + while(n--) { + while (LINSIR & (1 << LBUSY)); + LINDAT = *txbuf; + txbuf++; + } + } +#endif +} + +/** + * @brief Starts a receive operation on the UART peripheral. + * @note The buffers are organized as uint8_t arrays for data sizes below + * or equal to 8 bits else it is organized as uint16_t arrays. + * + * @param[in] uartp pointer to the @p UARTDriver object + * @param[in] n number of data frames to send + * @param[out] rxbuf the pointer to the receive buffer + * + * @notapi + */ +void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) { + + /* Stopping previous activity (idle state).*/ + // TODO: Implement this function. +} + +#endif /* HAL_USE_UART */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.h b/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.h new file mode 100644 index 000000000..587b2be19 --- /dev/null +++ b/os/hal/ports/AVR/TINY/USARTv1/hal_uart_lld.h @@ -0,0 +1,217 @@ +/* + ChibiOS - Copyright (C) 2017 Theodore Ateba + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file USARTv1/hal_uart_lld.h + * @brief AVR low level UART driver header. + * + * @addtogroup UART + * @{ + */ + +#ifndef HAL_UART_LLD_H +#define HAL_UART_LLD_H + +#if HAL_USE_UART || defined(__DOXYGEN__) + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief UART driver on USART1 enable switch. + * @details If set to @p TRUE the support for USART1 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_UART_USE_USART1) || defined(__DOXYGEN__) +#define AVR_UART_USE_USART1 FALSE +#endif + +/** + * @brief UART driver on USART2 enable switch. + * @details If set to @p TRUE the support for USART2 is included. + * @note The default is @p FALSE. + */ +#if !defined(AVR_UART_USE_USART2) || defined(__DOXYGEN__) +#define AVR_UART_USE_USART2 FALSE +#endif + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @brief UART driver condition flags type. + */ +typedef uint32_t uartflags_t; + +/** + * @brief Structure representing an UART driver. + */ +typedef struct UARTDriver UARTDriver; + +/** + * @brief Generic UART notification callback type. + * + * @param[in] uartp pointer to the @p UARTDriver object + */ +typedef void (*uartcb_t)(UARTDriver *uartp); + +/** + * @brief Character received UART notification callback type. + * + * @param[in] uartp pointer to the @p UARTDriver object + * @param[in] c received character + */ +typedef void (*uartccb_t)(UARTDriver *uartp, uint16_t c); + +/** + * @brief Receive error UART notification callback type. + * + * @param[in] uartp pointer to the @p UARTDriver object + * @param[in] e receive error mask + */ +typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e); + +/** + * @brief Driver configuration structure. + * @note It could be empty on some architectures. + */ +typedef struct { + /** + * @brief End of transmission buffer callback. + */ + uartcb_t txend1_cb; + /** + * @brief Physical end of transmission callback. + */ + uartcb_t txend2_cb; + /** + * @brief Receive buffer filled callback. + */ + uartcb_t rxend_cb; + /** + * @brief Character received while out if the @p UART_RECEIVE state. + */ + uartccb_t rxchar_cb; + /** + * @brief Receive error callback. + */ + uartecb_t rxerr_cb; + /* End of the mandatory fields.*/ + /** + * @brief Bit rate. + */ + uint32_t speed; +} UARTConfig; + +/** + * @brief Structure representing an UART driver. + */ +struct UARTDriver { + /** + * @brief Driver state. + */ + uartstate_t state; + /** + * @brief Transmitter state. + */ + uarttxstate_t txstate; + /** + * @brief Receiver state. + */ + uartrxstate_t rxstate; + /** + * @brief Current configuration data. + */ + const UARTConfig *config; +#if (UART_USE_WAIT == TRUE) || defined(__DOXYGEN__) + /** + * @brief Synchronization flag for transmit operations. + */ + bool early; + /** + * @brief Waiting thread on RX. + */ + thread_reference_t threadrx; + /** + * @brief Waiting thread on TX. + */ + thread_reference_t threadtx; +#endif /* UART_USE_WAIT */ +#if (UART_USE_MUTUAL_EXCLUSION == TRUE) || defined(__DOXYGEN__) + /** + * @brief Mutex protecting the peripheral. + */ + mutex_t mutex; +#endif /* UART_USE_MUTUAL_EXCLUSION */ +#if defined(UART_DRIVER_EXT_FIELDS) + UART_DRIVER_EXT_FIELDS +#endif + /* End of the mandatory fields.*/ + /** + * @brief Default receive buffer while into @p UART_RX_IDLE state. + */ + volatile uint16_t rxbuf; +}; + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#if AVR_UART_USE_USART1 && !defined(__DOXYGEN__) +extern UARTDriver UARTD1; +#endif + +#if AVR_UART_USE_USART2 && !defined(__DOXYGEN__) +extern UARTDriver UARTD2; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + void uart_lld_init(void); + void uart_lld_start(UARTDriver *uartp); + void uart_lld_stop(UARTDriver *uartp); + void uart_lld_start_send(UARTDriver *uartp, size_t n, const uint8_t *txbuf); + size_t uart_lld_stop_send(UARTDriver *uartp); + void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf); + size_t uart_lld_stop_receive(UARTDriver *uartp); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_USE_UART */ + +#endif /* HAL_UART_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/avr_pins.h b/os/hal/ports/AVR/TINY/avr_pins.h new file mode 100644 index 000000000..b98ce2574 --- /dev/null +++ b/os/hal/ports/AVR/TINY/avr_pins.h @@ -0,0 +1,159 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef AVR_PINS_H +#define AVR_PINS_H + +#include + +#if AVR_SPI_USE_SPI1 + +#if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega162__) + #define PIN_SPI1 PINB + #define PORT_SPI1 PORTB + #define DDR_SPI1 DDRB + #define SPI1_SS 4 + #define SPI1_SCK 7 + #define SPI1_MOSI 5 + #define SPI1_MISO 6 +#elif defined(__AVR_ATmega328P__) + #define PIN_SPI1 PINB + #define PORT_SPI1 PORTB + #define DDR_SPI1 DDRB + #define SPI1_SS 2 + #define SPI1_SCK 5 + #define SPI1_MOSI 3 + #define SPI1_MISO 4 +#elif defined(__AVR_ATmega2560__) || \ + defined(__AVR_ATmega1280__) || \ + defined(__AVR_ATmega128__) + #define PIN_SPI1 PINB + #define PORT_SPI1 PORTB + #define DDR_SPI1 DDRB + #define SPI1_SS 0 + #define SPI1_SCK 1 + #define SPI1_MOSI 2 + #define SPI1_MISO 3 +#elif defined(__AVR_AT90CAN128__) || \ + defined(__AVR_AT90CAN64__) || \ + defined(__AVR_AT90CAN32__) + #define PIN_SPI1 PINB + #define PORT_SPI1 PORTB + #define DDR_SPI1 DDRB + #define SPI1_SS 0 + #define SPI1_SCK 1 + #define SPI1_MOSI 2 + #define SPI1_MISO 3 +#else + #warning "Device not supported by SPI driver" +#endif + +#endif /* AVR_SPI_USE_SPI1 */ + +#if AVR_ADC_USE_ADC1 + +#if defined(__AVR_ATmega644__) || defined(__AVR_ATmega644P__) + #define PINADC PINA + #define PORTADC PORTA + #define DDRADC DDRA +#elif defined(__AVR_ATmega328P__) + #define PINADC PINC + #define PORTADC PORTC + #define DDRADC DDRC +#elif defined(__AVR_ATmega2560__) || \ + defined(__AVR_ATmega1280__) || \ + defined(__AVR_ATmega128__) + #define PINADC PINF + #define PORTADC PORTF + #define DDRADC DDRF +#elif defined(__AVR_AT90CAN128__) || \ + defined(__AVR_AT90CAN64__) || \ + defined(__AVR_AT90CAN32__) + #define PINADC PINF + #define PORTADC PORTF + #define DDRADC DDRF +#else + #warning "Device not supported by ADC driver" +#endif + +#endif /* AVR_ADC_USE_ADC1 */ + +#if AVR_EXT_USE_PCINT0 +#if defined(__AVR_ATmega162__) + #define PCINT0_PIN PINA +#elif defined(__AVR_ATmega328P__) || \ + defined(__AVR_ATmega1280__) || \ + defined(__AVR_ATmega2560__) + #define PCINT0_PIN PINB +#else + #warning "Device not supported by EXT driver" +#endif +#endif /* AVR_EXT_USE_PCINT0 */ + +#if AVR_EXT_USE_PCINT1 +#if defined(__AVR_ATmega162__) || \ + defined(__AVR_ATmega328P__) + #define PCINT1_PIN PINC +#elif defined(__AVR_ATmega1280__) || \ + defined(__AVR_ATmega2560__) + #define PCINT1_PIN PINE +#else + #warning "Device not supported by EXT driver" +#endif +#endif /* AVR_EXT_USE_PCINT1 */ + +#if AVR_EXT_USE_PCINT2 +#if defined(__AVR_ATmega1280__) || \ + defined(__AVR_ATmega2560__) + #define PCINT2_PIN PINK +#else + #warning "Device not supported by EXT driver" +#endif +#endif /* AVR_EXT_USE_PCINT2 */ + +#if AVR_EXT_USE_PCINT3 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT3 */ + +#if AVR_EXT_USE_PCINT4 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT4 */ + +#if AVR_EXT_USE_PCINT5 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT5 */ + +#if AVR_EXT_USE_PCINT6 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT6 */ + +#if AVR_EXT_USE_PCINT7 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT7 */ + +#if AVR_EXT_USE_PCINT8 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT8 */ + +#if AVR_EXT_USE_PCINT9 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT9 */ + +#if AVR_EXT_USE_PCINT10 +#warning "Device not supported by EXT driver" +#endif /* AVR_EXT_USE_PCINT10 */ + +#endif /* AVR_PINS_H */ diff --git a/os/hal/ports/AVR/TINY/avr_timers.h b/os/hal/ports/AVR/TINY/avr_timers.h new file mode 100644 index 000000000..42c275e20 --- /dev/null +++ b/os/hal/ports/AVR/TINY/avr_timers.h @@ -0,0 +1,55 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef AVR_TIMERS_H +#define AVR_TIMERS_H + +#include "mcuconf.h" + +#if ((OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING) && \ + (AVR_GPT_USE_TIM1 || AVR_PWM_USE_TIM1 || AVR_ICU_USE_TIM1)) + #error "Timer 1 cannot be used by drivers when running in tickless mode." +#endif + +#if ((AVR_GPT_USE_TIM1 && AVR_PWM_USE_TIM1) || \ + (AVR_GPT_USE_TIM1 && AVR_ICU_USE_TIM1) || \ + (AVR_PWM_USE_TIM1 && AVR_ICU_USE_TIM1)) + #error "Timer 1 cannot simultaneously be used by multiple drivers." +#endif + +#if ((AVR_GPT_USE_TIM2 && AVR_PWM_USE_TIM2)) + #error "Timer 2 cannot simultaneously be used by multiple drivers." +#endif + +#if ((AVR_GPT_USE_TIM3 && AVR_PWM_USE_TIM3) || \ + (AVR_GPT_USE_TIM3 && AVR_ICU_USE_TIM3) || \ + (AVR_PWM_USE_TIM3 && AVR_ICU_USE_TIM3)) + #error "Timer 3 cannot simultaneously be used by multiple drivers." +#endif + +#if ((AVR_GPT_USE_TIM4 && AVR_PWM_USE_TIM4) || \ + (AVR_GPT_USE_TIM4 && AVR_ICU_USE_TIM4) || \ + (AVR_PWM_USE_TIM4 && AVR_ICU_USE_TIM4)) + #error "Timer 4 cannot simultaneously be used by multiple drivers." +#endif + +#if ((AVR_GPT_USE_TIM5 && AVR_PWM_USE_TIM5) || \ + (AVR_GPT_USE_TIM5 && AVR_ICU_USE_TIM5) || \ + (AVR_PWM_USE_TIM5 && AVR_ICU_USE_TIM5)) + #error "Timer 5 cannot simultaneously be used by multiple drivers." +#endif + +#endif /* AVR_TIMERS_H */ diff --git a/os/hal/ports/AVR/TINY/hal_lld.c b/os/hal/ports/AVR/TINY/hal_lld.c new file mode 100644 index 000000000..fef8b7084 --- /dev/null +++ b/os/hal/ports/AVR/TINY/hal_lld.c @@ -0,0 +1,55 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_lld.c + * @brief AVR HAL subsystem low level driver code. + * + * @addtogroup HAL + * @{ + */ + +#include "hal.h" + +/*===========================================================================*/ +/* Driver exported variables. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local variables and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver local functions. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver interrupt handlers. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Low level HAL driver initialization. + * + * @notapi + */ +void hal_lld_init(void) { +} + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/hal_lld.h b/os/hal/ports/AVR/TINY/hal_lld.h new file mode 100644 index 000000000..eca18ffc3 --- /dev/null +++ b/os/hal/ports/AVR/TINY/hal_lld.h @@ -0,0 +1,72 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file hal_lld.h + * @brief AVR HAL subsystem low level driver header. + * + * @addtogroup HAL + * @{ + */ + +#ifndef HAL_LLD_H +#define HAL_LLD_H + +/*===========================================================================*/ +/* Driver constants. */ +/*===========================================================================*/ + +/** + * @brief Defines the support for realtime counters in the HAL. + */ +#define HAL_IMPLEMENTS_COUNTERS FALSE + +/** + * @brief Platform name. + */ +#define PLATFORM_NAME "AVR" + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void hal_lld_init(void); +#ifdef __cplusplus +} +#endif + +#endif /* HAL_LLD_H */ + +/** @} */ diff --git a/os/hal/ports/AVR/TINY/platform.mk b/os/hal/ports/AVR/TINY/platform.mk new file mode 100644 index 000000000..9635f6267 --- /dev/null +++ b/os/hal/ports/AVR/TINY/platform.mk @@ -0,0 +1,11 @@ +# List of all the AVR platform files. +PLATFORMSRC = ${CHIBIOS}/os/hal/ports/AVR/TINY/hal_lld.c + +# Required include directories +PLATFORMINC = ${CHIBIOS}/os/hal/ports/AVR/MEGA + +# Drivers compatible with the platform. +PLATFORMINC = ${CHIBIOS}/os/hal/ports/AVR/TINY +include ${CHIBIOS}/os/hal/ports/AVR/TINY/GPIOv1/driver.mk +include ${CHIBIOS}/os/hal/ports/AVR/TINY/TIMv1/driver.mk +include ${CHIBIOS}/os/hal/ports/AVR/TINY/USARTv1/driver.mk -- cgit v1.2.3