From 4faf6433bb01a222e21ead6727b0d43b24600552 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 8 Sep 2010 08:58:54 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2168 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/LPC13xx/pal_lld.h | 10 +++++----- os/hal/platforms/MSP430/pal_lld.h | 14 +++++++------- os/ports/GCC/ARMCMx/chcore.h | 24 ++++++++++++++++++++++++ os/ports/GCC/ARMCMx/port.dox | 2 ++ readme.txt | 2 +- 5 files changed, 39 insertions(+), 13 deletions(-) diff --git a/os/hal/platforms/LPC13xx/pal_lld.h b/os/hal/platforms/LPC13xx/pal_lld.h index 9e3c33695..4e145be80 100644 --- a/os/hal/platforms/LPC13xx/pal_lld.h +++ b/os/hal/platforms/LPC13xx/pal_lld.h @@ -51,7 +51,7 @@ typedef struct { uint32_t data; /** Initial value for FIO_DIR register.*/ uint32_t dir; -} LPC13xx_gpio_setup_t; +} lpc13xx_gpio_setup_t; /** * @brief GPIO static initializer. @@ -67,13 +67,13 @@ typedef struct { */ typedef struct { /** @brief GPIO 0 setup data.*/ - LPC13xx_gpio_setup_t P0; + lpc13xx_gpio_setup_t P0; /** @brief GPIO 1 setup data.*/ - LPC13xx_gpio_setup_t P1; + lpc13xx_gpio_setup_t P1; /** @brief GPIO 2 setup data.*/ - LPC13xx_gpio_setup_t P2; + lpc13xx_gpio_setup_t P2; /** @brief GPIO 3 setup data.*/ - LPC13xx_gpio_setup_t P3; + lpc13xx_gpio_setup_t P3; } PALConfig; /** diff --git a/os/hal/platforms/MSP430/pal_lld.h b/os/hal/platforms/MSP430/pal_lld.h index 24c48d320..b1a12c924 100644 --- a/os/hal/platforms/MSP430/pal_lld.h +++ b/os/hal/platforms/MSP430/pal_lld.h @@ -47,7 +47,7 @@ * @details This structure represents the common part of all the MSP430 I/O * ports. */ -struct port_common_t { +struct msp430_port_common { ioregister_t in; ioregister_t out; ioregister_t dir; @@ -56,11 +56,11 @@ struct port_common_t { /** * @brief Generic MSP430 I/O port. */ -union __ioport { - struct port_common_t iop_common; - struct port_simple_t iop_simple; - struct port_full_t iop_full; -}; +typedef union { + struct msp430_port_common iop_common; + struct port_simple_t iop_simple; + struct port_full_t iop_full; +} msp430_ioport_t; /** * @brief Setup registers common to all the MSP430 ports. @@ -138,7 +138,7 @@ typedef uint8_t ioportmask_t; * any assumption about it, use the provided macros when populating * variables of this type. */ -typedef union __ioport * ioportid_t; +typedef union msp430_ioport_t *ioportid_t; /*===========================================================================*/ /* I/O Ports Identifiers. */ diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index c0396c1d5..ae3ec2b8e 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -187,18 +187,37 @@ #if defined(__DOXYGEN__) /** * @brief Macro defining the specific ARM architecture. + * @note This macro is for documentation only, the real name changes + * depending on the selected architecture, the possible names are: + * - CH_ARCHITECTURE_ARM_v6M. + * - CH_ARCHITECTURE_ARM_v7M. + * . */ #define CH_ARCHITECTURE_ARM_vxm /** * @brief Name of the implemented architecture. + * @note The value is for documentation only, the real value changes + * depending on the selected architecture, the possible values are: + * - "ARMv6-M". + * - "ARMv7-M". + * - "ARMv7-ME". + * . */ #define CH_ARCHITECTURE_NAME "ARMvx-M" /** * @brief Name of the architecture variant (optional). + * @note The value is for documentation only, the real value changes + * depending on the selected architecture, the possible values are: + * - "Cortex-M0" + * - "Cortex-M1" + * - "Cortex-M3" + * - "Cortex-M4" + * . */ #define CH_CORE_VARIANT_NAME "Cortex-Mx" + #elif CORTEX_MODEL == CORTEX_M4 #define CH_ARCHITECTURE_ARM_v7M #define CH_ARCHITECTURE_NAME "ARMv7-ME" @@ -225,7 +244,12 @@ * @brief Stack and memory alignment enforcement. */ #if (CORTEX_STACK_ALIGNMENT == 64) || defined(__DOXYGEN__) +#if defined(__DOXYGEN__) +/* Dummy declaration, for Doxygen only.*/ +typedef uint64_t stkalign_t; +#else typedef uint64_t stkalign_t __attribute__ ((aligned (8))); +#endif #elif CORTEX_STACK_ALIGNMENT == 32 typedef uint32_t stkalign_t __attribute__ ((aligned (4))); #else diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox index 80668dc08..f518a8ab5 100644 --- a/os/ports/GCC/ARMCMx/port.dox +++ b/os/ports/GCC/ARMCMx/port.dox @@ -26,6 +26,8 @@ * architectures. * * @section ARMCMx_STATES_A System logical states in ARMv6-M + * The ChibiOS/RT logical @ref system_states are mapped as follow in the ARM + * Cortex-M0 port: * - Init. This state is represented by the startup code and the * initialization code before @p chSysInit() is executed. It has not a * special hardware state associated. diff --git a/readme.txt b/readme.txt index afe08e1f4..f6ecd3367 100644 --- a/readme.txt +++ b/readme.txt @@ -119,7 +119,7 @@ the name in order to make names more consistent. NOTE: ****** Make sure to use a chconf.h file taken from ****** ****** this version in your project. ****** -- HAL documentation improvements. +- CHANGE: Extensive documentation improvements. *** 2.1.1 *** - FIX: Fixed insufficient stack size for idle thread (bug 3033624)(backported -- cgit v1.2.3