From 4b7feac57b56e5ac49d5370388ce790ebc42a176 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Mon, 23 May 2016 14:42:24 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9501 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/ex/Micron/m25q.c | 11 +++++------ os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c | 8 ++++++-- .../debug/QSPI-N25Q128 (OpenOCD, Flash and Run).launch | 2 +- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/os/ex/Micron/m25q.c b/os/ex/Micron/m25q.c index 8bd1a13e0..9a170a17f 100644 --- a/os/ex/Micron/m25q.c +++ b/os/ex/Micron/m25q.c @@ -146,8 +146,7 @@ static const qspi_command_t cmd_write_enable = { #if M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI1L QSPI_CFG_CMD_MODE_ONE_LINE, #elif M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI2L - QSPI_CFG_CMD_MODE_TWO_LINES | - QSPI_CFG_DATA_MODE_TWO_LINES, + QSPI_CFG_CMD_MODE_TWO_LINES, #else QSPI_CFG_CMD_MODE_FOUR_LINES, #endif @@ -210,10 +209,10 @@ static const uint8_t evconf_value[1] = {0xCF}; #elif M25Q_BUS_MODE == M25Q_BUS_MODE_QSPI2L static const uint8_t evconf_value[1] = {0x8F}; #else -static const uint8_t evconf_value[1] = {0x4F}; +static const uint8_t evconf_value[1] = {0xCF};//{0x4F}; #endif -#endif +#endif /* M25Q_BUS_MODE != M25Q_BUS_MODE_SPI */ /*===========================================================================*/ /* Driver local functions. */ @@ -570,8 +569,8 @@ void m25qStart(M25QDriver *devp, const M25QConfig *config) { #if (M25Q_BUS_MODE != M25Q_BUS_MODE_SPI) && (M25Q_SWITCH_WIDTH == TRUE) /* Setting up final bus width.*/ -// qspiCommand(devp->config->qspip, &cmd_write_enable); -// qspiSend(devp->config->qspip, &cmd_write_evconf, 1, evconf_value); + qspiCommand(devp->config->qspip, &cmd_write_enable); + qspiSend(devp->config->qspip, &cmd_write_evconf, 1, evconf_value); #endif flash_cmd_receive(devp, M25Q_CMD_READ_ID, 3, id); diff --git a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c index 19f11c28e..40df845db 100644 --- a/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c +++ b/os/hal/ports/STM32/LLD/QUADSPIv1/hal_qspi_lld.c @@ -240,7 +240,9 @@ void qspi_lld_send(QSPIDriver *qspip, const qspi_command_t *cmdp, qspip->qspi->DLR = n - 1; qspip->qspi->ABR = cmdp->alt; qspip->qspi->CCR = cmdp->cfg; - qspip->qspi->AR = cmdp->addr; + if ((cmdp->cfg & QSPI_CFG_ADDR_MODE_MASK) != QSPI_CFG_ADDR_MODE_NONE) { + qspip->qspi->AR = cmdp->addr; + } dmaStreamEnable(qspip->dma); } @@ -266,7 +268,9 @@ void qspi_lld_receive(QSPIDriver *qspip, const qspi_command_t *cmdp, qspip->qspi->DLR = n - 1; qspip->qspi->ABR = cmdp->alt; qspip->qspi->CCR = cmdp->cfg | QUADSPI_CCR_FMODE_0; - qspip->qspi->AR = cmdp->addr; + if ((cmdp->cfg & QSPI_CFG_ADDR_MODE_MASK) != QSPI_CFG_ADDR_MODE_NONE) { + qspip->qspi->AR = cmdp->addr; + } dmaStreamEnable(qspip->dma); } diff --git a/testhal/STM32/STM32L4xx/QSPI-N25Q128/debug/QSPI-N25Q128 (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32L4xx/QSPI-N25Q128/debug/QSPI-N25Q128 (OpenOCD, Flash and Run).launch index 838be0e4a..5c5c982a2 100644 --- a/testhal/STM32/STM32L4xx/QSPI-N25Q128/debug/QSPI-N25Q128 (OpenOCD, Flash and Run).launch +++ b/testhal/STM32/STM32L4xx/QSPI-N25Q128/debug/QSPI-N25Q128 (OpenOCD, Flash and Run).launch @@ -33,7 +33,7 @@ - + -- cgit v1.2.3