From 42fd5566d533d39959b669a7333d88445757cff5 Mon Sep 17 00:00:00 2001 From: edolomb Date: Tue, 16 Jan 2018 20:41:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11296 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/ports/SAMA/SAMA5D2x/hal_lld.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c index e1a23c14b..f598bf856 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c +++ b/os/hal/ports/SAMA/SAMA5D2x/hal_lld.c @@ -60,6 +60,10 @@ */ void hal_lld_init(void) { +#if (SAMA_HAL_IS_SECURE == TRUE) /* The Matrix is PAS and PMC is always configured secure */ + /* Disabling PMC write protection. */ + pmcDisableWP(); + /* Configures peripherals as not-secure */ MATRIX0->MATRIX_SPSELR[0] = 0xFFFFFFFF; MATRIX0->MATRIX_SPSELR[1] = 0xFFFFFFFF; @@ -71,10 +75,6 @@ void hal_lld_init(void) { /* Configures PMC and RTC as secure */ mtxConfigPeriphSecurity(MATRIX1, ID_SYSC, SECURE_PER); -#if (SAMA_HAL_IS_SECURE == TRUE) /* The Matrix is PAS and PMC is always configured secure */ - /* Disabling PMC write protection. */ - pmcDisableWP(); - /* Enabling matrix clock */ pmcEnableH32MX(); pmcEnableH64MX(); -- cgit v1.2.3