From 41cc6d8a84eddb01702cd0ed133be4b8583f38de Mon Sep 17 00:00:00 2001 From: Rocco Marco Guglielmi Date: Sun, 3 Feb 2019 11:39:13 +0000 Subject: Fixed Bux #1008 git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_19.1.x@12636 110e8d01-0319-4d1e-a829-52ad28d1bb01 --- readme.txt | 2 + testex/STM32/STM32F4xx/SPI-LIS302DL/cfg/mcuconf.h | 125 +++- testex/STM32/STM32F4xx/SPI-LIS302DL/chconf.h | 714 ---------------------- testex/STM32/STM32F4xx/SPI-LIS302DL/halconf.h | 525 ---------------- testex/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h | 342 ----------- testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.c | 342 ----------- testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.h | 26 - testex/STM32/STM32F4xx/SPI-LIS3DSH/cfg/mcuconf.h | 125 +++- testex/STM32/STM32F4xx/SPI-LIS3DSH/chconf.h | 714 ---------------------- testex/STM32/STM32F4xx/SPI-LIS3DSH/halconf.h | 525 ---------------- testex/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h | 346 ----------- testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.c | 342 ----------- testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.h | 26 - 13 files changed, 226 insertions(+), 3928 deletions(-) delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS302DL/chconf.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS302DL/halconf.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.c delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS3DSH/chconf.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS3DSH/halconf.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.c delete mode 100644 testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.h diff --git a/readme.txt b/readme.txt index 1556869aa..ca8ff11a9 100644 --- a/readme.txt +++ b/readme.txt @@ -74,6 +74,8 @@ ***************************************************************************** *** 19.1.1 *** +- FIX: Fixed wrong mcuconf.h in some testex demos related to STM32F407 + (bug #1008). - FIX: Fixed problem in STM32 mcuconf.h template files (bug #1007). - EX: Fixed I2C Acquire bus called twice in the HTS221 initialization (bug #1006). diff --git a/testex/STM32/STM32F4xx/SPI-LIS302DL/cfg/mcuconf.h b/testex/STM32/STM32F4xx/SPI-LIS302DL/cfg/mcuconf.h index 4651107c0..4539bf113 100644 --- a/testex/STM32/STM32F4xx/SPI-LIS302DL/cfg/mcuconf.h +++ b/testex/STM32/STM32F4xx/SPI-LIS302DL/cfg/mcuconf.h @@ -32,11 +32,18 @@ */ #define STM32F4xx_MCUCONF +#define STM32F405_MCUCONF +#define STM32F415_MCUCONF +#define STM32F407_MCUCONF +#define STM32F417_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -44,13 +51,13 @@ #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 4 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCPRE_VALUE 8 #define STM32_MCO1SEL STM32_MCO1SEL_HSI @@ -60,9 +67,6 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -87,10 +91,39 @@ */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) /* * GPT driver system settings. @@ -100,15 +133,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE #define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 #define STM32_GPT_TIM9_IRQ_PRIORITY 7 #define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -154,14 +197,27 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 #define STM32_ICU_TIM9_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ @@ -171,22 +227,49 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 #define STM32_PWM_TIM9_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_WRITE_TIMEOUT_MS 1000 +#define STM32_SDC_READ_TIMEOUT_MS 1000 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) + /* * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_USART6_PRIORITY 12 /* @@ -220,18 +303,33 @@ */ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 #define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") @@ -239,11 +337,12 @@ * USB driver system settings. */ #define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_USE_OTG2 FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/testex/STM32/STM32F4xx/SPI-LIS302DL/chconf.h b/testex/STM32/STM32F4xx/SPI-LIS302DL/chconf.h deleted file mode 100644 index 3d46e3045..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS302DL/chconf.h +++ /dev/null @@ -1,714 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file rt/templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef CHCONF_H -#define CHCONF_H - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_0_ - -/*===========================================================================*/ -/** - * @name System timers settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 -#endif - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_CFG_ST_FREQUENCY) -#define CH_CFG_ST_FREQUENCY 10000 -#endif - -/** - * @brief Time intervals data size. - * @note Allowed values are 16, 32 or 64 bits. - */ -#if !defined(CH_CFG_INTERVALS_SIZE) -#define CH_CFG_INTERVALS_SIZE 32 -#endif - -/** - * @brief Time types data size. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_TIME_TYPES_SIZE) -#define CH_CFG_TIME_TYPES_SIZE 32 -#endif - -/** - * @brief Time delta constant for the tick-less mode. - * @note If this value is zero then the system uses the classic - * periodic tick. This value represents the minimum number - * of ticks that is safe to specify in a timeout directive. - * The value one is not valid, timeouts are rounded up to - * this value. - */ -#if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 2 -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - * @note The round robin preemption is not supported in tickless mode and - * must be set to zero in that case. - */ -#if !defined(CH_CFG_TIME_QUANTUM) -#define CH_CFG_TIME_QUANTUM 0 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_CFG_USE_MEMCORE. - */ -#if !defined(CH_CFG_MEMCORE_SIZE) -#define CH_CFG_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread. The application @p main() - * function becomes the idle thread and must implement an - * infinite loop. - */ -#if !defined(CH_CFG_NO_IDLE_THREAD) -#define CH_CFG_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_OPTIMIZE_SPEED) -#define CH_CFG_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Time Measurement APIs. - * @details If enabled then the time measurement APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TM) -#define CH_CFG_USE_TM TRUE -#endif - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_REGISTRY) -#define CH_CFG_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_WAITEXIT) -#define CH_CFG_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_SEMAPHORES) -#define CH_CFG_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) -#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MUTEXES) -#define CH_CFG_USE_MUTEXES TRUE -#endif - -/** - * @brief Enables recursive behavior on mutexes. - * @note Recursive mutexes are heavier and have an increased - * memory footprint. - * - * @note The default is @p FALSE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) -#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_CONDVARS) -#define CH_CFG_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_CONDVARS. - */ -#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) -#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_EVENTS) -#define CH_CFG_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_EVENTS. - */ -#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) -#define CH_CFG_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MESSAGES) -#define CH_CFG_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_MESSAGES. - */ -#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) -#define CH_CFG_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_MAILBOXES) -#define CH_CFG_USE_MAILBOXES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMCORE) -#define CH_CFG_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or - * @p CH_CFG_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_CFG_USE_HEAP) -#define CH_CFG_USE_HEAP TRUE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMPOOLS) -#define CH_CFG_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Objects FIFOs APIs. - * @details If enabled then the objects FIFOs APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_OBJ_FIFOS) -#define CH_CFG_USE_OBJ_FIFOS TRUE -#endif - -/** - * @brief Pipes APIs. - * @details If enabled then the pipes APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_PIPES) -#define CH_CFG_USE_PIPES TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_WAITEXIT. - * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. - */ -#if !defined(CH_CFG_USE_DYNAMIC) -#define CH_CFG_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Objects factory options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Objects Factory APIs. - * @details If enabled then the objects factory APIs are included in the - * kernel. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_CFG_USE_FACTORY) -#define CH_CFG_USE_FACTORY TRUE -#endif - -/** - * @brief Maximum length for object names. - * @details If the specified length is zero then the name is stored by - * pointer but this could have unintended side effects. - */ -#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) -#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 -#endif - -/** - * @brief Enables the registry of generic objects. - */ -#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) -#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE -#endif - -/** - * @brief Enables factory for generic buffers. - */ -#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) -#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE -#endif - -/** - * @brief Enables factory for semaphores. - */ -#if !defined(CH_CFG_FACTORY_SEMAPHORES) -#define CH_CFG_FACTORY_SEMAPHORES TRUE -#endif - -/** - * @brief Enables factory for mailboxes. - */ -#if !defined(CH_CFG_FACTORY_MAILBOXES) -#define CH_CFG_FACTORY_MAILBOXES TRUE -#endif - -/** - * @brief Enables factory for objects FIFOs. - */ -#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) -#define CH_CFG_FACTORY_OBJ_FIFOS TRUE -#endif - -/** - * @brief Enables factory for Pipes. - */ -#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) -#define CH_CFG_FACTORY_PIPES TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, kernel statistics. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_STATISTICS) -#define CH_DBG_STATISTICS FALSE -#endif - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the trace buffer is activated. - * - * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_MASK) -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL -#endif - -/** - * @brief Trace buffer entries. - * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_BUFFER_SIZE) -#define CH_DBG_TRACE_BUFFER_SIZE 128 -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p thread_t structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p FALSE. - * @note This debug option is not currently compatible with the - * tickless mode. - */ -#if !defined(CH_DBG_THREADS_PROFILING) -#define CH_DBG_THREADS_PROFILING FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System structure extension. - * @details User fields added to the end of the @p ch_system_t structure. - */ -#define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief System initialization hook. - * @details User initialization code added to the @p chSysInit() function - * just before interrupts are enabled globally. - */ -#define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p thread_t structure. - */ -#define CH_CFG_THREAD_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p _thread_init() function. - * - * @note It is invoked from within @p _thread_init() and implicitly from all - * the threads creation APIs. - */ -#define CH_CFG_THREAD_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - */ -#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} - -/** - * @brief Idle thread enter hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to activate a power saving mode. - */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ - /* Idle-enter code here.*/ \ -} - -/** - * @brief Idle thread leave hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to deactivate a power saving mode. - */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ - /* Idle-leave code here.*/ \ -} - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#define CH_CFG_IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#define CH_CFG_SYSTEM_TICK_HOOK() { \ - /* System tick event code here.*/ \ -} - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ - /* System halt code here.*/ \ -} - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* CHCONF_H */ - -/** @} */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS302DL/halconf.h b/testex/STM32/STM32F4xx/SPI-LIS302DL/halconf.h deleted file mode 100644 index af1bea551..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS302DL/halconf.h +++ /dev/null @@ -1,525 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef HALCONF_H -#define HALCONF_H - -#define _CHIBIOS_HAL_CONF_ -#define _CHIBIOS_HAL_CONF_VER_7_0_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the cryptographic subsystem. - */ -#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) -#define HAL_USE_CRY FALSE -#endif - -/** - * @brief Enables the DAC subsystem. - */ -#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) -#define HAL_USE_DAC FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the I2S subsystem. - */ -#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -#define HAL_USE_I2S FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE -#endif - -/** - * @brief Enables the SIO subsystem. - */ -#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) -#define HAL_USE_SIO FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the TRNG subsystem. - */ -#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) -#define HAL_USE_TRNG FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/** - * @brief Enables the WDG subsystem. - */ -#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -#define HAL_USE_WDG FALSE -#endif - -/** - * @brief Enables the WSPI subsystem. - */ -#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) -#define HAL_USE_WSPI FALSE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) -#define PAL_USE_CALLBACKS FALSE -#endif - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) -#define PAL_USE_WAIT FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/** - * @brief Enforces the driver to use direct callbacks rather than OSAL events. - */ -#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) -#define CAN_ENFORCE_USE_CALLBACKS FALSE -#endif - -/*===========================================================================*/ -/* CRY driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SW fall-back of the cryptographic driver. - * @details When enabled, this option, activates a fall-back software - * implementation for algorithms not supported by the underlying - * hardware. - * @note Fall-back implementations may not be present for all algorithms. - */ -#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_USE_FALLBACK FALSE -#endif - -/** - * @brief Makes the driver forcibly use the fall-back implementations. - */ -#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_ENFORCE_FALLBACK FALSE -#endif - -/*===========================================================================*/ -/* DAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) -#define DAC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define DAC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the zero-copy API. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/** - * @brief OCR initialization constant for V20 cards. - */ -#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) -#define SDC_INIT_OCR_V20 0x50FF8000U -#endif - -/** - * @brief OCR initialization constant for non-V20 cards. - */ -#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) -#define SDC_INIT_OCR 0x80100000U -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 16 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SERIAL_USB driver related setting. */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 256 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 256 -#endif - -/** - * @brief Serial over USB number of buffers. - * @note The default is 2 buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_NUMBER 2 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -#define SPI_USE_CIRCULAR FALSE -#endif - - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/** - * @brief Handling method for SPI CS line. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) -#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) -#define UART_USE_WAIT FALSE -#endif - -/** - * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define UART_USE_MUTUAL_EXCLUSION FALSE -#endif - -/*===========================================================================*/ -/* USB driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) -#define USB_USE_WAIT FALSE -#endif - -/*===========================================================================*/ -/* WSPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) -#define WSPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define WSPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* HALCONF_H */ - -/** @} */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h b/testex/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h deleted file mode 100644 index 6797acebe..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS302DL/mcuconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef MCUCONF_H -#define MCUCONF_H - -/* - * STM32F4xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F4xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_CLOCK48_REQUIRED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 2 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTCPRE_VALUE 8 -#define STM32_MCO1SEL STM32_MCO1SEL_HSI -#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 -#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2SSRC_CKIN -#define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE - -/* - * ADC driver system settings. - */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_USE_ADC2 FALSE -#define STM32_ADC_USE_ADC3 FALSE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC2_DMA_PRIORITY 2 -#define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_USE_CAN2 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 -#define STM32_CAN_CAN2_IRQ_PRIORITY 11 - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 FALSE -#define STM32_DAC_USE_DAC1_CH2 FALSE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM6 FALSE -#define STM32_GPT_USE_TIM7 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * I2S driver system settings. - */ -#define STM32_I2S_USE_SPI2 FALSE -#define STM32_I2S_USE_SPI3 FALSE -#define STM32_I2S_SPI2_IRQ_PRIORITY 10 -#define STM32_I2S_SPI3_IRQ_PRIORITY 10 -#define STM32_I2S_SPI2_DMA_PRIORITY 1 -#define STM32_I2S_SPI3_DMA_PRIORITY 1 -#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 - -/* - * MAC driver system settings. - */ -#define STM32_MAC_TRANSMIT_BUFFERS 2 -#define STM32_MAC_RECEIVE_BUFFERS 4 -#define STM32_MAC_BUFFERS_SIZE 1522 -#define STM32_MAC_PHY_TIMEOUT 100 -#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE -#define STM32_MAC_ETH1_IRQ_PRIORITY 13 -#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 - -/* - * SDC driver system settings. - */ -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 -#define STM32_SDC_WRITE_TIMEOUT_MS 1000 -#define STM32_SDC_READ_TIMEOUT_MS 1000 -#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 -#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE -#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 8 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USE_USART6 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_USART6_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_OTG1 TRUE -#define STM32_USB_USE_OTG2 FALSE -#define STM32_USB_OTG1_IRQ_PRIORITY 14 -#define STM32_USB_OTG2_IRQ_PRIORITY 14 -#define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE - -#endif /* MCUCONF_H */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.c b/testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.c deleted file mode 100644 index f3e69c237..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -/* Virtual serial port over USB.*/ -SerialUSBDriver SDU1; - -/* - * Endpoints to be used for USBD1. - */ -#define USBD1_DATA_REQUEST_EP 1 -#define USBD1_DATA_AVAILABLE_EP 1 -#define USBD1_INTERRUPT_REQUEST_EP 2 - -/* - * USB Device Descriptor. - */ -static const uint8_t vcom_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x02, /* bDeviceClass (CDC). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x5740, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor vcom_device_descriptor = { - sizeof vcom_device_descriptor_data, - vcom_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t vcom_configuration_descriptor_data[67] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(67, /* wTotalLength. */ - 0x02, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x01, /* bNumEndpoints. */ - 0x02, /* bInterfaceClass (Communications - Interface Class, CDC section - 4.2). */ - 0x02, /* bInterfaceSubClass (Abstract - Control Model, CDC section 4.3). */ - 0x01, /* bInterfaceProtocol (AT commands, - CDC section 4.4). */ - 0), /* iInterface. */ - /* Header Functional Descriptor (CDC section 5.2.3).*/ - USB_DESC_BYTE (5), /* bLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header - Functional Descriptor. */ - USB_DESC_BCD (0x0110), /* bcdCDC. */ - /* Call Management Functional Descriptor. */ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ - USB_DESC_BYTE (0x01), /* bDataInterface. */ - /* ACM Functional Descriptor.*/ - USB_DESC_BYTE (4), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract - Control Management Descriptor). */ - USB_DESC_BYTE (0x02), /* bmCapabilities. */ - /* Union Functional Descriptor.*/ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bMasterInterface (Communication - Class Interface). */ - USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class - Interface). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, - 0x03, /* bmAttributes (Interrupt). */ - 0x0008, /* wMaxPacketSize. */ - 0xFF), /* bInterval. */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x0A, /* bInterfaceClass (Data Class - Interface, CDC section 4.5). */ - 0x00, /* bInterfaceSubClass (CDC section - 4.6). */ - 0x00, /* bInterfaceProtocol (CDC section - 4.7). */ - 0x00), /* iInterface. */ - /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00) /* bInterval. */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor vcom_configuration_descriptor = { - sizeof vcom_configuration_descriptor_data, - vcom_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t vcom_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t vcom_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t vcom_string2[] = { - USB_DESC_BYTE(56), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, - 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, - 'o', 0, 'r', 0, 't', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t vcom_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor vcom_strings[] = { - {sizeof vcom_string0, vcom_string0}, - {sizeof vcom_string1, vcom_string1}, - {sizeof vcom_string2, vcom_string2}, - {sizeof vcom_string3, vcom_string3} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &vcom_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &vcom_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 4) - return &vcom_strings[dindex]; - } - return NULL; -} - -/** - * @brief IN EP1 state. - */ -static USBInEndpointState ep1instate; - -/** - * @brief OUT EP1 state. - */ -static USBOutEndpointState ep1outstate; - -/** - * @brief EP1 initialization structure (both IN and OUT). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK, - NULL, - sduDataTransmitted, - sduDataReceived, - 0x0040, - 0x0040, - &ep1instate, - &ep1outstate, - 2, - NULL -}; - -/** - * @brief IN EP2 state. - */ -static USBInEndpointState ep2instate; - -/** - * @brief EP2 initialization structure (IN only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR, - NULL, - sduInterruptTransmitted, - NULL, - 0x0010, - 0x0000, - &ep2instate, - NULL, - 1, - NULL -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - extern SerialUSBDriver SDU1; - - switch (event) { - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - chSysLockFromISR(); - - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); - - /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(&SDU1); - - chSysUnlockFromISR(); - return; - case USB_EVENT_RESET: - /* Falls into.*/ - case USB_EVENT_UNCONFIGURED: - /* Falls into.*/ - case USB_EVENT_SUSPEND: - chSysLockFromISR(); - - /* Disconnection event on suspend.*/ - sduSuspendHookI(&SDU1); - - chSysUnlockFromISR(); - return; - case USB_EVENT_WAKEUP: - chSysLockFromISR(); - - /* Connection event on wakeup.*/ - sduWakeupHookI(&SDU1); - - chSysUnlockFromISR(); - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * Handles the USB driver global events. - */ -static void sof_handler(USBDriver *usbp) { - - (void)usbp; - - osalSysLockFromISR(); - sduSOFHookI(&SDU1); - osalSysUnlockFromISR(); -} - -/* - * USB driver configuration. - */ -const USBConfig usbcfg = { - usb_event, - get_descriptor, - sduRequestsHook, - sof_handler -}; - -/* - * Serial over USB driver configuration. - */ -const SerialUSBConfig serusbcfg = { - &USBD1, - USBD1_DATA_REQUEST_EP, - USBD1_DATA_AVAILABLE_EP, - USBD1_INTERRUPT_REQUEST_EP -}; diff --git a/testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.h b/testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.h deleted file mode 100644 index 886cd0222..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS302DL/usbcfg.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef USBCFG_H -#define USBCFG_H - -extern const USBConfig usbcfg; -extern SerialUSBConfig serusbcfg; -extern SerialUSBDriver SDU1; - -#endif /* USBCFG_H */ - -/** @} */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS3DSH/cfg/mcuconf.h b/testex/STM32/STM32F4xx/SPI-LIS3DSH/cfg/mcuconf.h index 4651107c0..4539bf113 100644 --- a/testex/STM32/STM32F4xx/SPI-LIS3DSH/cfg/mcuconf.h +++ b/testex/STM32/STM32F4xx/SPI-LIS3DSH/cfg/mcuconf.h @@ -32,11 +32,18 @@ */ #define STM32F4xx_MCUCONF +#define STM32F405_MCUCONF +#define STM32F415_MCUCONF +#define STM32F407_MCUCONF +#define STM32F417_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -44,13 +51,13 @@ #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 4 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCPRE_VALUE 8 #define STM32_MCO1SEL STM32_MCO1SEL_HSI @@ -60,9 +67,6 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -87,10 +91,39 @@ */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) /* * GPT driver system settings. @@ -100,15 +133,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE #define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 #define STM32_GPT_TIM9_IRQ_PRIORITY 7 #define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -154,14 +197,27 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 #define STM32_ICU_TIM9_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ @@ -171,22 +227,49 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 #define STM32_PWM_TIM9_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_WRITE_TIMEOUT_MS 1000 +#define STM32_SDC_READ_TIMEOUT_MS 1000 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) + /* * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_USART6_PRIORITY 12 /* @@ -220,18 +303,33 @@ */ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 #define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") @@ -239,11 +337,12 @@ * USB driver system settings. */ #define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_USE_OTG2 FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/testex/STM32/STM32F4xx/SPI-LIS3DSH/chconf.h b/testex/STM32/STM32F4xx/SPI-LIS3DSH/chconf.h deleted file mode 100644 index 3d46e3045..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS3DSH/chconf.h +++ /dev/null @@ -1,714 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file rt/templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef CHCONF_H -#define CHCONF_H - -#define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_0_ - -/*===========================================================================*/ -/** - * @name System timers settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 -#endif - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_CFG_ST_FREQUENCY) -#define CH_CFG_ST_FREQUENCY 10000 -#endif - -/** - * @brief Time intervals data size. - * @note Allowed values are 16, 32 or 64 bits. - */ -#if !defined(CH_CFG_INTERVALS_SIZE) -#define CH_CFG_INTERVALS_SIZE 32 -#endif - -/** - * @brief Time types data size. - * @note Allowed values are 16 or 32 bits. - */ -#if !defined(CH_CFG_TIME_TYPES_SIZE) -#define CH_CFG_TIME_TYPES_SIZE 32 -#endif - -/** - * @brief Time delta constant for the tick-less mode. - * @note If this value is zero then the system uses the classic - * periodic tick. This value represents the minimum number - * of ticks that is safe to specify in a timeout directive. - * The value one is not valid, timeouts are rounded up to - * this value. - */ -#if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 2 -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - * @note The round robin preemption is not supported in tickless mode and - * must be set to zero in that case. - */ -#if !defined(CH_CFG_TIME_QUANTUM) -#define CH_CFG_TIME_QUANTUM 0 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_CFG_USE_MEMCORE. - */ -#if !defined(CH_CFG_MEMCORE_SIZE) -#define CH_CFG_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread. The application @p main() - * function becomes the idle thread and must implement an - * infinite loop. - */ -#if !defined(CH_CFG_NO_IDLE_THREAD) -#define CH_CFG_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_OPTIMIZE_SPEED) -#define CH_CFG_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Time Measurement APIs. - * @details If enabled then the time measurement APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TM) -#define CH_CFG_USE_TM TRUE -#endif - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_REGISTRY) -#define CH_CFG_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_WAITEXIT) -#define CH_CFG_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_SEMAPHORES) -#define CH_CFG_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) -#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MUTEXES) -#define CH_CFG_USE_MUTEXES TRUE -#endif - -/** - * @brief Enables recursive behavior on mutexes. - * @note Recursive mutexes are heavier and have an increased - * memory footprint. - * - * @note The default is @p FALSE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) -#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MUTEXES. - */ -#if !defined(CH_CFG_USE_CONDVARS) -#define CH_CFG_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_CONDVARS. - */ -#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) -#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_EVENTS) -#define CH_CFG_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_EVENTS. - */ -#if !defined(CH_CFG_USE_EVENTS_TIMEOUT) -#define CH_CFG_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MESSAGES) -#define CH_CFG_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special - * requirements. - * @note Requires @p CH_CFG_USE_MESSAGES. - */ -#if !defined(CH_CFG_USE_MESSAGES_PRIORITY) -#define CH_CFG_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_SEMAPHORES. - */ -#if !defined(CH_CFG_USE_MAILBOXES) -#define CH_CFG_USE_MAILBOXES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMCORE) -#define CH_CFG_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or - * @p CH_CFG_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_CFG_USE_HEAP) -#define CH_CFG_USE_HEAP TRUE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_MEMPOOLS) -#define CH_CFG_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Objects FIFOs APIs. - * @details If enabled then the objects FIFOs APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_OBJ_FIFOS) -#define CH_CFG_USE_OBJ_FIFOS TRUE -#endif - -/** - * @brief Pipes APIs. - * @details If enabled then the pipes APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_PIPES) -#define CH_CFG_USE_PIPES TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_CFG_USE_WAITEXIT. - * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. - */ -#if !defined(CH_CFG_USE_DYNAMIC) -#define CH_CFG_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Objects factory options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Objects Factory APIs. - * @details If enabled then the objects factory APIs are included in the - * kernel. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_CFG_USE_FACTORY) -#define CH_CFG_USE_FACTORY TRUE -#endif - -/** - * @brief Maximum length for object names. - * @details If the specified length is zero then the name is stored by - * pointer but this could have unintended side effects. - */ -#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) -#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 -#endif - -/** - * @brief Enables the registry of generic objects. - */ -#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) -#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE -#endif - -/** - * @brief Enables factory for generic buffers. - */ -#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) -#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE -#endif - -/** - * @brief Enables factory for semaphores. - */ -#if !defined(CH_CFG_FACTORY_SEMAPHORES) -#define CH_CFG_FACTORY_SEMAPHORES TRUE -#endif - -/** - * @brief Enables factory for mailboxes. - */ -#if !defined(CH_CFG_FACTORY_MAILBOXES) -#define CH_CFG_FACTORY_MAILBOXES TRUE -#endif - -/** - * @brief Enables factory for objects FIFOs. - */ -#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) -#define CH_CFG_FACTORY_OBJ_FIFOS TRUE -#endif - -/** - * @brief Enables factory for Pipes. - */ -#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) -#define CH_CFG_FACTORY_PIPES TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, kernel statistics. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_STATISTICS) -#define CH_DBG_STATISTICS FALSE -#endif - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the trace buffer is activated. - * - * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_MASK) -#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL -#endif - -/** - * @brief Trace buffer entries. - * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is - * different from @p CH_DBG_TRACE_MASK_DISABLED. - */ -#if !defined(CH_DBG_TRACE_BUFFER_SIZE) -#define CH_DBG_TRACE_BUFFER_SIZE 128 -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p thread_t structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p FALSE. - * @note This debug option is not currently compatible with the - * tickless mode. - */ -#if !defined(CH_DBG_THREADS_PROFILING) -#define CH_DBG_THREADS_PROFILING FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System structure extension. - * @details User fields added to the end of the @p ch_system_t structure. - */ -#define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief System initialization hook. - * @details User initialization code added to the @p chSysInit() function - * just before interrupts are enabled globally. - */ -#define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p thread_t structure. - */ -#define CH_CFG_THREAD_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p _thread_init() function. - * - * @note It is invoked from within @p _thread_init() and implicitly from all - * the threads creation APIs. - */ -#define CH_CFG_THREAD_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - */ -#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* Context switch code here.*/ \ -} - -/** - * @brief ISR enter hook. - */ -#define CH_CFG_IRQ_PROLOGUE_HOOK() { \ - /* IRQ prologue code here.*/ \ -} - -/** - * @brief ISR exit hook. - */ -#define CH_CFG_IRQ_EPILOGUE_HOOK() { \ - /* IRQ epilogue code here.*/ \ -} - -/** - * @brief Idle thread enter hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to activate a power saving mode. - */ -#define CH_CFG_IDLE_ENTER_HOOK() { \ - /* Idle-enter code here.*/ \ -} - -/** - * @brief Idle thread leave hook. - * @note This hook is invoked within a critical zone, no OS functions - * should be invoked from here. - * @note This macro can be used to deactivate a power saving mode. - */ -#define CH_CFG_IDLE_LEAVE_HOOK() { \ - /* Idle-leave code here.*/ \ -} - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#define CH_CFG_IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#define CH_CFG_SYSTEM_TICK_HOOK() { \ - /* System tick event code here.*/ \ -} - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ - /* System halt code here.*/ \ -} - -/** - * @brief Trace hook. - * @details This hook is invoked each time a new record is written in the - * trace buffer. - */ -#define CH_CFG_TRACE_HOOK(tep) { \ - /* Trace code here.*/ \ -} - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* CHCONF_H */ - -/** @} */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS3DSH/halconf.h b/testex/STM32/STM32F4xx/SPI-LIS3DSH/halconf.h deleted file mode 100644 index af1bea551..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS3DSH/halconf.h +++ /dev/null @@ -1,525 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef HALCONF_H -#define HALCONF_H - -#define _CHIBIOS_HAL_CONF_ -#define _CHIBIOS_HAL_CONF_VER_7_0_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the cryptographic subsystem. - */ -#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) -#define HAL_USE_CRY FALSE -#endif - -/** - * @brief Enables the DAC subsystem. - */ -#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) -#define HAL_USE_DAC FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the I2S subsystem. - */ -#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -#define HAL_USE_I2S FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE -#endif - -/** - * @brief Enables the SIO subsystem. - */ -#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) -#define HAL_USE_SIO FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the TRNG subsystem. - */ -#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) -#define HAL_USE_TRNG FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/** - * @brief Enables the WDG subsystem. - */ -#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) -#define HAL_USE_WDG FALSE -#endif - -/** - * @brief Enables the WSPI subsystem. - */ -#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) -#define HAL_USE_WSPI FALSE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) -#define PAL_USE_CALLBACKS FALSE -#endif - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) -#define PAL_USE_WAIT FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/** - * @brief Enforces the driver to use direct callbacks rather than OSAL events. - */ -#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) -#define CAN_ENFORCE_USE_CALLBACKS FALSE -#endif - -/*===========================================================================*/ -/* CRY driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SW fall-back of the cryptographic driver. - * @details When enabled, this option, activates a fall-back software - * implementation for algorithms not supported by the underlying - * hardware. - * @note Fall-back implementations may not be present for all algorithms. - */ -#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_USE_FALLBACK FALSE -#endif - -/** - * @brief Makes the driver forcibly use the fall-back implementations. - */ -#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) -#define HAL_CRY_ENFORCE_FALLBACK FALSE -#endif - -/*===========================================================================*/ -/* DAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) -#define DAC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define DAC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the zero-copy API. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/** - * @brief OCR initialization constant for V20 cards. - */ -#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) -#define SDC_INIT_OCR_V20 0x50FF8000U -#endif - -/** - * @brief OCR initialization constant for non-V20 cards. - */ -#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) -#define SDC_INIT_OCR 0x80100000U -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 16 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SERIAL_USB driver related setting. */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 256 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 256 -#endif - -/** - * @brief Serial over USB number of buffers. - * @note The default is 2 buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_NUMBER 2 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables circular transfers APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) -#define SPI_USE_CIRCULAR FALSE -#endif - - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/** - * @brief Handling method for SPI CS line. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) -#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) -#define UART_USE_WAIT FALSE -#endif - -/** - * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define UART_USE_MUTUAL_EXCLUSION FALSE -#endif - -/*===========================================================================*/ -/* USB driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) -#define USB_USE_WAIT FALSE -#endif - -/*===========================================================================*/ -/* WSPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) -#define WSPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define WSPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* HALCONF_H */ - -/** @} */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h b/testex/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h deleted file mode 100644 index dfa1c368a..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS3DSH/mcuconf.h +++ /dev/null @@ -1,346 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef MCUCONF_H -#define MCUCONF_H - -/* - * STM32F4xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F4xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_CLOCK48_REQUIRED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#if defined(BOARD_ST_STM32F4_DISCOVERY) -#define STM32_PLLM_VALUE 8 -#else -#define STM32_PLLM_VALUE 12 -#endif -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 2 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_RTCPRE_VALUE 8 -#define STM32_MCO1SEL STM32_MCO1SEL_HSI -#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 -#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2SSRC_CKIN -#define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE - -/* - * ADC driver system settings. - */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_USE_ADC2 FALSE -#define STM32_ADC_USE_ADC3 FALSE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC2_DMA_PRIORITY 2 -#define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_USE_CAN2 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 -#define STM32_CAN_CAN2_IRQ_PRIORITY 11 - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 FALSE -#define STM32_DAC_USE_DAC1_CH2 FALSE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM6 FALSE -#define STM32_GPT_USE_TIM7 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_BUSY_TIMEOUT 50 -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") - -/* - * I2S driver system settings. - */ -#define STM32_I2S_USE_SPI2 FALSE -#define STM32_I2S_USE_SPI3 FALSE -#define STM32_I2S_SPI2_IRQ_PRIORITY 10 -#define STM32_I2S_SPI3_IRQ_PRIORITY 10 -#define STM32_I2S_SPI2_DMA_PRIORITY 1 -#define STM32_I2S_SPI3_DMA_PRIORITY 1 -#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 - -/* - * MAC driver system settings. - */ -#define STM32_MAC_TRANSMIT_BUFFERS 2 -#define STM32_MAC_RECEIVE_BUFFERS 4 -#define STM32_MAC_BUFFERS_SIZE 1522 -#define STM32_MAC_PHY_TIMEOUT 100 -#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE -#define STM32_MAC_ETH1_IRQ_PRIORITY 13 -#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 - -/* - * SDC driver system settings. - */ -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 -#define STM32_SDC_WRITE_TIMEOUT_MS 1000 -#define STM32_SDC_READ_TIMEOUT_MS 1000 -#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 -#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE -#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") - -/* - * ST driver system settings. - */ -#define STM32_ST_IRQ_PRIORITY 8 -#define STM32_ST_USE_TIMER 2 - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USE_USART6 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_USART6_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_OTG1 TRUE -#define STM32_USB_USE_OTG2 FALSE -#define STM32_USB_OTG1_IRQ_PRIORITY 14 -#define STM32_USB_OTG2_IRQ_PRIORITY 14 -#define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - -/* - * WDG driver system settings. - */ -#define STM32_WDG_USE_IWDG FALSE - -#endif /* MCUCONF_H */ diff --git a/testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.c b/testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.c deleted file mode 100644 index f3e69c237..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "hal.h" - -/* Virtual serial port over USB.*/ -SerialUSBDriver SDU1; - -/* - * Endpoints to be used for USBD1. - */ -#define USBD1_DATA_REQUEST_EP 1 -#define USBD1_DATA_AVAILABLE_EP 1 -#define USBD1_INTERRUPT_REQUEST_EP 2 - -/* - * USB Device Descriptor. - */ -static const uint8_t vcom_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x02, /* bDeviceClass (CDC). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x5740, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor vcom_device_descriptor = { - sizeof vcom_device_descriptor_data, - vcom_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t vcom_configuration_descriptor_data[67] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(67, /* wTotalLength. */ - 0x02, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x01, /* bNumEndpoints. */ - 0x02, /* bInterfaceClass (Communications - Interface Class, CDC section - 4.2). */ - 0x02, /* bInterfaceSubClass (Abstract - Control Model, CDC section 4.3). */ - 0x01, /* bInterfaceProtocol (AT commands, - CDC section 4.4). */ - 0), /* iInterface. */ - /* Header Functional Descriptor (CDC section 5.2.3).*/ - USB_DESC_BYTE (5), /* bLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header - Functional Descriptor. */ - USB_DESC_BCD (0x0110), /* bcdCDC. */ - /* Call Management Functional Descriptor. */ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ - USB_DESC_BYTE (0x01), /* bDataInterface. */ - /* ACM Functional Descriptor.*/ - USB_DESC_BYTE (4), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract - Control Management Descriptor). */ - USB_DESC_BYTE (0x02), /* bmCapabilities. */ - /* Union Functional Descriptor.*/ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bMasterInterface (Communication - Class Interface). */ - USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class - Interface). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, - 0x03, /* bmAttributes (Interrupt). */ - 0x0008, /* wMaxPacketSize. */ - 0xFF), /* bInterval. */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x0A, /* bInterfaceClass (Data Class - Interface, CDC section 4.5). */ - 0x00, /* bInterfaceSubClass (CDC section - 4.6). */ - 0x00, /* bInterfaceProtocol (CDC section - 4.7). */ - 0x00), /* iInterface. */ - /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00) /* bInterval. */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor vcom_configuration_descriptor = { - sizeof vcom_configuration_descriptor_data, - vcom_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t vcom_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t vcom_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t vcom_string2[] = { - USB_DESC_BYTE(56), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, - 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, - 'o', 0, 'r', 0, 't', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t vcom_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor vcom_strings[] = { - {sizeof vcom_string0, vcom_string0}, - {sizeof vcom_string1, vcom_string1}, - {sizeof vcom_string2, vcom_string2}, - {sizeof vcom_string3, vcom_string3} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &vcom_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &vcom_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 4) - return &vcom_strings[dindex]; - } - return NULL; -} - -/** - * @brief IN EP1 state. - */ -static USBInEndpointState ep1instate; - -/** - * @brief OUT EP1 state. - */ -static USBOutEndpointState ep1outstate; - -/** - * @brief EP1 initialization structure (both IN and OUT). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK, - NULL, - sduDataTransmitted, - sduDataReceived, - 0x0040, - 0x0040, - &ep1instate, - &ep1outstate, - 2, - NULL -}; - -/** - * @brief IN EP2 state. - */ -static USBInEndpointState ep2instate; - -/** - * @brief EP2 initialization structure (IN only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR, - NULL, - sduInterruptTransmitted, - NULL, - 0x0010, - 0x0000, - &ep2instate, - NULL, - 1, - NULL -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - extern SerialUSBDriver SDU1; - - switch (event) { - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - chSysLockFromISR(); - - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); - - /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(&SDU1); - - chSysUnlockFromISR(); - return; - case USB_EVENT_RESET: - /* Falls into.*/ - case USB_EVENT_UNCONFIGURED: - /* Falls into.*/ - case USB_EVENT_SUSPEND: - chSysLockFromISR(); - - /* Disconnection event on suspend.*/ - sduSuspendHookI(&SDU1); - - chSysUnlockFromISR(); - return; - case USB_EVENT_WAKEUP: - chSysLockFromISR(); - - /* Connection event on wakeup.*/ - sduWakeupHookI(&SDU1); - - chSysUnlockFromISR(); - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * Handles the USB driver global events. - */ -static void sof_handler(USBDriver *usbp) { - - (void)usbp; - - osalSysLockFromISR(); - sduSOFHookI(&SDU1); - osalSysUnlockFromISR(); -} - -/* - * USB driver configuration. - */ -const USBConfig usbcfg = { - usb_event, - get_descriptor, - sduRequestsHook, - sof_handler -}; - -/* - * Serial over USB driver configuration. - */ -const SerialUSBConfig serusbcfg = { - &USBD1, - USBD1_DATA_REQUEST_EP, - USBD1_DATA_AVAILABLE_EP, - USBD1_INTERRUPT_REQUEST_EP -}; diff --git a/testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.h b/testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.h deleted file mode 100644 index 886cd0222..000000000 --- a/testex/STM32/STM32F4xx/SPI-LIS3DSH/usbcfg.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef USBCFG_H -#define USBCFG_H - -extern const USBConfig usbcfg; -extern SerialUSBConfig serusbcfg; -extern SerialUSBDriver SDU1; - -#endif /* USBCFG_H */ - -/** @} */ -- cgit v1.2.3