From 3846f18c1279ab30944e3dd63cc002379be6a5e1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 30 Mar 2010 17:35:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1815 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- docs/reports/STM32F103-72-ALT.txt | 156 ++++++++++++++++++++++++++++++++++++++ os/hal/platforms/STM32/hal_lld.c | 4 - os/ports/GCC/ARMCM3/chcore.h | 1 + os/ports/GCC/ARMCMx/chcore.h | 59 +++++++------- 4 files changed, 189 insertions(+), 31 deletions(-) create mode 100644 docs/reports/STM32F103-72-ALT.txt diff --git a/docs/reports/STM32F103-72-ALT.txt b/docs/reports/STM32F103-72-ALT.txt new file mode 100644 index 000000000..6bb59fccc --- /dev/null +++ b/docs/reports/STM32F103-72-ALT.txt @@ -0,0 +1,156 @@ +*************************************************************************** +Options: -O2 -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16 +Settings: SYSCLK=72, ACR=0x12 (2 wait states) +*************************************************************************** + +*** ChibiOS/RT test suite +*** +*** Kernel: 1.5.4unstable +*** GCC Version: 4.4.2 +*** Architecture: ARMv7-M +*** Core Variant: Cortex-M3 +*** Platform: STM32 +*** Test Board: Olimex STM32-P103 + +---------------------------------------------------------------------------- +--- Test Case 1.1 (Threads, enqueuing test #1) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Threads, enqueuing test #2) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Threads, priority change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.4 (Threads, delays) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.1 (Semaphores, enqueuing) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Semaphores, timeout) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Semaphores, atomic signal-wait) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.1 (Mutexes, priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Mutexes, priority inheritance, simple case) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.3 (Mutexes, priority inheritance, complex case) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.4 (Mutexes, priority return) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.5 (Mutexes, status) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.6 (CondVar, signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.7 (CondVar, broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.8 (CondVar, boost test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.1 (Messages, loop) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 5.1 (Mailboxes, queuing and timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.1 (Events, registration and dispatch) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Events, wait and broadcast) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Events, timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.1 (Heap, allocation and fragmentation test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.1 (Memory Pools, queue/dequeue) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.1 (Dynamic APIs, threads creation from heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.1 (Queues, input queues) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Queues, output queues) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.1 (Benchmark, messages #1) +--- Score : 252111 msgs/S, 504222 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Benchmark, messages #2) +--- Score : 200704 msgs/S, 401408 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Benchmark, messages #3) +--- Score : 200704 msgs/S, 401408 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Benchmark, context switch) +--- Score : 822344 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Benchmark, threads, full cycle) +--- Score : 156203 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Benchmark, threads, create only) +--- Score : 223839 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads) +--- Score : 62866 reschedules/S, 377196 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Benchmark, round robin context switching) +--- Score : 491292 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Benchmark, I/O Queues throughput) +--- Score : 471792 bytes/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Benchmark, virtual timers set/reset) +--- Score : 644466 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Benchmark, semaphores wait/signal) +--- Score : 895484 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (Benchmark, mutexes lock/unlock) +--- Score : 694320 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.13 (Benchmark, RAM footprint) +--- System: 324 bytes +--- Thread: 68 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- EventS: 4 bytes +--- EventL: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- Queue : 32 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index 817147026..a533b205c 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -73,10 +73,6 @@ const STM32GPIOConfig pal_default_config = */ void hal_lld_init(void) { - /* Note: PRIGROUP 4:0 (4:4).*/ - SCB->AIRCR = (0x05FA << SCB_AIRCR_VECTKEY_Pos) | - (3 << SCB_AIRCR_PRIGROUP_Pos); - /* SysTick initialization using the system clock.*/ SysTick->LOAD = SYSCLK / CH_FREQUENCY - 1; SysTick->VAL = 0; diff --git a/os/ports/GCC/ARMCM3/chcore.h b/os/ports/GCC/ARMCM3/chcore.h index a720d9ffb..e627d2302 100644 --- a/os/ports/GCC/ARMCM3/chcore.h +++ b/os/ports/GCC/ARMCM3/chcore.h @@ -362,6 +362,7 @@ struct context { * @brief Port-related initialization code. */ #define port_init() { \ + SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \ NVICSetSystemHandlerPriority(HANDLER_SVCALL, \ CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL)); \ NVICSetSystemHandlerPriority(HANDLER_PENDSV, \ diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h index d858a806d..aec560565 100644 --- a/os/ports/GCC/ARMCMx/chcore.h +++ b/os/ports/GCC/ARMCMx/chcore.h @@ -28,6 +28,8 @@ #ifndef _CHCORE_H_ #define _CHCORE_H_ +#include "nvic.h" + /*===========================================================================*/ /* Port constants. */ /*===========================================================================*/ @@ -257,13 +259,13 @@ struct context { * @details This code usually setup the context switching frame represented * by an @p intctx structure. */ -#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \ - tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \ - wsize - \ - sizeof(struct intctx)); \ - tp->p_ctx.r13->r4 = pf; \ - tp->p_ctx.r13->r5 = arg; \ - tp->p_ctx.r13->lr = _port_thread_start; \ +#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \ + tp->p_ctx.r13 = (struct intctx *)((uint8_t *)workspace + \ + wsize - \ + sizeof(struct intctx)); \ + tp->p_ctx.r13->r4 = pf; \ + tp->p_ctx.r13->r5 = arg; \ + tp->p_ctx.r13->lr = _port_thread_start; \ } /** @@ -299,9 +301,9 @@ struct context { /** * @brief Computes the thread working area global size. */ -#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \ - sizeof(struct intctx) + \ - sizeof(struct extctx) + \ +#define THD_WA_SIZE(n) STACK_ALIGN(sizeof(Thread) + \ + sizeof(struct intctx) + \ + sizeof(struct extctx) + \ (n) + (INT_REQUIRED_STACK)) /** @@ -316,10 +318,10 @@ struct context { * @details This macro must be inserted at the start of all IRQ handlers * enabled to invoke system APIs. */ -#define PORT_IRQ_PROLOGUE() { \ - chSysLockFromIsr(); \ - _port_irq_nesting++; \ - chSysUnlockFromIsr(); \ +#define PORT_IRQ_PROLOGUE() { \ + chSysLockFromIsr(); \ + _port_irq_nesting++; \ + chSysUnlockFromIsr(); \ } /** @@ -327,17 +329,17 @@ struct context { * @details This macro must be inserted at the end of all IRQ handlers * enabled to invoke system APIs. */ -#define PORT_IRQ_EPILOGUE() { \ - chSysLockFromIsr(); \ - if ((--_port_irq_nesting == 0) && chSchIsRescRequiredExI()) { \ - register struct cmxctx *ctxp asm ("r3"); \ - \ - asm volatile ("mrs %0, PSP" : "=r" (ctxp) : "r" (ctxp)); \ - _port_saved_pc = ctxp->pc; \ - ctxp->pc = _port_switch_from_irq; \ - return; \ - } \ - chSysUnlockFromIsr(); \ +#define PORT_IRQ_EPILOGUE() { \ + chSysLockFromIsr(); \ + if ((--_port_irq_nesting == 0) && chSchIsRescRequiredExI()) { \ + register struct cmxctx *ctxp asm ("r3"); \ + \ + asm volatile ("mrs %0, PSP" : "=r" (ctxp) : "r" (ctxp)); \ + _port_saved_pc = ctxp->pc; \ + ctxp->pc = _port_switch_from_irq; \ + return; \ + } \ + chSysUnlockFromIsr(); \ } /** @@ -350,8 +352,11 @@ struct context { /** * @brief Port-related initialization code. */ -#define port_init() { \ - _port_irq_nesting = 0; \ +#define port_init() { \ + _port_irq_nesting = 0; \ + SCB_AIRCR = AIRCR_VECTKEY | AIRCR_PRIGROUP(0); \ + NVICSetSystemHandlerPriority(HANDLER_SYSTICK, \ + CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SYSTICK)); \ } /** -- cgit v1.2.3