From 375f09131ac3648a448a4d5f1f3dcc8cc0304250 Mon Sep 17 00:00:00 2001 From: liamstask Date: Thu, 20 May 2010 03:10:20 +0000 Subject: * one more small typo, and provide the possibility to not specify valid values for #defines that are not used. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1942 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32/hal_lld_f105_f107.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/os/hal/platforms/STM32/hal_lld_f105_f107.h b/os/hal/platforms/STM32/hal_lld_f105_f107.h index a260703a6..dd16740c8 100644 --- a/os/hal/platforms/STM32/hal_lld_f105_f107.h +++ b/os/hal/platforms/STM32/hal_lld_f105_f107.h @@ -253,6 +253,9 @@ #error "invalid STM32_PLL2MUL_VALUE value specified" #endif +/* The following values are only used if PLL2 clock is selected as source + for the PLL clock */ +#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2) /** * @brief PLL2 input frequency. */ @@ -273,6 +276,8 @@ #error "STM32_PLL2CLKOUT outside acceptable range (40...74MHz)" #endif +#endif /* STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2 */ + /** * @brief PREDIV1 input frequency. */ @@ -376,7 +381,7 @@ #endif /* APB1 frequency check.*/ -#if STM32_PCLK2 > 36000000 +#if STM32_PCLK1 > 36000000 #error "STM32_PCLK1 exceeding maximum frequency (36MHz)" #endif -- cgit v1.2.3