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path: root/testhal/STM32/multi/SPI/cfg/stm32l4r5_nucleo144/mcuconf.h
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* Mass update for TIM-related changes.Giovanni Di Sirio2019-01-051-0/+11
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* Mass update of all drivers to use the new DMA API. What could possibly go wrong?Giovanni Di Sirio2019-01-021-27/+27
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* mcuconf.h files mass update.Giovanni Di Sirio2018-12-021-0/+8
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12412 ↵Giovanni Di Sirio2018-11-091-1/+1
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* Fixed a problem in L4+ PLLSAIx initialization, added options to mcuconf.h, ↵gdisirio2018-10-281-0/+15
| | | | | | updated mcuconf generator tool. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12397 110e8d01-0319-4d1e-a829-52ad28d1bb01
* Enabled TRNG on L4+.Giovanni Di Sirio2018-10-071-1/+6
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* Made L4+ mcuconf.h files more generic.Giovanni Di Sirio2018-10-061-0/+5
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* Added mcuconf.h generator for L476.Giovanni Di Sirio2018-09-231-0/+1
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* Removed unused settings.Giovanni Di Sirio2018-09-231-4/+0
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* USARTv2 made DMAMUX-aware.Giovanni Di Sirio2018-09-221-0/+29
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12269 ↵Giovanni Di Sirio2018-09-171-1/+0
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* DACv1 joins the club. More checks in ADCv3.Giovanni Di Sirio2018-09-161-0/+9
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* Adapted ADCv3 to STM32L4+.Giovanni Di Sirio2018-09-161-0/+6
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* Imported I2Cv3 driver in L4+ HAL.Giovanni Di Sirio2018-09-161-3/+20
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* SPI files for L4+, to be continued.Giovanni Di Sirio2018-09-151-0/+258
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12264 110e8d01-0319-4d1e-a829-52ad28d1bb01
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