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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10939 ↵Giovanni Di Sirio2017-11-041-14/+4
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* Fixed bug #879.Giovanni Di Sirio2017-08-251-5/+15
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10483 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Mass license update.Giovanni Di Sirio2016-03-181-1/+1
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9136 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Lines support in PAL driver.Giovanni Di Sirio2015-11-021-20/+15
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8417 35acf78f-673a-0410-8e92-d51de3d6d3f4
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8278 ↵gdisirio2015-09-041-15/+0
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* STM32F7-specific LD rules file introduced. Code is accessed through the ITCM ↵gdisirio2015-09-021-4/+0
| | | | | | bus, constants are accessed through AXI bus. Added DMA-friendly region handling. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8270 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Improved M7 cache handling.Giovanni Di Sirio2015-08-271-4/+4
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8246 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Added cache handling example for F7 ADC and SPI demos.Giovanni Di Sirio2015-08-261-21/+70
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8243 35acf78f-673a-0410-8e92-d51de3d6d3f4
* SPI working on F7 but cache handling unfinished.Giovanni Di Sirio2015-08-261-12/+15
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8241 35acf78f-673a-0410-8e92-d51de3d6d3f4
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8239 ↵Giovanni Di Sirio2015-08-231-0/+153
35acf78f-673a-0410-8e92-d51de3d6d3f4
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