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* PAL callbacks implementation for STM32, not complete yet.Giovanni Di Sirio2017-08-302-1/+173
| | | | git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10507 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Tentative fix for anomalous TC event from STM32 USARTv1 driver.Giovanni Di Sirio2017-08-281-4/+4
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* Minor changes in hal_spi_lld driveredolomb2017-08-281-8/+0
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* Added SPIv1 driveredolomb2017-08-283-0/+657
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* Included SPIv1 Driveredolomb2017-08-281-1/+1
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* Added pmc functions for SPIxedolomb2017-08-281-0/+29
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* Minor changes in sama_xdmac driveredolomb2017-08-252-16/+15
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* removed leftoverGiovanni Di Sirio2017-08-251-1/+0
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* Fixed bug #879.Giovanni Di Sirio2017-08-252-4/+7
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* Fixed bug #879.Giovanni Di Sirio2017-08-252-2/+2
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* Added control on callback callingedolomb2017-08-251-2/+2
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* Add tabulation.Theodore Ateba2017-08-241-3/+3
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* Added XDMAC driveredolomb2017-08-243-0/+593
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* Added pmc functions for XDMACxedolomb2017-08-241-2/+30
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* Added sama_xdmac.hedolomb2017-08-241-1/+1
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* Included DMAv1 Driveredolomb2017-08-241-1/+1
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* Added dmaInit()edolomb2017-08-241-1/+1
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* Fixed bug #878.Giovanni Di Sirio2017-08-241-5/+4
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* Fixed bug #877.Giovanni Di Sirio2017-08-241-1/+11
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* Fixed bug #876.Giovanni Di Sirio2017-08-241-0/+6
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* Fixed bug #874.Giovanni Di Sirio2017-08-221-2/+2
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* Fixed bug #873.Giovanni Di Sirio2017-08-221-6/+6
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* Tentative fix for L4 OTG.Giovanni Di Sirio2017-08-221-37/+39
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* Tentative workaround for L4 OTG driver.Giovanni Di Sirio2017-08-203-3/+14
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* Added check to verify that the matrix H64H32 clock ratio is compatible with ↵isiora2017-08-181-12/+15
| | | | | | master clock frequency. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10451 35acf78f-673a-0410-8e92-d51de3d6d3f4
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10450 ↵isiora2017-08-181-2/+3
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* Added matrix H64H32 clock ratio.isiora2017-08-171-0/+13
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* Added matrix clock ratio setting.isiora2017-08-171-2/+8
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* Fixed SAMA_PIT define. Now it includes the dependency on busses clock ratio.isiora2017-08-171-1/+1
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* Fixed compiler warning.isiora2017-08-161-4/+6
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* Added debug asserts.isiora2017-08-162-6/+17
| | | | | | | | Fixed slow clock select. Added mainf measurement Tested XT main clock. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10438 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Add LLD directory to the AVR XMEGA Low Level Drivers.Theodore Ateba2017-08-168-29/+29
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* Modify AVR XMEGA platform according the new architecture.Theodore Ateba2017-08-161-10/+10
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* Add low level driver directory and platfor for AVR MEGA.Theodore Ateba2017-08-1635-0/+0
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* Added acknowledgement of PIT and AIC interrupt.isiora2017-08-141-2/+2
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* Changed ST interrupt priority to 0, the lowest one.isiora2017-08-141-1/+1
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* Fixed disable/enable macro.isiora2017-08-141-4/+4
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* Fixed PLLA_MUL.isiora2017-08-141-1/+1
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* Added a macro to acknowledge the current interrupt.isiora2017-08-141-0/+8
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* Remove the not implemented TIM lld files.Theodore Ateba2017-08-136-1922/+0
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* Remove the not implemented USART lld files.Theodore Ateba2017-08-132-566/+0
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* Update AVR tiny platform path according the new architecture and correct ↵Theodore Ateba2017-08-131-6/+6
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10417 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Update the platform name and comments.Theodore Ateba2017-08-131-3/+3
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* Change the ATTiny GPIO files path according the new architecture and correct ↵Theodore Ateba2017-08-133-7/+8
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10415 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Change the ATTiny TIM files path according the new architecture and correct ↵Theodore Ateba2017-08-133-12/+12
| | | | | | comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10414 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Change the ATTiny USART files path according the new architecture and ↵Theodore Ateba2017-08-133-7/+7
| | | | | | correct comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10413 35acf78f-673a-0410-8e92-d51de3d6d3f4
* Update the AVR Tiny Architecture.Theodore Ateba2017-08-1322-2/+2
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* Fixed Bug #870Rocco Marco Guglielmi2017-08-131-1/+1
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* Fixed number of vectors for newer devices.Giovanni Di Sirio2017-08-121-1/+1
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* Added PIT implementation for ATSAMA5D2 (Still incomplete)Rocco Marco Guglielmi2017-08-112-0/+50
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generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 21:45:27 +0000