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* Fixed ID number 1 and 73 as per datasheet errata.isiora2018-04-131-7/+3
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* Added ID_PMC and ID_RSTCedolomb2018-04-131-0/+2
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* Added ID_PMC and ID_RSTCedolomb2018-04-131-0/+2
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* Fixed bug #935.Giovanni Di Sirio2018-04-1311-108/+109
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* Re-added temporary Aes wrapperedolomb2018-04-111-1/+6
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* STM32L4+ preliminary work.Giovanni Di Sirio2018-04-041-3/+12
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* Fixed a problem in the new clean rule.Giovanni Di Sirio2018-03-236-24/+60
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11832 ↵isiora2018-03-211-0/+46
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* update hal crypto sha lld, added integration with wolfcryptareviu2018-03-191-6/+0
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* Changed domains in TLB from 'manager' to 'client' in order to enable the ↵isiora2018-03-151-27/+27
| | | | | | section permission in the MMU table. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11773 110e8d01-0319-4d1e-a829-52ad28d1bb01
* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11729 ↵Giovanni Di Sirio2018-03-136-11/+17
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* Changed domains in TLB from 'manager' to 'client' in order to enable the ↵isiora2018-03-081-27/+27
| | | | | | section permission in the MMU table. git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11651 110e8d01-0319-4d1e-a829-52ad28d1bb01
* Aligned SPC5 GHS linker scripts.Giovanni Di Sirio2018-03-0812-180/+54
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* New memory layout.isiora2018-03-071-2/+2
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* Default ARM_ENABLE_WFI_IDLE to FALSE.isiora2018-03-071-1/+1
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* New memory layout.isiora2018-03-071-2/+2
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* Added option to enable L2.isiora2018-02-271-0/+13
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* Small changes.isiora2018-02-271-7/+7
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* Added option to enable L2.isiora2018-02-271-0/+2
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* Cleanup interworking code.isiora2018-02-273-31/+6
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* Added option to enable L2.isiora2018-02-272-26/+13
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* Cleanup interworking code.isiora2018-02-273-30/+6
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* Added temporary Aes wrapperedolomb2018-02-261-1/+5
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* Minor changesedolomb2018-02-261-1/+2
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* Commented inclusionedolomb2018-02-161-1/+1
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* Commented inclusionedolomb2018-02-161-1/+1
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11478 ↵Giovanni Di Sirio2018-02-111-1/+0
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* Fixed bug #916.Giovanni Di Sirio2018-02-071-0/+9
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* Fixed small problem in unhandled exceptions handler.Giovanni Di Sirio2018-02-051-1/+2
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11401 ↵isiora2018-01-241-0/+2
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11400 ↵isiora2018-01-241-0/+2
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* Added entries and demo for STM32F7x2/F7x3 support.Giovanni Di Sirio2018-01-222-1/+138
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11383 ↵isiora2018-01-202-8/+0
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11382 ↵isiora2018-01-201-2/+0
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11381 ↵isiora2018-01-202-8/+0
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11380 ↵isiora2018-01-201-2/+0
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* Mass update of the Apache 2.0 license statement.Giovanni Di Sirio2018-01-20179-1884/+1884
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* Mass update of GPL license statement.Giovanni Di Sirio2018-01-204-4/+4
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* Minor changes.isiora2018-01-181-0/+43
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11325 ↵isiora2018-01-181-0/+43
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* Minor changes.isiora2018-01-181-2/+2
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* Minor changes.isiora2018-01-182-3/+2
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* Added monitor stack initialization.isiora2018-01-182-1/+8
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* Added monitor stack initialization.isiora2018-01-181-1/+7
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* Minor changes.isiora2018-01-181-0/+12
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* Added mmu.isiora2018-01-182-0/+484
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* Fixed ARM_IRQ_VECTOR_REG address.isiora2018-01-181-2/+2
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* Added SMC related sources.isiora2018-01-181-2/+4
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* Added call to __core_init.isiora2018-01-181-0/+3
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11297 ↵edolomb2018-01-161-9/+0
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