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* Removed EXTIv1 from the STM32 platform files.Giovanni Di Sirio2018-02-2011-11/+0
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* AVR: Add testhal watchdog demo code.tfateba2018-02-196-0/+1582
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* AVR: Add the support of the Watchdog low level driver to the XMEGA128A4U.Theodore Ateba2018-02-193-0/+416
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* AVR: Add watchdog to the platform driver file.Theodore Ateba2018-02-191-0/+1
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* AVR: Correct a bad comment, and the description and remove a wrong details.Theodore Ateba2018-02-191-5/+3
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* AVR: Correct the file name.Theodore Ateba2018-02-191-1/+1
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* AVR: Add a testhal demo for XMEGA128U4A for OSLIB test suite.Theodore Ateba2018-02-196-0/+1614
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* Removed EXTIv1 from STM32/LLD.Giovanni Di Sirio2018-02-194-426/+0
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* Added demo SPI with Flexcomedolomb2018-02-1611-0/+1812
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* Changed CH_DBG_THREADS_PROFILING at FALSEedolomb2018-02-161-1/+1
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* Commented inclusionedolomb2018-02-161-1/+1
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* Commented inclusionedolomb2018-02-161-1/+1
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* Added SAMA5D28 platform nameedolomb2018-02-161-0/+3
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11500 ↵edolomb2018-02-161-6/+6
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* XDMAC0 is SECURE and XDMAC1 is NOT SECUREedolomb2018-02-162-114/+76
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* Improved TC handling in STM32 USART drivers.Giovanni Di Sirio2018-02-161-3/+4
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* AVR: Add a testhal demo for XMEGA128U4A to test the SERIAL low level driver.Theodore Ateba2018-02-126-0/+1615
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* AVR: Add a testhal demo for XMEGA128U4A to test the USART low level driver.Theodore Ateba2018-02-126-0/+1619
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* AVR: Add USART and SERIAL low level driver to the platform description file.Theodore Ateba2018-02-121-0/+1
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* AVR: Add driver.mk file for Usarts and Serials drivers.Theodore Ateba2018-02-121-0/+13
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* AVR: Add serial low level driver for ATXMEGA128U4A.Theodore Ateba2018-02-122-0/+1033
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* AVR: Add usart low level driver for ATXMEGA128U4A.Theodore Ateba2018-02-122-0/+931
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* -Removed macroedolomb2018-02-122-3/+3
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* Removed macroedolomb2018-02-121-2/+2
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* SAMA5D2-SPI now runs in DDRAMedolomb2018-02-123-144/+201
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* SAMA5D2-SERIAL now runs in DDR using FLEXCOM0 as serialedolomb2018-02-127-42/+107
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* Last minute fixes.Giovanni Di Sirio2018-02-119-4994/+4859
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* git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11478 ↵Giovanni Di Sirio2018-02-111-1/+0
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* More reports.Giovanni Di Sirio2018-02-115-385/+661
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* Modified launch configurations to use OPENOCD env var.Giovanni Di Sirio2018-02-113-22/+19
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* MISRA-related changes.Giovanni Di Sirio2018-02-1020-58/+71
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* MISRA-related fixes.Giovanni Di Sirio2018-02-101-31/+36
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* MISRA-related fixes.gdisirio2018-02-104-4/+4
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* MISRA-related changes.Giovanni Di Sirio2018-02-104-8/+22
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* RT MISRA reports.Giovanni Di Sirio2018-02-072-9/+9
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* Fixed bug #917.Giovanni Di Sirio2018-02-074-3/+4
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* Fixed bug #916.Giovanni Di Sirio2018-02-072-1/+12
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* MISRA-related fixes.Giovanni Di Sirio2018-02-062-0/+7
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* Fixed instances of systime_t used as intervals.Giovanni Di Sirio2018-02-061-4/+4
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* Syntax error with events disabled.Giovanni Di Sirio2018-02-061-2/+3
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* MISRA-related fixes.Giovanni Di Sirio2018-02-065-27/+43
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* Fixed an error message.Giovanni Di Sirio2018-02-061-2/+2
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* Added more test configurations.Giovanni Di Sirio2018-02-062-0/+7
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* MISRA-related fixes.Giovanni Di Sirio2018-02-061-0/+2
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* MISRA-related fixes.Giovanni Di Sirio2018-02-066-25/+23
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* Fixed test case to work with simulators.Giovanni Di Sirio2018-02-063-3/+3
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* Added OpenOCD on ICDI launch configuration under toolsroccomarco2018-02-051-0/+10
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* Improved launch configuration for OpenOCDRocco Marco Guglielmi2018-02-052-0/+10
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* Improved launch configurations for OpenOCDRocco Marco Guglielmi2018-02-055-36/+11
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* Improved ST/MEMS documentation. Completely fixed Bug #915Rocco Marco Guglielmi2018-02-059-13/+19
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generated by cgit v1.2.3 (git 2.25.1) at 2024-11-03 02:09:02 +0000