diff options
Diffstat (limited to 'testhal/STM32')
| -rw-r--r-- | testhal/STM32/STM32F0xx/SPI/debug/STM32F0xx-SPI (OpenOCD, Flash and Run).launch | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/.cproject | 52 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/.project | 38 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/Makefile | 213 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/chconf.h | 520 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/debug/STM32F0xx-WDG (OpenOCD, Flash and Run).launch | 52 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/halconf.h | 388 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/main.c | 58 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/mcuconf.h | 200 | ||||
| -rw-r--r-- | testhal/STM32/STM32F0xx/WDG/readme.txt | 30 | 
10 files changed, 1552 insertions, 1 deletions
| diff --git a/testhal/STM32/STM32F0xx/SPI/debug/STM32F0xx-SPI (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F0xx/SPI/debug/STM32F0xx-SPI (OpenOCD, Flash and Run).launch index 2fc48a3c1..767a774f0 100644 --- a/testhal/STM32/STM32F0xx/SPI/debug/STM32F0xx-SPI (OpenOCD, Flash and Run).launch +++ b/testhal/STM32/STM32F0xx/SPI/debug/STM32F0xx-SPI (OpenOCD, Flash and Run).launch @@ -33,7 +33,7 @@  <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
  <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
  <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 -<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="CR2-adc-adcp-adc_lld_start_conversion-(format)" val="4"/><content id="CR2-adc-null-port_wait_for_interrupt-(format)" val="4"/><content id="cr2-adc_lld_start_conversion-(format)" val="4"/></contentList>"/>
 +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="cr2-adc_lld_start_conversion-(format)" val="4"/><content id="CR2-adc-null-port_wait_for_interrupt-(format)" val="4"/><content id="CR2-adc-adcp-adc_lld_start_conversion-(format)" val="4"/></contentList>"/>
  <stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<globalVariableList/>
"/>
  <stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<memoryBlockExpressionList/>
"/>
  <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
 diff --git a/testhal/STM32/STM32F0xx/WDG/.cproject b/testhal/STM32/STM32F0xx/WDG/.cproject new file mode 100644 index 000000000..c19bcb65c --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/.cproject @@ -0,0 +1,52 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 +<?fileVersion 4.0.0?>
 +
 +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
 +	<storageModule moduleId="org.eclipse.cdt.core.settings">
 +		<cconfiguration id="0.691815652">
 +			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.691815652" moduleId="org.eclipse.cdt.core.settings" name="Default">
 +				<externalSettings/>
 +				<extensions>
 +					<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 +				</extensions>
 +			</storageModule>
 +			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 +				<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.691815652" name="Default" parent="org.eclipse.cdt.build.core.prefbase.cfg">
 +					<folderInfo id="0.691815652." name="/" resourcePath="">
 +						<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.884342386" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
 +							<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.884342386.339777752" name=""/>
 +							<builder id="org.eclipse.cdt.build.core.settings.default.builder.1729138099" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.libs.146870087" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.605490810" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
 +								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.2132469247" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
 +							</tool>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.936236661" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
 +								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1782745250" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
 +							</tool>
 +							<tool id="org.eclipse.cdt.build.core.settings.holder.670706928" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
 +								<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.417510158" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
 +							</tool>
 +						</toolChain>
 +					</folderInfo>
 +				</configuration>
 +			</storageModule>
 +			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
 +		</cconfiguration>
 +	</storageModule>
 +	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
 +		<project id="STM32F0xx-WDG.null.219011718" name="STM32F0xx-WDG"/>
 +	</storageModule>
 +	<storageModule moduleId="scannerConfiguration">
 +		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
 +		<scannerConfigBuildInfo instanceId="0.691815652">
 +			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
 +		</scannerConfigBuildInfo>
 +	</storageModule>
 +	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
 +	<storageModule moduleId="refreshScope"/>
 +</cproject>
 diff --git a/testhal/STM32/STM32F0xx/WDG/.project b/testhal/STM32/STM32F0xx/WDG/.project new file mode 100644 index 000000000..af8c09587 --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/.project @@ -0,0 +1,38 @@ +<?xml version="1.0" encoding="UTF-8"?>
 +<projectDescription>
 +	<name>STM32F0xx-WDG</name>
 +	<comment></comment>
 +	<projects>
 +	</projects>
 +	<buildSpec>
 +		<buildCommand>
 +			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
 +			<triggers>clean,full,incremental,</triggers>
 +			<arguments>
 +			</arguments>
 +		</buildCommand>
 +		<buildCommand>
 +			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
 +			<triggers>full,incremental,</triggers>
 +			<arguments>
 +			</arguments>
 +		</buildCommand>
 +	</buildSpec>
 +	<natures>
 +		<nature>org.eclipse.cdt.core.cnature</nature>
 +		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
 +		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
 +	</natures>
 +	<linkedResources>
 +		<link>
 +			<name>board</name>
 +			<type>2</type>
 +			<locationURI>CHIBIOS/os/hal/boards/ST_STM32F0_DISCOVERY</locationURI>
 +		</link>
 +		<link>
 +			<name>os</name>
 +			<type>2</type>
 +			<locationURI>CHIBIOS/os</locationURI>
 +		</link>
 +	</linkedResources>
 +</projectDescription>
 diff --git a/testhal/STM32/STM32F0xx/WDG/Makefile b/testhal/STM32/STM32F0xx/WDG/Makefile new file mode 100644 index 000000000..c754ff09d --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/Makefile @@ -0,0 +1,213 @@ +##############################################################################
 +# Build global options
 +# NOTE: Can be overridden externally.
 +#
 +
 +# Compiler options here.
 +ifeq ($(USE_OPT),)
 +  USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
 +endif
 +
 +# C specific options here (added to USE_OPT).
 +ifeq ($(USE_COPT),)
 +  USE_COPT = 
 +endif
 +
 +# C++ specific options here (added to USE_OPT).
 +ifeq ($(USE_CPPOPT),)
 +  USE_CPPOPT = -fno-rtti
 +endif
 +
 +# Enable this if you want the linker to remove unused code and data
 +ifeq ($(USE_LINK_GC),)
 +  USE_LINK_GC = yes
 +endif
 +
 +# Linker extra options here.
 +ifeq ($(USE_LDOPT),)
 +  USE_LDOPT = 
 +endif
 +
 +# Enable this if you want link time optimizations (LTO)
 +ifeq ($(USE_LTO),)
 +  USE_LTO = yes
 +endif
 +
 +# If enabled, this option allows to compile the application in THUMB mode.
 +ifeq ($(USE_THUMB),)
 +  USE_THUMB = yes
 +endif
 +
 +# Enable this if you want to see the full log while compiling.
 +ifeq ($(USE_VERBOSE_COMPILE),)
 +  USE_VERBOSE_COMPILE = no
 +endif
 +
 +# If enabled, this option makes the build process faster by not compiling
 +# modules not used in the current configuration.
 +ifeq ($(USE_SMART_BUILD),)
 +  USE_SMART_BUILD = yes
 +endif
 +
 +#
 +# Build global options
 +##############################################################################
 +
 +##############################################################################
 +# Architecture or project specific options
 +#
 +
 +# Stack size to be allocated to the Cortex-M process stack. This stack is
 +# the stack used by the main() thread.
 +ifeq ($(USE_PROCESS_STACKSIZE),)
 +  USE_PROCESS_STACKSIZE = 0x200
 +endif
 +
 +# Stack size to the allocated to the Cortex-M main/exceptions stack. This
 +# stack is used for processing interrupts and exceptions.
 +ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
 +  USE_EXCEPTIONS_STACKSIZE = 0x400
 +endif
 +
 +#
 +# Architecture or project specific options
 +##############################################################################
 +
 +##############################################################################
 +# Project, sources and paths
 +#
 +
 +# Define project name here
 +PROJECT = ch
 +
 +# Imported source files and paths
 +CHIBIOS = ../../../..
 +# Startup files.
 +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk
 +# HAL-OSAL files (optional).
 +include $(CHIBIOS)/os/hal/hal.mk
 +include $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/platform.mk
 +include $(CHIBIOS)/os/hal/boards/ST_STM32F0_DISCOVERY/board.mk
 +include $(CHIBIOS)/os/hal/osal/rt/osal.mk
 +# RTOS files (optional).
 +include $(CHIBIOS)/os/rt/rt.mk
 +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk
 +# Other files (optional).
 +#include $(CHIBIOS)/test/rt/test.mk
 +
 +# Define linker script file here
 +LDSCRIPT= $(STARTUPLD)/STM32F051x8.ld
 +
 +# C sources that can be compiled in ARM or THUMB mode depending on the global
 +# setting.
 +CSRC = $(STARTUPSRC) \
 +       $(KERNSRC) \
 +       $(PORTSRC) \
 +       $(OSALSRC) \
 +       $(HALSRC) \
 +       $(PLATFORMSRC) \
 +       $(BOARDSRC) \
 +       $(TESTSRC) \
 +       main.c
 +
 +# C++ sources that can be compiled in ARM or THUMB mode depending on the global
 +# setting.
 +CPPSRC =
 +
 +# C sources to be compiled in ARM mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +ACSRC =
 +
 +# C++ sources to be compiled in ARM mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +ACPPSRC =
 +
 +# C sources to be compiled in THUMB mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +TCSRC =
 +
 +# C sources to be compiled in THUMB mode regardless of the global setting.
 +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
 +#       option that results in lower performance and larger code size.
 +TCPPSRC =
 +
 +# List ASM source files here
 +ASMSRC =
 +ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
 +
 +INCDIR = $(CHIBIOS)/os/license \
 +         $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
 +         $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
 +         $(CHIBIOS)/os/various
 +
 +#
 +# Project, sources and paths
 +##############################################################################
 +
 +##############################################################################
 +# Compiler settings
 +#
 +
 +MCU  = cortex-m0
 +
 +#TRGT = arm-elf-
 +TRGT = arm-none-eabi-
 +CC   = $(TRGT)gcc
 +CPPC = $(TRGT)g++
 +# Enable loading with g++ only if you need C++ runtime support.
 +# NOTE: You can use C++ even without C++ support if you are careful. C++
 +#       runtime support makes code size explode.
 +LD   = $(TRGT)gcc
 +#LD   = $(TRGT)g++
 +CP   = $(TRGT)objcopy
 +AS   = $(TRGT)gcc -x assembler-with-cpp
 +AR   = $(TRGT)ar
 +OD   = $(TRGT)objdump
 +SZ   = $(TRGT)size
 +HEX  = $(CP) -O ihex
 +BIN  = $(CP) -O binary
 +
 +# ARM-specific options here
 +AOPT =
 +
 +# THUMB-specific options here
 +TOPT = -mthumb -DTHUMB
 +
 +# Define C warning options here
 +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
 +
 +# Define C++ warning options here
 +CPPWARN = -Wall -Wextra -Wundef
 +
 +#
 +# Compiler settings
 +##############################################################################
 +
 +##############################################################################
 +# Start of user section
 +#
 +
 +# List all user C define here, like -D_DEBUG=1
 +UDEFS =
 +
 +# Define ASM defines here
 +UADEFS =
 +
 +# List all user directories here
 +UINCDIR =
 +
 +# List the user directory to look for the libraries here
 +ULIBDIR =
 +
 +# List all user libraries here
 +ULIBS =
 +
 +#
 +# End of user defines
 +##############################################################################
 +
 +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
 +include $(RULESPATH)/rules.mk
 diff --git a/testhal/STM32/STM32F0xx/WDG/chconf.h b/testhal/STM32/STM32F0xx/WDG/chconf.h new file mode 100644 index 000000000..c2d6f0496 --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/chconf.h @@ -0,0 +1,520 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +/**
 + * @file    templates/chconf.h
 + * @brief   Configuration file template.
 + * @details A copy of this file must be placed in each project directory, it
 + *          contains the application specific kernel settings.
 + *
 + * @addtogroup config
 + * @details Kernel related settings and hooks.
 + * @{
 + */
 +
 +#ifndef CHCONF_H
 +#define CHCONF_H
 +
 +#define _CHIBIOS_RT_CONF_
 +
 +/*===========================================================================*/
 +/**
 + * @name System timers settings
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   System time counter resolution.
 + * @note    Allowed values are 16 or 32 bits.
 + */
 +#define CH_CFG_ST_RESOLUTION                32
 +
 +/**
 + * @brief   System tick frequency.
 + * @details Frequency of the system timer that drives the system ticks. This
 + *          setting also defines the system tick time unit.
 + */
 +#define CH_CFG_ST_FREQUENCY                 10000
 +
 +/**
 + * @brief   Time delta constant for the tick-less mode.
 + * @note    If this value is zero then the system uses the classic
 + *          periodic tick. This value represents the minimum number
 + *          of ticks that is safe to specify in a timeout directive.
 + *          The value one is not valid, timeouts are rounded up to
 + *          this value.
 + */
 +#define CH_CFG_ST_TIMEDELTA                 2
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Kernel parameters and options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Round robin interval.
 + * @details This constant is the number of system ticks allowed for the
 + *          threads before preemption occurs. Setting this value to zero
 + *          disables the preemption for threads with equal priority and the
 + *          round robin becomes cooperative. Note that higher priority
 + *          threads can still preempt, the kernel is always preemptive.
 + * @note    Disabling the round robin preemption makes the kernel more compact
 + *          and generally faster.
 + * @note    The round robin preemption is not supported in tickless mode and
 + *          must be set to zero in that case.
 + */
 +#define CH_CFG_TIME_QUANTUM                 0
 +
 +/**
 + * @brief   Managed RAM size.
 + * @details Size of the RAM area to be managed by the OS. If set to zero
 + *          then the whole available RAM is used. The core memory is made
 + *          available to the heap allocator and/or can be used directly through
 + *          the simplified core memory allocator.
 + *
 + * @note    In order to let the OS manage the whole RAM the linker script must
 + *          provide the @p __heap_base__ and @p __heap_end__ symbols.
 + * @note    Requires @p CH_CFG_USE_MEMCORE.
 + */
 +#define CH_CFG_MEMCORE_SIZE                 0
 +
 +/**
 + * @brief   Idle thread automatic spawn suppression.
 + * @details When this option is activated the function @p chSysInit()
 + *          does not spawn the idle thread. The application @p main()
 + *          function becomes the idle thread and must implement an
 + *          infinite loop.
 + */
 +#define CH_CFG_NO_IDLE_THREAD               FALSE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Performance options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   OS optimization.
 + * @details If enabled then time efficient rather than space efficient code
 + *          is used when two possible implementations exist.
 + *
 + * @note    This is not related to the compiler optimization options.
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_OPTIMIZE_SPEED               TRUE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Subsystem options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Time Measurement APIs.
 + * @details If enabled then the time measurement APIs are included in
 + *          the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_TM                       FALSE
 +
 +/**
 + * @brief   Threads registry APIs.
 + * @details If enabled then the registry APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_REGISTRY                 TRUE
 +
 +/**
 + * @brief   Threads synchronization APIs.
 + * @details If enabled then the @p chThdWait() function is included in
 + *          the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_WAITEXIT                 TRUE
 +
 +/**
 + * @brief   Semaphores APIs.
 + * @details If enabled then the Semaphores APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_SEMAPHORES               TRUE
 +
 +/**
 + * @brief   Semaphores queuing mode.
 + * @details If enabled then the threads are enqueued on semaphores by
 + *          priority rather than in FIFO order.
 + *
 + * @note    The default is @p FALSE. Enable this if you have special
 + *          requirements.
 + * @note    Requires @p CH_CFG_USE_SEMAPHORES.
 + */
 +#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
 +
 +/**
 + * @brief   Mutexes APIs.
 + * @details If enabled then the mutexes APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MUTEXES                  TRUE
 +
 +/**
 + * @brief   Enables recursive behavior on mutexes.
 + * @note    Recursive mutexes are heavier and have an increased
 + *          memory footprint.
 + *
 + * @note    The default is @p FALSE.
 + * @note    Requires @p CH_CFG_USE_MUTEXES.
 + */
 +#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
 +
 +/**
 + * @brief   Conditional Variables APIs.
 + * @details If enabled then the conditional variables APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_MUTEXES.
 + */
 +#define CH_CFG_USE_CONDVARS                 TRUE
 +
 +/**
 + * @brief   Conditional Variables APIs with timeout.
 + * @details If enabled then the conditional variables APIs with timeout
 + *          specification are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_CONDVARS.
 + */
 +#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
 +
 +/**
 + * @brief   Events Flags APIs.
 + * @details If enabled then the event flags APIs are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_EVENTS                   TRUE
 +
 +/**
 + * @brief   Events Flags APIs with timeout.
 + * @details If enabled then the events APIs with timeout specification
 + *          are included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_EVENTS.
 + */
 +#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
 +
 +/**
 + * @brief   Synchronous Messages APIs.
 + * @details If enabled then the synchronous messages APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MESSAGES                 TRUE
 +
 +/**
 + * @brief   Synchronous Messages queuing mode.
 + * @details If enabled then messages are served by priority rather than in
 + *          FIFO order.
 + *
 + * @note    The default is @p FALSE. Enable this if you have special
 + *          requirements.
 + * @note    Requires @p CH_CFG_USE_MESSAGES.
 + */
 +#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
 +
 +/**
 + * @brief   Mailboxes APIs.
 + * @details If enabled then the asynchronous messages (mailboxes) APIs are
 + *          included in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_SEMAPHORES.
 + */
 +#define CH_CFG_USE_MAILBOXES                TRUE
 +
 +/**
 + * @brief   Core Memory Manager APIs.
 + * @details If enabled then the core memory manager APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MEMCORE                  TRUE
 +
 +/**
 + * @brief   Heap Allocator APIs.
 + * @details If enabled then the memory heap allocator APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
 + *          @p CH_CFG_USE_SEMAPHORES.
 + * @note    Mutexes are recommended.
 + */
 +#define CH_CFG_USE_HEAP                     TRUE
 +
 +/**
 + * @brief   Memory Pools Allocator APIs.
 + * @details If enabled then the memory pools allocator APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + */
 +#define CH_CFG_USE_MEMPOOLS                 TRUE
 +
 +/**
 + * @brief   Dynamic Threads APIs.
 + * @details If enabled then the dynamic threads creation APIs are included
 + *          in the kernel.
 + *
 + * @note    The default is @p TRUE.
 + * @note    Requires @p CH_CFG_USE_WAITEXIT.
 + * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
 + */
 +#define CH_CFG_USE_DYNAMIC                  TRUE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Debug options
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Debug option, kernel statistics.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_STATISTICS                   FALSE
 +
 +/**
 + * @brief   Debug option, system state check.
 + * @details If enabled the correct call protocol for system APIs is checked
 + *          at runtime.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_SYSTEM_STATE_CHECK           TRUE
 +
 +/**
 + * @brief   Debug option, parameters checks.
 + * @details If enabled then the checks on the API functions input
 + *          parameters are activated.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_ENABLE_CHECKS                TRUE
 +
 +/**
 + * @brief   Debug option, consistency checks.
 + * @details If enabled then all the assertions in the kernel code are
 + *          activated. This includes consistency checks inside the kernel,
 + *          runtime anomalies and port-defined checks.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_ENABLE_ASSERTS               TRUE
 +
 +/**
 + * @brief   Debug option, trace buffer.
 + * @details If enabled then the trace buffer is activated.
 + *
 + * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
 + */
 +#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_ALL
 +
 +/**
 + * @brief   Trace buffer entries.
 + * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
 + *          different from @p CH_DBG_TRACE_MASK_DISABLED.
 + */
 +#define CH_DBG_TRACE_BUFFER_SIZE            128
 +
 +/**
 + * @brief   Debug option, stack checks.
 + * @details If enabled then a runtime stack check is performed.
 + *
 + * @note    The default is @p FALSE.
 + * @note    The stack check is performed in a architecture/port dependent way.
 + *          It may not be implemented or some ports.
 + * @note    The default failure mode is to halt the system with the global
 + *          @p panic_msg variable set to @p NULL.
 + */
 +#define CH_DBG_ENABLE_STACK_CHECK           TRUE
 +
 +/**
 + * @brief   Debug option, stacks initialization.
 + * @details If enabled then the threads working area is filled with a byte
 + *          value when a thread is created. This can be useful for the
 + *          runtime measurement of the used stack.
 + *
 + * @note    The default is @p FALSE.
 + */
 +#define CH_DBG_FILL_THREADS                 TRUE
 +
 +/**
 + * @brief   Debug option, threads profiling.
 + * @details If enabled then a field is added to the @p thread_t structure that
 + *          counts the system ticks occurred while executing the thread.
 + *
 + * @note    The default is @p FALSE.
 + * @note    This debug option is not currently compatible with the
 + *          tickless mode.
 + */
 +#define CH_DBG_THREADS_PROFILING            FALSE
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/**
 + * @name Kernel hooks
 + * @{
 + */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Threads descriptor structure extension.
 + * @details User fields added to the end of the @p thread_t structure.
 + */
 +#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
 +  /* Add threads custom fields here.*/
 +
 +/**
 + * @brief   Threads initialization hook.
 + * @details User initialization code added to the @p chThdInit() API.
 + *
 + * @note    It is invoked from within @p chThdInit() and implicitly from all
 + *          the threads creation APIs.
 + */
 +#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
 +  /* Add threads initialization code here.*/                                \
 +}
 +
 +/**
 + * @brief   Threads finalization hook.
 + * @details User finalization code added to the @p chThdExit() API.
 + */
 +#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
 +  /* Add threads finalization code here.*/                                  \
 +}
 +
 +/**
 + * @brief   Context switch hook.
 + * @details This hook is invoked just before switching between threads.
 + */
 +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
 +  /* Context switch code here.*/                                            \
 +}
 +
 +/**
 + * @brief   ISR enter hook.
 + */
 +#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
 +  /* IRQ prologue code here.*/                                              \
 +}
 +
 +/**
 + * @brief   ISR exit hook.
 + */
 +#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
 +  /* IRQ epilogue code here.*/                                              \
 +}
 +
 +/**
 + * @brief   Idle thread enter hook.
 + * @note    This hook is invoked within a critical zone, no OS functions
 + *          should be invoked from here.
 + * @note    This macro can be used to activate a power saving mode.
 + */
 +#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
 +  /* Idle-enter code here.*/                                                \
 +}
 +
 +/**
 + * @brief   Idle thread leave hook.
 + * @note    This hook is invoked within a critical zone, no OS functions
 + *          should be invoked from here.
 + * @note    This macro can be used to deactivate a power saving mode.
 + */
 +#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
 +  /* Idle-leave code here.*/                                                \
 +}
 +
 +/**
 + * @brief   Idle Loop hook.
 + * @details This hook is continuously invoked by the idle thread loop.
 + */
 +#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
 +  /* Idle loop code here.*/                                                 \
 +}
 +
 +/**
 + * @brief   System tick event hook.
 + * @details This hook is invoked in the system tick handler immediately
 + *          after processing the virtual timers queue.
 + */
 +#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
 +  /* System tick event code here.*/                                         \
 +}
 +
 +/**
 + * @brief   System halt hook.
 + * @details This hook is invoked in case to a system halting error before
 + *          the system is halted.
 + */
 +#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
 +  /* System halt code here.*/                                               \
 +}
 +
 +/**
 + * @brief   Trace hook.
 + * @details This hook is invoked each time a new record is written in the
 + *          trace buffer.
 + */
 +#define CH_CFG_TRACE_HOOK(tep) {                                            \
 +  /* Trace code here.*/                                                     \
 +}
 +
 +/** @} */
 +
 +/*===========================================================================*/
 +/* Port-specific settings (override port settings defaulted in chcore.h).    */
 +/*===========================================================================*/
 +
 +#endif  /* CHCONF_H */
 +
 +/** @} */
 diff --git a/testhal/STM32/STM32F0xx/WDG/debug/STM32F0xx-WDG (OpenOCD, Flash and Run).launch b/testhal/STM32/STM32F0xx/WDG/debug/STM32F0xx-WDG (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..dbf458099 --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/debug/STM32F0xx-WDG (OpenOCD, Flash and Run).launch @@ -0,0 +1,52 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?>
 +<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
 +<stringAttribute key="bad_container_name" value="\STM32F0xx-WDG\debug"/>
 +<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="1"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="true"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.initCommands" value="set remotetimeout 20
monitor reset init
monitor sleep 50
"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
 +<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="true"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
 +<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
 +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="arm-none-eabi-gdb"/>
 +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
 +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
 +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
 +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
 +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
 +<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
 +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
 +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList><content id="r1-(format)" val="4"/><content id="cr2-adc_lld_start_conversion-(format)" val="4"/><content id="CR2-adc-null-port_wait_for_interrupt-(format)" val="4"/><content id="CR2-adc-adcp-adc_lld_start_conversion-(format)" val="4"/></contentList>"/>
 +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<globalVariableList/>
"/>
 +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<memoryBlockExpressionList/>
"/>
 +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
 +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32F0xx-WDG"/>
 +<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
 +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.865376734"/>
 +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
 +<listEntry value="/STM32F0xx-WDG"/>
 +</listAttribute>
 +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
 +<listEntry value="4"/>
 +</listAttribute>
 +<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
 +<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
 +</listAttribute>
 +</launchConfiguration>
 diff --git a/testhal/STM32/STM32F0xx/WDG/halconf.h b/testhal/STM32/STM32F0xx/WDG/halconf.h new file mode 100644 index 000000000..a38499c86 --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/halconf.h @@ -0,0 +1,388 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +/**
 + * @file    templates/halconf.h
 + * @brief   HAL configuration header.
 + * @details HAL configuration file, this file allows to enable or disable the
 + *          various device drivers from your application. You may also use
 + *          this file in order to override the device drivers default settings.
 + *
 + * @addtogroup HAL_CONF
 + * @{
 + */
 +
 +#ifndef HALCONF_H
 +#define HALCONF_H
 +
 +#include "mcuconf.h"
 +
 +/**
 + * @brief   Enables the PAL subsystem.
 + */
 +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
 +#define HAL_USE_PAL                 TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the ADC subsystem.
 + */
 +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
 +#define HAL_USE_ADC                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the CAN subsystem.
 + */
 +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
 +#define HAL_USE_CAN                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the DAC subsystem.
 + */
 +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
 +#define HAL_USE_DAC                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the EXT subsystem.
 + */
 +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
 +#define HAL_USE_EXT                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the GPT subsystem.
 + */
 +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
 +#define HAL_USE_GPT                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the I2C subsystem.
 + */
 +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
 +#define HAL_USE_I2C                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the I2S subsystem.
 + */
 +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
 +#define HAL_USE_I2S                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the ICU subsystem.
 + */
 +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
 +#define HAL_USE_ICU                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the MAC subsystem.
 + */
 +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
 +#define HAL_USE_MAC                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the MMC_SPI subsystem.
 + */
 +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
 +#define HAL_USE_MMC_SPI             FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the PWM subsystem.
 + */
 +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
 +#define HAL_USE_PWM                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the QSPI subsystem.
 + */
 +#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
 +#define HAL_USE_QSPI                FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the RTC subsystem.
 + */
 +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
 +#define HAL_USE_RTC                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SDC subsystem.
 + */
 +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
 +#define HAL_USE_SDC                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SERIAL subsystem.
 + */
 +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
 +#define HAL_USE_SERIAL              FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SERIAL over USB subsystem.
 + */
 +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
 +#define HAL_USE_SERIAL_USB          FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the SPI subsystem.
 + */
 +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
 +#define HAL_USE_SPI                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the UART subsystem.
 + */
 +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
 +#define HAL_USE_UART                FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the USB subsystem.
 + */
 +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
 +#define HAL_USE_USB                 FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the WDG subsystem.
 + */
 +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
 +#define HAL_USE_WDG                 TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* ADC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
 +#define ADC_USE_WAIT                TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define ADC_USE_MUTUAL_EXCLUSION    TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* CAN driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Sleep mode related APIs inclusion switch.
 + */
 +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
 +#define CAN_USE_SLEEP_MODE          TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* I2C driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables the mutual exclusion APIs on the I2C bus.
 + */
 +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define I2C_USE_MUTUAL_EXCLUSION    TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* MAC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables an event sources for incoming packets.
 + */
 +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
 +#define MAC_USE_ZERO_COPY           FALSE
 +#endif
 +
 +/**
 + * @brief   Enables an event sources for incoming packets.
 + */
 +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
 +#define MAC_USE_EVENTS              TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* MMC_SPI driver related settings.                                          */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Delays insertions.
 + * @details If enabled this options inserts delays into the MMC waiting
 + *          routines releasing some extra CPU time for the threads with
 + *          lower priority, this may slow down the driver a bit however.
 + *          This option is recommended also if the SPI driver does not
 + *          use a DMA channel and heavily loads the CPU.
 + */
 +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
 +#define MMC_NICE_WAITING            TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* SDC driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Number of initialization attempts before rejecting the card.
 + * @note    Attempts are performed at 10mS intervals.
 + */
 +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
 +#define SDC_INIT_RETRY              100
 +#endif
 +
 +/**
 + * @brief   Include support for MMC cards.
 + * @note    MMC support is not yet implemented so this option must be kept
 + *          at @p FALSE.
 + */
 +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
 +#define SDC_MMC_SUPPORT             FALSE
 +#endif
 +
 +/**
 + * @brief   Delays insertions.
 + * @details If enabled this options inserts delays into the MMC waiting
 + *          routines releasing some extra CPU time for the threads with
 + *          lower priority, this may slow down the driver a bit however.
 + */
 +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
 +#define SDC_NICE_WAITING            TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* SERIAL driver related settings.                                           */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Default bit rate.
 + * @details Configuration parameter, this is the baud rate selected for the
 + *          default configuration.
 + */
 +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
 +#define SERIAL_DEFAULT_BITRATE      38400
 +#endif
 +
 +/**
 + * @brief   Serial buffers size.
 + * @details Configuration parameter, you can change the depth of the queue
 + *          buffers depending on the requirements of your application.
 + * @note    The default is 16 bytes for both the transmission and receive
 + *          buffers.
 + */
 +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
 +#define SERIAL_BUFFERS_SIZE         16
 +#endif
 +
 +/*===========================================================================*/
 +/* SERIAL_USB driver related setting.                                        */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Serial over USB buffers size.
 + * @details Configuration parameter, the buffer size must be a multiple of
 + *          the USB data endpoint maximum packet size.
 + * @note    The default is 256 bytes for both the transmission and receive
 + *          buffers.
 + */
 +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
 +#define SERIAL_USB_BUFFERS_SIZE     256
 +#endif
 +
 +/**
 + * @brief   Serial over USB number of buffers.
 + * @note    The default is 2 buffers.
 + */
 +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
 +#define SERIAL_USB_BUFFERS_NUMBER   2
 +#endif
 +
 +/*===========================================================================*/
 +/* SPI driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
 +#define SPI_USE_WAIT                TRUE
 +#endif
 +
 +/**
 + * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define SPI_USE_MUTUAL_EXCLUSION    TRUE
 +#endif
 +
 +/*===========================================================================*/
 +/* UART driver related settings.                                             */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
 +#define UART_USE_WAIT               FALSE
 +#endif
 +
 +/**
 + * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
 +#define UART_USE_MUTUAL_EXCLUSION   FALSE
 +#endif
 +
 +/*===========================================================================*/
 +/* USB driver related settings.                                              */
 +/*===========================================================================*/
 +
 +/**
 + * @brief   Enables synchronous APIs.
 + * @note    Disabling this option saves both code and data space.
 + */
 +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
 +#define USB_USE_WAIT                FALSE
 +#endif
 +
 +#endif /* HALCONF_H */
 +
 +/** @} */
 diff --git a/testhal/STM32/STM32F0xx/WDG/main.c b/testhal/STM32/STM32F0xx/WDG/main.c new file mode 100644 index 000000000..380c847e5 --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/main.c @@ -0,0 +1,58 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +#include "ch.h"
 +#include "hal.h"
 +
 +/*
 + * Watchdog deadline set to more than one second (LSI=40000 / (64 * 1000)).
 + */
 +static const WDGConfig wdgcfg = {
 +  STM32_IWDG_PR_64,
 +  STM32_IWDG_RL(1000),
 +  STM32_IWDG_WIN_DISABLED
 +};
 +
 +/*
 + * Application entry point.
 + */
 +int main(void) {
 +
 +  /*
 +   * System initializations.
 +   * - HAL initialization, this also initializes the configured device drivers
 +   *   and performs the board-specific initializations.
 +   * - Kernel initialization, the main() function becomes a thread and the
 +   *   RTOS is active.
 +   */
 +  halInit();
 +  chSysInit();
 +
 +  /*
 +   * Starting the watchdog driver.
 +   */
 +  wdgStart(&WDGD1, &wdgcfg);
 +
 +  /*
 +   * Normal main() thread activity, it resets the watchdog.
 +   */
 +  while (true) {
 +    wdgReset(&WDGD1);
 +    palToggleLine(LINE_LED4);
 +    chThdSleepMilliseconds(500);
 +  }
 +  return 0;
 +}
 diff --git a/testhal/STM32/STM32F0xx/WDG/mcuconf.h b/testhal/STM32/STM32F0xx/WDG/mcuconf.h new file mode 100644 index 000000000..8a2324cac --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/mcuconf.h @@ -0,0 +1,200 @@ +/*
 +    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 +
 +    Licensed under the Apache License, Version 2.0 (the "License");
 +    you may not use this file except in compliance with the License.
 +    You may obtain a copy of the License at
 +
 +        http://www.apache.org/licenses/LICENSE-2.0
 +
 +    Unless required by applicable law or agreed to in writing, software
 +    distributed under the License is distributed on an "AS IS" BASIS,
 +    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 +    See the License for the specific language governing permissions and
 +    limitations under the License.
 +*/
 +
 +#ifndef MCUCONF_H
 +#define MCUCONF_H
 +
 +/*
 + * STM32F0xx drivers configuration.
 + * The following settings override the default settings present in
 + * the various device driver implementation headers.
 + * Note that the settings for each driver only have effect if the whole
 + * driver is enabled in halconf.h.
 + *
 + * IRQ priorities:
 + * 3...0       Lowest...Highest.
 + *
 + * DMA priorities:
 + * 0...3        Lowest...Highest.
 + */
 +
 +#define STM32F0xx_MCUCONF
 +
 +/*
 + * HAL driver system settings.
 + */
 +#define STM32_NO_INIT                       FALSE
 +#define STM32_PVD_ENABLE                    FALSE
 +#define STM32_PLS                           STM32_PLS_LEV0
 +#define STM32_HSI_ENABLED                   TRUE
 +#define STM32_HSI14_ENABLED                 TRUE
 +#define STM32_HSI48_ENABLED                 FALSE
 +#define STM32_LSI_ENABLED                   TRUE
 +#define STM32_HSE_ENABLED                   FALSE
 +#define STM32_LSE_ENABLED                   FALSE
 +#define STM32_SW                            STM32_SW_PLL
 +#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2
 +#define STM32_PREDIV_VALUE                  1
 +#define STM32_PLLMUL_VALUE                  12
 +#define STM32_HPRE                          STM32_HPRE_DIV1
 +#define STM32_PPRE                          STM32_PPRE_DIV1
 +#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
 +#define STM32_MCOPRE                        STM32_MCOPRE_DIV1
 +#define STM32_PLLNODIV                      STM32_PLLNODIV_DIV2
 +#define STM32_USBSW                         STM32_USBSW_HSI48
 +#define STM32_CECSW                         STM32_CECSW_HSI
 +#define STM32_I2C1SW                        STM32_I2C1SW_HSI
 +#define STM32_USART1SW                      STM32_USART1SW_PCLK
 +#define STM32_RTCSEL                        STM32_RTCSEL_LSI
 +
 +/*
 + * ADC driver system settings.
 + */
 +#define STM32_ADC_USE_ADC1                  FALSE
 +#define STM32_ADC_ADC1_CKMODE               STM32_ADC_CKMODE_ADCCLK
 +#define STM32_ADC_ADC1_DMA_PRIORITY         2
 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2
 +#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(1, 1)
 +
 +/*
 + * EXT driver system settings.
 + */
 +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3
 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3
 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3
 +#define STM32_EXT_EXTI16_IRQ_PRIORITY       3
 +#define STM32_EXT_EXTI17_20_IRQ_PRIORITY    3
 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY    3
 +
 +/*
 + * GPT driver system settings.
 + */
 +#define STM32_GPT_USE_TIM1                  FALSE
 +#define STM32_GPT_USE_TIM2                  FALSE
 +#define STM32_GPT_USE_TIM3                  FALSE
 +#define STM32_GPT_USE_TIM14                 FALSE
 +#define STM32_GPT_TIM1_IRQ_PRIORITY         2
 +#define STM32_GPT_TIM2_IRQ_PRIORITY         2
 +#define STM32_GPT_TIM3_IRQ_PRIORITY         2
 +#define STM32_GPT_TIM14_IRQ_PRIORITY        2
 +
 +/*
 + * I2C driver system settings.
 + */
 +#define STM32_I2C_USE_I2C1                  FALSE
 +#define STM32_I2C_USE_I2C2                  FALSE
 +#define STM32_I2C_BUSY_TIMEOUT              50
 +#define STM32_I2C_I2C1_IRQ_PRIORITY         3
 +#define STM32_I2C_I2C2_IRQ_PRIORITY         3
 +#define STM32_I2C_USE_DMA                   TRUE
 +#define STM32_I2C_I2C1_DMA_PRIORITY         1
 +#define STM32_I2C_I2C2_DMA_PRIORITY         1
 +#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
 +#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
 +#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)
 +#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 +
 +/*
 + * I2S driver system settings.
 + */
 +#define STM32_I2S_USE_SPI1                  FALSE
 +#define STM32_I2S_USE_SPI2                  FALSE
 +#define STM32_I2S_SPI1_MODE                 (STM32_I2S_MODE_MASTER |        \
 +                                             STM32_I2S_MODE_RX)
 +#define STM32_I2S_SPI2_MODE                 (STM32_I2S_MODE_MASTER |        \
 +                                             STM32_I2S_MODE_RX)
 +#define STM32_I2S_SPI1_IRQ_PRIORITY         2
 +#define STM32_I2S_SPI2_IRQ_PRIORITY         2
 +#define STM32_I2S_SPI1_DMA_PRIORITY         1
 +#define STM32_I2S_SPI2_DMA_PRIORITY         1
 +#define STM32_I2S_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
 +#define STM32_I2S_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
 +#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
 +#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)
 +#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")
 +
 +/*
 + * ICU driver system settings.
 + */
 +#define STM32_ICU_USE_TIM1                  FALSE
 +#define STM32_ICU_USE_TIM2                  FALSE
 +#define STM32_ICU_USE_TIM3                  FALSE
 +#define STM32_ICU_TIM1_IRQ_PRIORITY         3
 +#define STM32_ICU_TIM2_IRQ_PRIORITY         3
 +#define STM32_ICU_TIM3_IRQ_PRIORITY         3
 +
 +/*
 + * PWM driver system settings.
 + */
 +#define STM32_PWM_USE_ADVANCED              FALSE
 +#define STM32_PWM_USE_TIM1                  FALSE
 +#define STM32_PWM_USE_TIM2                  FALSE
 +#define STM32_PWM_USE_TIM3                  FALSE
 +#define STM32_PWM_TIM1_IRQ_PRIORITY         3
 +#define STM32_PWM_TIM2_IRQ_PRIORITY         3
 +#define STM32_PWM_TIM3_IRQ_PRIORITY         3
 +
 +/*
 + * SERIAL driver system settings.
 + */
 +#define STM32_SERIAL_USE_USART1             FALSE
 +#define STM32_SERIAL_USE_USART2             FALSE
 +#define STM32_SERIAL_USART1_PRIORITY        3
 +#define STM32_SERIAL_USART2_PRIORITY        3
 +
 +/*
 + * SPI driver system settings.
 + */
 +#define STM32_SPI_USE_SPI1                  FALSE
 +#define STM32_SPI_USE_SPI2                  FALSE
 +#define STM32_SPI_SPI1_DMA_PRIORITY         1
 +#define STM32_SPI_SPI2_DMA_PRIORITY         1
 +#define STM32_SPI_SPI1_IRQ_PRIORITY         2
 +#define STM32_SPI_SPI2_IRQ_PRIORITY         2
 +#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
 +#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
 +#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
 +#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 5)
 +#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
 +
 +/*
 + * ST driver system settings.
 + */
 +#define STM32_ST_IRQ_PRIORITY               2
 +#define STM32_ST_USE_TIMER                  2
 +
 +/*
 + * UART driver system settings.
 + */
 +#define STM32_UART_USE_USART1               FALSE
 +#define STM32_UART_USE_USART2               FALSE
 +#define STM32_UART_USART1_IRQ_PRIORITY      3
 +#define STM32_UART_USART2_IRQ_PRIORITY      3
 +#define STM32_UART_USART1_DMA_PRIORITY      0
 +#define STM32_UART_USART2_DMA_PRIORITY      0
 +#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
 +#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)
 +#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
 +#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)
 +#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
 +
 +/*
 + * WDG driver system settings.
 + */
 +#define STM32_WDG_USE_IWDG                  TRUE
 +
 +#endif /* MCUCONF_H */
 diff --git a/testhal/STM32/STM32F0xx/WDG/readme.txt b/testhal/STM32/STM32F0xx/WDG/readme.txt new file mode 100644 index 000000000..46b93c1ba --- /dev/null +++ b/testhal/STM32/STM32F0xx/WDG/readme.txt @@ -0,0 +1,30 @@ +*****************************************************************************
 +** ChibiOS/HAL - WDG driver demo for STM32F3xx.                            **
 +*****************************************************************************
 +
 +** TARGET **
 +
 +The demo runs on an ST STM32F3-Discovery board.
 +
 +** The Demo **
 +
 +The application demonstrates the use of the STM32F3xx WDG driver.
 +
 +** Board Setup **
 +
 +None.
 +
 +** Build Procedure **
 +
 +The demo has been tested using the free Codesourcery GCC-based toolchain
 +and YAGARTO.
 +Just modify the TRGT line in the makefile in order to use different GCC ports.
 +
 +** Notes **
 +
 +Some files used by the demo are not part of ChibiOS/RT but are copyright of
 +ST Microelectronics and are licensed under a different license.
 +Also note that not all the files present in the ST library are distributed
 +with ChibiOS/RT, you can find the whole library on the ST web site:
 +
 +                             http://www.st.com
 | 
