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-rw-r--r--testhal/ATSAMA5D2/SPI/Makefile27
-rw-r--r--testhal/ATSAMA5D2/SPI/debug/SAMA5D2-SPI (DDRAM).launch2
-rw-r--r--testhal/ATSAMA5D2/SPI/main.c7
-rw-r--r--testhal/ATSAMA5D2/SPI/readme.txt2
4 files changed, 15 insertions, 23 deletions
diff --git a/testhal/ATSAMA5D2/SPI/Makefile b/testhal/ATSAMA5D2/SPI/Makefile
index 0e477d2d4..8006d3611 100644
--- a/testhal/ATSAMA5D2/SPI/Makefile
+++ b/testhal/ATSAMA5D2/SPI/Makefile
@@ -108,9 +108,14 @@ endif
# Define project name here
PROJECT = ch
+BUILDDIR := ./build
+DEPDIR := ./.dep
# Imported source files and paths
CHIBIOS = ../../..
+
+# Licensing files.
+include $(CHIBIOS)/os/license/license.mk
# Startup files.
include $(CHIBIOS)/os/common/startup/ARMCAx-TZ/compilers/GCC/mk/startup_sama5d2.mk
# HAL-OSAL files (optional).
@@ -125,6 +130,7 @@ include $(CHIBIOS)/os/common/ports/ARMCAx-TZ/compilers/GCC/mk/port_generic.mk
#include $(CHIBIOS)/test/lib/test.mk
#include $(CHIBIOS)/test/rt/rt_test.mk
#include $(CHIBIOS)/test/oslib/oslib_test.mk
+include $(CHIBIOS)/os/hal/lib/streams/streams.mk
# Define linker script file here
#LDSCRIPT= $(STARTUPLD)/SAMA5D2.ld
@@ -133,20 +139,12 @@ LDSCRIPT= $(STARTUPLD)/SAMA5D2ddr.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
-CSRC = $(STARTUPSRC) \
- $(KERNSRC) \
- $(PORTSRC) \
- $(OSALSRC) \
- $(HALSRC) \
- $(PLATFORMSRC) \
- $(BOARDSRC) \
- $(TESTSRC) \
- $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
+CSRC = $(ALLCSRC) \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
-CPPSRC =
+CPPSRC = $(ALLCPPSRC)
# C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
@@ -169,13 +167,10 @@ TCSRC =
TCPPSRC =
# List ASM source files here
-ASMSRC =
-ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
+ASMSRC = $(ALLASMSRC)
+ASMXSRC = $(ALLXASMSRC)
-INCDIR = $(CHIBIOS)/os/license \
- $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
- $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
- $(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various
+INCDIR = $(ALLINC)
#
# Project, sources and paths
diff --git a/testhal/ATSAMA5D2/SPI/debug/SAMA5D2-SPI (DDRAM).launch b/testhal/ATSAMA5D2/SPI/debug/SAMA5D2-SPI (DDRAM).launch
index eb4d5e361..e0b0632a4 100644
--- a/testhal/ATSAMA5D2/SPI/debug/SAMA5D2-SPI (DDRAM).launch
+++ b/testhal/ATSAMA5D2/SPI/debug/SAMA5D2-SPI (DDRAM).launch
@@ -11,7 +11,7 @@
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
-<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value="20100000"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value="27000000"/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.runCommands" value=""/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="true"/>
diff --git a/testhal/ATSAMA5D2/SPI/main.c b/testhal/ATSAMA5D2/SPI/main.c
index 33e590bc4..312ca8819 100644
--- a/testhal/ATSAMA5D2/SPI/main.c
+++ b/testhal/ATSAMA5D2/SPI/main.c
@@ -92,14 +92,11 @@ int main(void) {
chSysInit();
/*
- * Activates the serial driver 0 using the driver default configuration.
+ * Activates the serial driver 1 using the driver default configuration.
*/
sdStart(&SD1, &sdcfg);
spiStart(&SPID1, &mst_spicfg); /* Setup transfer parameters. */
- /* Redirecting UART1 RX on PD2 and UART1 TX on PD3. */
- palSetGroupMode(PIOD, PAL_PORT_BIT(2) | PAL_PORT_BIT(3), 0U,
- PAL_SAMA_FUNC_PERIPH_A | PAL_MODE_SECURE);
/* Redirecting SPI1 pins. */
palSetGroupMode(PIOD, PAL_PORT_BIT(25) | PAL_PORT_BIT(26) |
@@ -111,7 +108,7 @@ int main(void) {
while (true) {
if(!palReadPad(PIOB, PIOB_USER_PB)) {
/* SPI operation in loopback*/
- spiStartExchange(&SPID1, BUFFER_SIZE, &txbuf, &rxbuf);
+ spiExchange(&SPID1, BUFFER_SIZE, &txbuf, &rxbuf);
/* D-Cache L1 is enabled */
cacheInvalidateRegion(&rxbuf, sizeof(rxbuf));
diff --git a/testhal/ATSAMA5D2/SPI/readme.txt b/testhal/ATSAMA5D2/SPI/readme.txt
index cc6e568f6..303da320d 100644
--- a/testhal/ATSAMA5D2/SPI/readme.txt
+++ b/testhal/ATSAMA5D2/SPI/readme.txt
@@ -4,7 +4,7 @@
** TARGET **
-The demo targets a generic ARM Cortex-A5 device without HAL support.
+The demo runs on an SAMA5D2-XPLAINED board.
** The Demo **