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-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c12
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h13
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c89
-rw-r--r--os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h21
4 files changed, 116 insertions, 19 deletions
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
index 498f334b1..f8c4f0505 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.c
@@ -478,6 +478,12 @@ OSAL_IRQ_HANDLER(STM32_USART3_8_HANDLER) {
#if STM32_SERIAL_USE_USART6
serve_interrupt(&SD6);
#endif
+#if STM32_SERIAL_USE_UART7
+ serve_interrupt(&SD7);
+#endif
+#if STM32_SERIAL_USE_UART8
+ serve_interrupt(&SD8);
+#endif
OSAL_IRQ_EPILOGUE();
}
@@ -561,8 +567,6 @@ OSAL_IRQ_HANDLER(STM32_USART6_HANDLER) {
}
#endif
-#endif /* !defined(STM32_USART3_8_HANDLER) */
-
#if STM32_SERIAL_USE_UART7 || defined(__DOXYGEN__)
#if !defined(STM32_UART7_HANDLER)
#error "STM32_UART7_HANDLER not defined"
@@ -601,6 +605,8 @@ OSAL_IRQ_HANDLER(STM32_UART8_HANDLER) {
}
#endif
+#endif /* !defined(STM32_USART3_8_HANDLER) */
+
#if STM32_SERIAL_USE_LPUART1 || defined(__DOXYGEN__)
#if !defined(STM32_LPUART1_HANDLER)
#error "STM32_LPUART1_HANDLER not defined"
@@ -732,7 +738,7 @@ void sd_lld_init(void) {
#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \
- STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8 || defined(__DOXYGEN__)
+ STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8
#if defined(STM32_USART3_8_HANDLER)
nvicEnableVector(STM32_USART3_8_NUMBER, STM32_SERIAL_USART3_8_PRIORITY);
#endif
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h
index 4e062b5b8..c685bafcf 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_serial_lld.h
@@ -385,6 +385,17 @@
#error "Invalid IRQ priority assigned to USART2"
#endif
+#if defined(STM32_USART3_8_HANDLER)
+
+#if (STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
+ STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \
+ STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8) && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_8_PRIORITY)
+#error "Invalid IRQ priority assigned to USART3..8"
+#endif
+
+#else /* !defined(STM32_USART3_8_HANDLER) */
+
#if STM32_SERIAL_USE_USART3 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_PRIORITY)
#error "Invalid IRQ priority assigned to USART3"
@@ -415,6 +426,8 @@
#error "Invalid IRQ priority assigned to UART8"
#endif
+#endif /* !defined(STM32_USART3_8_HANDLER) */
+
#if STM32_SERIAL_USE_LPUART1 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_LPUART1_PRIORITY)
#error "Invalid IRQ priority assigned to LPUART1"
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
index e74f8b553..d77044e88 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c
@@ -383,6 +383,45 @@ OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) {
}
#endif /* STM32_UART_USE_USART2 */
+
+#if defined(STM32_USART3_8_HANDLER)
+#if STM32_SERIAL_USE_USART3 || STM32_SERIAL_USE_UART4 || \
+ STM32_SERIAL_USE_UART5 || STM32_SERIAL_USE_USART6 || \
+ STM32_SERIAL_USE_UART7 || STM32_SERIAL_USE_UART8 || defined(__DOXYGEN__)
+/**
+ * @brief USART2 interrupt handler.
+ *
+ * @isr
+ */
+OSAL_IRQ_HANDLER(STM32_USART3_8_HANDLER) {
+
+ OSAL_IRQ_PROLOGUE();
+
+#if STM32_UART_USE_USART3
+ serve_usart_irq(&UARTD3);
+#endif
+#if STM32_UART_USE_UART4
+ serve_usart_irq(&UARTD4);
+#endif
+#if STM32_UART_USE_UART5
+ serve_usart_irq(&UARTD5);
+#endif
+#if STM32_UART_USE_USART6
+ serve_usart_irq(&UARTD6);
+#endif
+#if STM32_UART_USE_UART7
+ serve_usart_irq(&UARTD7);
+#endif
+#if STM32_UART_USE_UART8
+ serve_usart_irq(&UARTD8);
+#endif
+
+ OSAL_IRQ_EPILOGUE();
+}
+#endif
+
+#else /* !defined(STM32_USART3_8_HANDLER) */
+
#if STM32_UART_USE_USART3 || defined(__DOXYGEN__)
#if !defined(STM32_USART3_HANDLER)
#error "STM32_USART3_HANDLER not defined"
@@ -497,6 +536,8 @@ OSAL_IRQ_HANDLER(STM32_UART8_HANDLER) {
}
#endif /* STM32_UART_USE_UART8 */
+#endif /* !defined(STM32_USART3_8_HANDLER) */
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -515,6 +556,9 @@ void uart_lld_init(void) {
UARTD1.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD1.dmarx = STM32_DMA_STREAM(STM32_UART_USART1_RX_DMA_STREAM);
UARTD1.dmatx = STM32_DMA_STREAM(STM32_UART_USART1_TX_DMA_STREAM);
+#if defined(STM32_USART1_NUMBER)
+ nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_USART2
@@ -524,6 +568,9 @@ void uart_lld_init(void) {
UARTD2.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD2.dmarx = STM32_DMA_STREAM(STM32_UART_USART2_RX_DMA_STREAM);
UARTD2.dmatx = STM32_DMA_STREAM(STM32_UART_USART2_TX_DMA_STREAM);
+#if defined(STM32_USART2_NUMBER)
+ nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_USART3
@@ -533,6 +580,9 @@ void uart_lld_init(void) {
UARTD3.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD3.dmarx = STM32_DMA_STREAM(STM32_UART_USART3_RX_DMA_STREAM);
UARTD3.dmatx = STM32_DMA_STREAM(STM32_UART_USART3_TX_DMA_STREAM);
+#if defined(STM32_USART3_NUMBER)
+ nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_UART4
@@ -542,6 +592,9 @@ void uart_lld_init(void) {
UARTD4.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD4.dmarx = STM32_DMA_STREAM(STM32_UART_UART4_RX_DMA_STREAM);
UARTD4.dmatx = STM32_DMA_STREAM(STM32_UART_UART4_TX_DMA_STREAM);
+#if defined(STM32_UART4_NUMBER)
+ nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_UART5
@@ -551,6 +604,9 @@ void uart_lld_init(void) {
UARTD5.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD5.dmarx = STM32_DMA_STREAM(STM32_UART_UART5_RX_DMA_STREAM);
UARTD5.dmatx = STM32_DMA_STREAM(STM32_UART_UART5_TX_DMA_STREAM);
+#if defined(STM32_UART5_NUMBER)
+ nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_USART6
@@ -560,6 +616,9 @@ void uart_lld_init(void) {
UARTD6.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD6.dmarx = STM32_DMA_STREAM(STM32_UART_USART6_RX_DMA_STREAM);
UARTD6.dmatx = STM32_DMA_STREAM(STM32_UART_USART6_TX_DMA_STREAM);
+#if defined(STM32_USART6_NUMBER)
+ nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_UART7
@@ -569,6 +628,9 @@ void uart_lld_init(void) {
UARTD7.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD7.dmarx = STM32_DMA_STREAM(STM32_UART_UART7_RX_DMA_STREAM);
UARTD7.dmatx = STM32_DMA_STREAM(STM32_UART_UART7_TX_DMA_STREAM);
+#if defined(STM32_UART7_NUMBER)
+ nvicEnableVector(STM32_UART7_NUMBER, STM32_UART_UART7_IRQ_PRIORITY);
+#endif
#endif
#if STM32_UART_USE_UART8
@@ -578,6 +640,17 @@ void uart_lld_init(void) {
UARTD8.dmamode = STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
UARTD8.dmarx = STM32_DMA_STREAM(STM32_UART_UART8_RX_DMA_STREAM);
UARTD8.dmatx = STM32_DMA_STREAM(STM32_UART_UART8_TX_DMA_STREAM);
+#if defined(STM32_UART8_NUMBER)
+ nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY);
+#endif
+#endif
+
+#if STM32_UART_USE_USART3 || STM32_UART_USE_UART4 || \
+ STM32_UART_USE_UART5 || STM32_UART_USE_USART6 || \
+ STM32_UART_USE_UART7 || STM32_UART_USE_UART8
+#if defined(STM32_USART3_8_HANDLER)
+ nvicEnableVector(STM32_USART3_8_NUMBER, STM32_UART_USART3_8_PRIORITY);
+#endif
#endif
}
@@ -605,7 +678,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUSART1(FALSE);
- nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);
}
@@ -625,7 +697,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUSART2(FALSE);
- nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);
}
@@ -645,7 +716,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUSART3(FALSE);
- nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);
}
@@ -665,7 +735,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUART4(FALSE);
- nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY);
}
@@ -685,7 +754,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUART5(FALSE);
- nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY);
}
@@ -705,7 +773,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUSART6(FALSE);
- nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY);
}
@@ -725,7 +792,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUART7(FALSE);
- nvicEnableVector(STM32_UART7_NUMBER, STM32_UART_UART7_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART7_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART7_DMA_PRIORITY);
}
@@ -745,7 +811,6 @@ void uart_lld_start(UARTDriver *uartp) {
(void *)uartp);
osalDbgAssert(!b, "stream already allocated");
rccEnableUART8(FALSE);
- nvicEnableVector(STM32_UART8_NUMBER, STM32_UART_UART8_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART8_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART8_DMA_PRIORITY);
}
@@ -781,7 +846,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_USART1
if (&UARTD1 == uartp) {
- nvicDisableVector(STM32_USART1_NUMBER);
rccDisableUSART1(FALSE);
return;
}
@@ -789,7 +853,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_USART2
if (&UARTD2 == uartp) {
- nvicDisableVector(STM32_USART2_NUMBER);
rccDisableUSART2(FALSE);
return;
}
@@ -797,7 +860,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_USART3
if (&UARTD3 == uartp) {
- nvicDisableVector(STM32_USART3_NUMBER);
rccDisableUSART3(FALSE);
return;
}
@@ -805,7 +867,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_UART4
if (&UARTD4 == uartp) {
- nvicDisableVector(STM32_UART4_NUMBER);
rccDisableUART4(FALSE);
return;
}
@@ -813,7 +874,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_UART5
if (&UARTD5 == uartp) {
- nvicDisableVector(STM32_UART5_NUMBER);
rccDisableUART5(FALSE);
return;
}
@@ -821,7 +881,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_USART6
if (&UARTD6 == uartp) {
- nvicDisableVector(STM32_USART6_NUMBER);
rccDisableUSART6(FALSE);
return;
}
@@ -829,7 +888,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_UART7
if (&UARTD7 == uartp) {
- nvicDisableVector(STM32_UART7_NUMBER);
rccDisableUART7(FALSE);
return;
}
@@ -837,7 +895,6 @@ void uart_lld_stop(UARTDriver *uartp) {
#if STM32_UART_USE_UART8
if (&UARTD8 == uartp) {
- nvicDisableVector(STM32_UART8_NUMBER);
rccDisableUART8(FALSE);
return;
}
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h
index 6fb71c255..dbf3e0a64 100644
--- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h
+++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.h
@@ -133,6 +133,14 @@
#endif
/**
+ * @brief USART3..8 interrupt priority level setting.
+ * @note Only valid on those devices with a shared IRQ.
+ */
+#if !defined(STM32_UART_USART3_8_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_UART_USART3_8_PRIORITY 12
+#endif
+
+/**
* @brief UART4 interrupt priority level setting.
*/
#if !defined(STM32_UART_UART4_IRQ_PRIORITY) || defined(__DOXYGEN__)
@@ -306,6 +314,17 @@
#error "Invalid IRQ priority assigned to USART2"
#endif
+#if defined(STM32_USART3_8_HANDLER)
+
+#if (STM32_UART_USE_USART3 || STM32_UART_USE_UART4 || \
+ STM32_UART_USE_UART5 || STM32_UART_USE_USART6 || \
+ STM32_UART_USE_UART7 || STM32_UART_USE_UART8) && \
+ !OSAL_IRQ_IS_VALID_PRIORITY(STM32_SERIAL_USART3_8_PRIORITY)
+#error "Invalid IRQ priority assigned to USART3..8"
+#endif
+
+#else /* !defined(STM32_USART3_8_HANDLER) */
+
#if STM32_UART_USE_USART3 && \
!OSAL_IRQ_IS_VALID_PRIORITY(STM32_UART_USART3_IRQ_PRIORITY)
#error "Invalid IRQ priority assigned to USART3"
@@ -371,6 +390,8 @@
#error "Invalid DMA priority assigned to UART7"
#endif
+#endif /* !defined(STM32_USART3_8_HANDLER) */
+
#if STM32_UART_USE_UART8 && \
!STM32_DMA_IS_VALID_PRIORITY(STM32_UART_UART8_DMA_PRIORITY)
#error "Invalid DMA priority assigned to UART8"
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-31 15:40:15 +0000