diff options
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/include/hal_usb.h | 17 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c | 15 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h | 1 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32L4xx/stm32_registry.h | 1 |
4 files changed, 24 insertions, 10 deletions
diff --git a/os/hal/include/hal_usb.h b/os/hal/include/hal_usb.h index 63fa9e25d..25ef63aa3 100644 --- a/os/hal/include/hal_usb.h +++ b/os/hal/include/hal_usb.h @@ -230,6 +230,9 @@ #define USB_EP_MODE_TYPE_INTR 0x0003U /**< Interrupt endpoint. */
/** @} */
+#define USB_IN_STATE 0x08
+#define USB_OUT_STATE 0x10
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -285,13 +288,13 @@ typedef enum { * @brief Type of an endpoint zero state machine states.
*/
typedef enum {
- USB_EP0_STP_WAITING = 0, /**< Waiting for SETUP data. */
- USB_EP0_IN_TX = 1, /**< Transmitting. */
- USB_EP0_IN_WAITING_TX0 = 2, /**< Waiting transmit 0. */
- USB_EP0_IN_SENDING_STS = 3, /**< Sending status. */
- USB_EP0_OUT_WAITING_STS = 4, /**< Waiting status. */
- USB_EP0_OUT_RX = 5, /**< Receiving. */
- USB_EP0_ERROR = 6 /**< Error, EP0 stalled. */
+ USB_EP0_STP_WAITING = 0, /**< Waiting for SETUP data.*/
+ USB_EP0_IN_TX = USB_IN_STATE | 1, /**< Transmitting. */
+ USB_EP0_IN_WAITING_TX0 = USB_IN_STATE | 2, /**< Waiting transmit 0. */
+ USB_EP0_IN_SENDING_STS = USB_IN_STATE | 3, /**< Sending status. */
+ USB_EP0_OUT_WAITING_STS = USB_OUT_STATE | 4, /**< Waiting status. */
+ USB_EP0_OUT_RX = USB_OUT_STATE | 5, /**< Receiving. */
+ USB_EP0_ERROR = 6 /**< Error, EP0 stalled. */
} usbep0state_t;
/**
diff --git a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c index b0bb9aa3e..7490c2c8b 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c +++ b/os/hal/ports/STM32/LLD/OTGv1/hal_usb_lld.c @@ -418,10 +418,19 @@ static void otg_epout_handler(USBDriver *usbp, usbep_t ep) { if ((epint & DOEPINT_XFRC) && (otgp->DOEPMSK & DOEPMSK_XFRCM)) {
USBOutEndpointState *osp;
+#if defined(STM32_OTG_SEQUENCE_WORKAROUND)
+ /* If an OUT transaction end interrupt is processed after the state
+ machine advanced to an IN state then it is ignored, this is caused
+ on some devices (L4) by STUP and XFRCM interrupts arriving in random
+ order.*/
+ if ((ep == 0) && ((usbp->ep0state & USB_OUT_STATE) == 0))
+ return;
+#else
/* Receive transfer complete, checking if it is a SETUP transfer on EP0,
- than it must be ignored, the STUPM handler will take care of it.*/
- if ((ep == 0) && (usbp->ep0state == USB_EP0_WAITING_SETUP))
+ than it must be ignored, the STUP handler will take care of it.*/
+ if ((ep == 0) && (usbp->ep0state == USB_EP0_STP_WAITING))
return;
+#endif
/* OUT state structure pointer for this endpoint.*/
osp = usbp->epc[ep]->out_state;
@@ -994,7 +1003,7 @@ void usb_lld_reset(USBDriver *usbp) { /* EP0 initialization, it is a special case.*/
usbp->epc[0] = &ep0config;
- otgp->oe[0].DOEPTSIZ = 0;
+ otgp->oe[0].DOEPTSIZ = DOEPTSIZ_STUPCNT(3);
otgp->oe[0].DOEPCTL = DOEPCTL_SD0PID | DOEPCTL_USBAEP | DOEPCTL_EPTYP_CTRL |
DOEPCTL_MPSIZ(ep0config.out_maxsize);
otgp->ie[0].DIEPTSIZ = 0;
diff --git a/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h b/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h index 00b67b32a..6b326895f 100644 --- a/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h +++ b/os/hal/ports/STM32/LLD/OTGv1/stm32_otg.h @@ -862,6 +862,7 @@ typedef struct { * @name DOEPINT register bit definitions
* @{
*/
+#define DOEPINT_SETUP_RCVD (1U<<15) /**< SETUP packet received. */
#define DOEPINT_B2BSTUP (1U<<6) /**< Back-to-back SETUP packets
received. */
#define DOEPINT_OTEPDIS (1U<<4) /**< OUT token received when
diff --git a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h index 21675ff93..880f4362e 100644 --- a/os/hal/ports/STM32/STM32L4xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32L4xx/stm32_registry.h @@ -727,6 +727,7 @@ #define STM32_HAS_UART8 FALSE
/* USB attributes.*/
+#define STM32_OTG_SEQUENCE_WORKAROUND
#define STM32_OTG_STEPPING 2
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_ENDPOINTS 5
|