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-rw-r--r--os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld10
-rw-r--r--os/ports/GCC/PPC/crt0.s1
2 files changed, 8 insertions, 3 deletions
diff --git a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld b/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld
index cf2216867..49b182721 100644
--- a/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld
+++ b/os/ports/GCC/PPC/SPC560Pxx/ld/SPC560P44.ld
@@ -47,13 +47,17 @@ SECTIONS
. = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
- __ivpr_base__ = .;
KEEP(*(.bam))
KEEP(*(.crt0))
. = ALIGN(0x00000800);
- KEEP(*(.handlers))
- . = ALIGN(0x00001000);
KEEP(*(.vectors))
+ /* Note, have to waste the first 64KB because the IVPR register
+ requires an alignment of 64KB and the first 64KB cannot be used,
+ IVOR0 would conflict with the BAM word. Applications could
+ allocate code or data in the first 64KB by using special sections.*/
+ . = ALIGN(0x00010000);
+ __ivpr_base__ = .;
+ KEEP(*(.handlers))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
diff --git a/os/ports/GCC/PPC/crt0.s b/os/ports/GCC/PPC/crt0.s
index cec9a306f..4a2bc4dea 100644
--- a/os/ports/GCC/PPC/crt0.s
+++ b/os/ports/GCC/PPC/crt0.s
@@ -44,6 +44,7 @@ _boot_address:
* IVPR initialization.
*/
lis %r4, __ivpr_base__@h
+ ori %r4, %r4, __ivpr_base__@l
mtIVPR %r4
/*
* Small sections registers initialization.