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-rw-r--r--os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c30
-rw-r--r--os/hal/ports/STM32/STM32L0xx/hal_lld.h1
-rw-r--r--os/hal/ports/STM32/STM32L0xx/platform.mk1
-rw-r--r--os/hal/ports/STM32/STM32L0xx/stm32_registry.h85
4 files changed, 59 insertions, 58 deletions
diff --git a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
index 66bde797a..a5861119c 100644
--- a/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
+++ b/os/hal/ports/STM32/LLD/RTCv2/hal_rtc_lld.c
@@ -305,7 +305,7 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
if (RTCD1.callback != NULL) {
uint32_t cr = RTCD1.rtc->CR;
- uint32_t tafcr = RTCD1.rtc->TAFCR;
+ uint32_t tcr;
#if defined(RTC_ISR_WUTF)
if (((cr & RTC_CR_WUTIE) != 0U) && ((isr & RTC_ISR_WUTF) != 0U)) {
@@ -333,7 +333,11 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
}
}
- if ((tafcr & RTC_TAFCR_TAMPIE) != 0U) {
+ /* This part is different depending on if the RTC has a TAMPCR or TAFCR
+ register.*/
+#if defined(RTC_TAFCR_TAMP1E)
+ tcr = RTCD1.rtc->TAFCR;
+ if ((tcr & RTC_TAFCR_TAMPIE) != 0U) {
#if defined(RTC_ISR_TAMP1F)
if ((isr & RTC_ISR_TAMP1F) != 0U) {
RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);
@@ -345,6 +349,28 @@ OSAL_IRQ_HANDLER(STM32_RTC_COMMON_HANDLER) {
}
#endif
}
+
+#else /* !defined(RTC_TAFCR_TAMP1E) */
+ tcr = RTCD1.rtc->TAMPCR;
+#if defined(RTC_ISR_TAMP1F)
+ if (((tcr & RTC_TAMPCR_TAMP1IE) != 0U) &&
+ ((isr & RTC_ISR_TAMP1F) != 0U)) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP1);
+ }
+#endif
+#if defined(RTC_ISR_TAMP2F)
+ if (((tcr & RTC_TAMPCR_TAMP2IE) != 0U) &&
+ ((isr & RTC_ISR_TAMP2F) != 0U)) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP2);
+ }
+#endif
+#if defined(RTC_ISR_TAMP3F)
+ if (((tcr & RTC_TAMPCR_TAMP3IE) != 0U) &&
+ ((isr & RTC_ISR_TAMP3F) != 0U)) {
+ RTCD1.callback(&RTCD1, RTC_EVENT_TAMP3);
+ }
+#endif
+#endif /* !defined(RTC_TAFCR_TAMP1E) */
}
OSAL_IRQ_EPILOGUE();
diff --git a/os/hal/ports/STM32/STM32L0xx/hal_lld.h b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
index a2d02e063..068a8f978 100644
--- a/os/hal/ports/STM32/STM32L0xx/hal_lld.h
+++ b/os/hal/ports/STM32/STM32L0xx/hal_lld.h
@@ -1197,6 +1197,7 @@
#include "cache.h"
#include "stm32_isr.h"
#include "stm32_dma.h"
+#include "stm32_exti.h"
#include "stm32_rcc.h"
#ifdef __cplusplus
diff --git a/os/hal/ports/STM32/STM32L0xx/platform.mk b/os/hal/ports/STM32/STM32L0xx/platform.mk
index ab98cb1f2..204462468 100644
--- a/os/hal/ports/STM32/STM32L0xx/platform.mk
+++ b/os/hal/ports/STM32/STM32L0xx/platform.mk
@@ -25,6 +25,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/ADCv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/DMAv1/driver.mk
+include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
index f3ea21b41..113a0264e 100644
--- a/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32L0xx/stm32_registry.h
@@ -33,6 +33,28 @@
* @name STM32L0xx capabilities
* @{
*/
+
+/*===========================================================================*/
+/* Common. */
+/*===========================================================================*/
+
+/* RNG attributes.*/
+#define STM32_HAS_RNG1 TRUE
+
+/* RTC attributes.*/
+#define STM32_HAS_RTC TRUE
+#define STM32_RTC_HAS_SUBSECONDS TRUE
+#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
+#define STM32_RTC_NUM_ALARMS 2
+#define STM32_RTC_STORAGE_SIZE 20
+#define STM32_RTC_COMMON_HANDLER Vector48
+#define STM32_RTC_COMMON_NUMBER 2
+#define STM32_RTC_ALARM_EXTI 17
+#define STM32_RTC_TAMP_STAMP_EXTI 19
+#define STM32_RTC_WKUP_EXTI 20
+#define STM32_RTC_IRQ_ENABLE() \
+ nvicEnableVector(STM32_RTC_COMMON_NUMBER, STM32_IRQ_EXTI17_20_PRIORITY)
+
/*===========================================================================*/
/* STM32L011xx. */
/*===========================================================================*/
@@ -96,7 +118,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -146,13 +168,6 @@
/* QUADSPI attributes.*/
#define STM32_HAS_QUADSPI1 FALSE
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -314,7 +329,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -362,13 +377,6 @@
#define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -535,7 +543,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -591,13 +599,6 @@
#define STM32_HAS_I2C3 FALSE
#define STM32_HAS_I2C4 FALSE
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -790,7 +791,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -845,13 +846,6 @@
#define STM32_HAS_I2C3 FALSE
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1049,7 +1043,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -1104,13 +1098,6 @@
#define STM32_HAS_I2C3 FALSE
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1310,7 +1297,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -1374,13 +1361,6 @@
STM32_DMA_STREAM_ID_MSK(1, 6))
#define STM32_I2C3_TX_DMA_CHN 0x0E0E0000
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
@@ -1607,7 +1587,7 @@
/* EXTI attributes.*/
#define STM32_EXTI_NUM_LINES 23
-#define STM32_EXTI_IMR_MASK 0xFF840000U
+#define STM32_EXTI_IMR1_MASK 0xFF840000U
#define STM32_EXTI_LINE01_HANDLER Vector54
#define STM32_EXTI_LINE23_HANDLER Vector58
@@ -1671,13 +1651,6 @@
STM32_DMA_STREAM_ID_MSK(1, 6))
#define STM32_I2C3_TX_DMA_CHN 0x0E0E0000
-/* RTC attributes.*/
-#define STM32_HAS_RTC TRUE
-#define STM32_RTC_HAS_SUBSECONDS TRUE
-#define STM32_RTC_HAS_PERIODIC_WAKEUPS TRUE
-#define STM32_RTC_NUM_ALARMS 2
-#define STM32_RTC_HAS_INTERRUPTS FALSE
-
/* SDIO attributes.*/
#define STM32_HAS_SDIO FALSE
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-01 19:23:46 +0000