diff options
Diffstat (limited to 'os/hal/ports')
| -rw-r--r-- | os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h | 9 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h | 15 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c | 2 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c | 14 |
4 files changed, 26 insertions, 14 deletions
diff --git a/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h b/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h index 399112cd8..ad0f62836 100644 --- a/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h +++ b/os/hal/ports/STM32/LLD/DMAv1/stm32_dma.h @@ -32,8 +32,15 @@ /*===========================================================================*/
/**
+ * @brief DMA capability.
+ * @details if @p TRUE then the DMA is able of burst transfers, FIFOs,
+ * scatter gather and other advanced features.
+ */
+#define STM32_DMA_ADVANCED FALSE
+
+/**
* @brief Total number of DMA streams.
- * @note This is the total number of streams among all the DMA units.
+ * @details This is the total number of streams among all the DMA units.
*/
#define STM32_DMA_STREAMS (STM32_DMA1_NUM_CHANNELS + \
STM32_DMA2_NUM_CHANNELS)
diff --git a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h index 7f7b5a1dc..d2053ad0e 100644 --- a/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h +++ b/os/hal/ports/STM32/LLD/DMAv2/stm32_dma.h @@ -30,8 +30,15 @@ /*===========================================================================*/
/**
+ * @brief DMA capability.
+ * @details if @p TRUE then the DMA is able of burst transfers, FIFOs,
+ * scatter gather and other advanced features.
+ */
+#define STM32_DMA_ADVANCED TRUE
+
+/**
* @brief Total number of DMA streams.
- * @note This is the total number of streams among all the DMA units.
+ * @details This is the total number of streams among all the DMA units.
*/
#define STM32_DMA_STREAMS 16U
@@ -635,9 +642,11 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); * @param[in] dmastp pointer to a stm32_dma_stream_t structure
*/
#define dmaWaitCompletion(dmastp) { \
- while ((dmastp)->stream->NDTR > 0U) \
+ (dmastp)->stream->CR &= ~(STM32_DMA_CR_TCIE | STM32_DMA_CR_HTIE | \
+ STM32_DMA_CR_TEIE | STM32_DMA_CR_DMEIE); \
+ while ((dmastp)->stream->CR & STM32_DMA_CR_EN) \
; \
- dmaStreamDisable(dmastp); \
+ dmaStreamClearInterrupt(dmastp); \
}
/** @} */
diff --git a/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c b/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c index cdc4934e9..53062b6a6 100644 --- a/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDIOv1/sdc_lld.c @@ -234,7 +234,7 @@ static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, /*while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
dmaStreamClearInterrupt(sdcp->dma);*/
#else
- /* Waits for transfer completion at DMA level, the the stream is
+ /* Waits for transfer completion at DMA level, then the stream is
disabled and cleared.*/
dmaWaitCompletion(sdcp->dma);
diff --git a/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c b/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c index 768258303..386e23b4c 100644 --- a/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c +++ b/os/hal/ports/STM32/LLD/SDMMCv1/sdc_lld.c @@ -248,12 +248,9 @@ static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, return HAL_FAILED;
}
- /* Wait until DMA channel enabled to be sure that all data transferred.*/
- while (sdcp->dma->stream->CR & STM32_DMA_CR_EN)
- ;
-
- /* DMA event flags must be manually cleared.*/
- dmaStreamClearInterrupt(sdcp->dma);
+ /* Waits for transfer completion at DMA level, then the stream is
+ disabled and cleared.*/
+ dmaWaitCompletion(sdcp->dma);
sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
sdcp->sdmmc->DCTRL = 0;
@@ -309,7 +306,6 @@ static void sdc_lld_error_cleanup(SDCDriver *sdcp, uint32_t *resp) {
uint32_t sta = sdcp->sdmmc->STA;
- dmaStreamClearInterrupt(sdcp->dma);
dmaStreamDisable(sdcp->dma);
sdcp->sdmmc->ICR = SDMMC_ICR_ALL_FLAGS;
sdcp->sdmmc->MASK = 0;
@@ -389,7 +385,7 @@ void sdc_lld_start(SDCDriver *sdcp) { STM32_DMA_CR_MSIZE_WORD |
STM32_DMA_CR_MINC;
-#if 1
+#if STM32_DMA_ADVANCED
sdcp->dmamode |= STM32_DMA_CR_PFCTRL |
STM32_DMA_CR_PBURST_INCR4 |
STM32_DMA_CR_MBURST_INCR4;
@@ -401,7 +397,7 @@ void sdc_lld_start(SDCDriver *sdcp) { b = dmaStreamAllocate(sdcp->dma, STM32_SDC_SDMMC1_IRQ_PRIORITY, NULL, NULL);
osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(sdcp->dma, &sdcp->sdmmc->FIFO);
-#if 1
+#if STM32_DMA_ADVANCED
dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
#endif
nvicEnableVector(STM32_SDMMC1_NUMBER, STM32_SDC_SDMMC1_IRQ_PRIORITY);
|