diff options
Diffstat (limited to 'os/hal/ports/STM32/STM32L1xx/stm32_rcc.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32L1xx/stm32_rcc.h | 128 |
1 files changed, 33 insertions, 95 deletions
diff --git a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h index 55ef32535..989735afd 100644 --- a/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L1xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{
*/
-#ifndef _STM32_RCC_
-#define _STM32_RCC_
+#ifndef STM32_RCC_H
+#define STM32_RCC_H
/*===========================================================================*/
/* Driver constants. */
@@ -69,14 +69,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus.
*
* @param[in] mask APB1 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB1(mask, lp) { \
+#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
- if (lp) \
- RCC->APB1LPENR &= ~(mask); \
+ RCC->APB1LPENR &= ~(mask); \
}
/**
@@ -109,14 +107,12 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus.
*
* @param[in] mask APB2 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB2(mask, lp) { \
+#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
- if (lp) \
- RCC->APB2LPENR &= ~(mask); \
+ RCC->APB2LPENR &= ~(mask); \
}
/**
@@ -149,14 +145,12 @@ * @brief Disables the clock of one or more peripheral on the AHB bus.
*
* @param[in] mask AHB peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAHB(mask, lp) { \
+#define rccDisableAHB(mask) { \
RCC->AHBENR &= ~(mask); \
- if (lp) \
- RCC->AHBLPENR &= ~(mask); \
+ RCC->AHBLPENR &= ~(mask); \
}
/**
@@ -188,11 +182,9 @@ /**
* @brief Disables the ADC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp)
+#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN)
/**
* @brief Resets the ADC1 peripheral.
@@ -218,11 +210,9 @@ /**
* @brief Disables the DAC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp)
+#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN)
/**
* @brief Resets the DAC1 peripheral.
@@ -248,11 +238,9 @@ /**
* @brief Disables the DMA1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp)
+#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN)
/**
* @brief Resets the DMA1 peripheral.
@@ -273,11 +261,9 @@ /**
* @brief Disables the DMA2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHBENR_DMA2EN, lp)
+#define rccDisableDMA2() rccDisableAHB(RCC_AHBENR_DMA2EN)
/**
* @brief Resets the DMA2 peripheral.
@@ -293,7 +279,6 @@ */
/**
* @brief Enables the PWR interface clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -303,13 +288,10 @@ /**
* @brief Disables PWR interface clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp)
+#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN)
/**
* @brief Resets the PWR interface.
@@ -335,11 +317,9 @@ /**
* @brief Disables the I2C1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp)
+#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN)
/**
* @brief Resets the I2C1 peripheral.
@@ -360,11 +340,9 @@ /**
* @brief Disables the I2C2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp)
+#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN)
/**
* @brief Resets the I2C2 peripheral.
@@ -390,11 +368,9 @@ /**
* @brief Disables the SPI1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp)
+#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN)
/**
* @brief Resets the SPI1 peripheral.
@@ -415,11 +391,9 @@ /**
* @brief Disables the SPI2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp)
+#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN)
/**
* @brief Resets the SPI2 peripheral.
@@ -445,11 +419,9 @@ /**
* @brief Disables the TIM2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp)
+#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN)
/**
* @brief Resets the TIM2 peripheral.
@@ -470,11 +442,9 @@ /**
* @brief Disables the TIM3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM3(lp) rccDisableAPB1(RCC_APB1ENR_TIM3EN, lp)
+#define rccDisableTIM3() rccDisableAPB1(RCC_APB1ENR_TIM3EN)
/**
* @brief Resets the TIM3 peripheral.
@@ -495,11 +465,9 @@ /**
* @brief Disables the TIM4 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM4(lp) rccDisableAPB1(RCC_APB1ENR_TIM4EN, lp)
+#define rccDisableTIM4() rccDisableAPB1(RCC_APB1ENR_TIM4EN)
/**
* @brief Resets the TIM4 peripheral.
@@ -520,11 +488,9 @@ /**
* @brief Disables the TIM5 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM5(lp) rccDisableAPB1(RCC_APB1ENR_TIM5EN, lp)
+#define rccDisableTIM5() rccDisableAPB1(RCC_APB1ENR_TIM5EN)
/**
* @brief Resets the TIM5 peripheral.
@@ -545,11 +511,9 @@ /**
* @brief Disables the TIM6 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp)
+#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN)
/**
* @brief Resets the TIM6 peripheral.
@@ -570,11 +534,9 @@ /**
* @brief Disables the TIM7 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp)
+#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN)
/**
* @brief Resets the TIM7 peripheral.
@@ -585,7 +547,6 @@ /**
* @brief Enables the TIM9 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -595,13 +556,10 @@ /**
* @brief Disables the TIM9 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
+#define rccDisableTIM9() rccDisableAPB2(RCC_APB2ENR_TIM9EN)
/**
* @brief Resets the TIM9 peripheral.
@@ -612,7 +570,6 @@ /**
* @brief Enables the TIM10 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -622,13 +579,10 @@ /**
* @brief Disables the TIM10 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp)
+#define rccDisableTIM10() rccDisableAPB2(RCC_APB2ENR_TIM10EN)
/**
* @brief Resets the TIM10 peripheral.
@@ -639,7 +593,6 @@ /**
* @brief Enables the TIM10 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
*
@@ -649,13 +602,10 @@ /**
* @brief Disables the TIM11 peripheral clock.
- * @note The @p lp parameter is ignored in this family.
- *
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp)
+#define rccDisableTIM11() rccDisableAPB2(RCC_APB2ENR_TIM11EN)
/**
* @brief Resets the TIM11 peripheral.
@@ -682,11 +632,9 @@ /**
* @brief Disables the USART1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp)
+#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN)
/**
* @brief Resets the USART1 peripheral.
@@ -707,11 +655,9 @@ /**
* @brief Disables the USART2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp)
+#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN)
/**
* @brief Resets the USART2 peripheral.
@@ -732,11 +678,9 @@ /**
* @brief Disables the USART3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
+#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN)
/**
* @brief Resets the USART3 peripheral.
@@ -757,11 +701,9 @@ /**
* @brief Disables the UART4 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_UART4EN, lp)
+#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_UART4EN)
/**
* @brief Resets the UART4 peripheral.
@@ -782,11 +724,9 @@ /**
* @brief Disables the UART5 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_UART5EN, lp)
+#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_UART5EN)
/**
* @brief Resets the UART5 peripheral.
@@ -812,11 +752,9 @@ /**
* @brief Disables the USB peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp)
+#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN)
/**
* @brief Resets the USB peripheral.
@@ -837,6 +775,6 @@ extern "C" { }
#endif
-#endif /* _STM32_RCC_ */
+#endif /* STM32_RCC_H */
/** @} */
|