diff options
Diffstat (limited to 'os/hal/ports/STM32/STM32L0xx/stm32_rcc.h')
| -rw-r--r-- | os/hal/ports/STM32/STM32L0xx/stm32_rcc.h | 114 |
1 files changed, 32 insertions, 82 deletions
diff --git a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h index ff76739dd..01283be58 100644 --- a/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32L0xx/stm32_rcc.h @@ -24,8 +24,8 @@ * @{
*/
-#ifndef _STM32_RCC_
-#define _STM32_RCC_
+#ifndef STM32_RCC_H
+#define STM32_RCC_H
/*===========================================================================*/
/* Driver constants. */
@@ -69,14 +69,12 @@ * @brief Disables the clock of one or more peripheral on the APB1 bus.
*
* @param[in] mask APB1 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB1(mask, lp) { \
+#define rccDisableAPB1(mask) { \
RCC->APB1ENR &= ~(mask); \
- if (lp) \
- RCC->APB1SMENR &= ~(mask); \
+ RCC->APB1SMENR &= ~(mask); \
}
/**
@@ -109,14 +107,12 @@ * @brief Disables the clock of one or more peripheral on the APB2 bus.
*
* @param[in] mask APB2 peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAPB2(mask, lp) { \
+#define rccDisableAPB2(mask) { \
RCC->APB2ENR &= ~(mask); \
- if (lp) \
- RCC->APB2SMENR &= ~(mask); \
+ RCC->APB2SMENR &= ~(mask); \
}
/**
@@ -149,14 +145,12 @@ * @brief Disables the clock of one or more peripheral on the AHB bus.
*
* @param[in] mask AHB peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableAHB(mask, lp) { \
+#define rccDisableAHB(mask) { \
RCC->AHBENR &= ~(mask); \
- if (lp) \
- RCC->AHBSMENR &= ~(mask); \
+ RCC->AHBSMENR &= ~(mask); \
}
/**
@@ -189,14 +183,12 @@ * @brief Disables the clock of one or more peripheral on the IOP bus.
*
* @param[in] mask IOP peripherals mask
- * @param[in] lp low power enable flag
*
* @api
*/
-#define rccDisableIOP(mask, lp) { \
+#define rccDisableIOP(mask) { \
RCC->IOPENR &= ~(mask); \
- if (lp) \
- RCC->IOPSMENR &= ~(mask); \
+ RCC->IOPSMENR &= ~(mask); \
}
/**
@@ -228,11 +220,9 @@ /**
* @brief Disables the ADC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableADC1(lp) rccDisableAPB2(RCC_APB2ENR_ADC1EN, lp)
+#define rccDisableADC1() rccDisableAPB2(RCC_APB2ENR_ADC1EN)
/**
* @brief Resets the ADC1 peripheral.
@@ -258,11 +248,9 @@ /**
* @brief Disables the DAC1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDAC1(lp) rccDisableAPB1(RCC_APB1ENR_DACEN, lp)
+#define rccDisableDAC1() rccDisableAPB1(RCC_APB1ENR_DACEN)
/**
* @brief Resets the DAC1 peripheral.
@@ -288,11 +276,9 @@ /**
* @brief Disables the DMA1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHBENR_DMA1EN, lp)
+#define rccDisableDMA1() rccDisableAHB(RCC_AHBENR_DMA1EN)
/**
* @brief Resets the DMA1 peripheral.
@@ -318,11 +304,9 @@ /**
* @brief Disables PWR interface clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisablePWRInterface(lp) rccDisableAPB1(RCC_APB1ENR_PWREN, lp)
+#define rccDisablePWRInterface() rccDisableAPB1(RCC_APB1ENR_PWREN)
/**
* @brief Resets the PWR interface.
@@ -348,11 +332,9 @@ /**
* @brief Disables the I2C1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C1(lp) rccDisableAPB1(RCC_APB1ENR_I2C1EN, lp)
+#define rccDisableI2C1() rccDisableAPB1(RCC_APB1ENR_I2C1EN)
/**
* @brief Resets the I2C1 peripheral.
@@ -373,11 +355,9 @@ /**
* @brief Disables the I2C2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C2(lp) rccDisableAPB1(RCC_APB1ENR_I2C2EN, lp)
+#define rccDisableI2C2() rccDisableAPB1(RCC_APB1ENR_I2C2EN)
/**
* @brief Resets the I2C2 peripheral.
@@ -398,11 +378,9 @@ /**
* @brief Disables the I2C3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableI2C3(lp) rccDisableAPB1(RCC_APB1ENR_I2C3EN, lp)
+#define rccDisableI2C3() rccDisableAPB1(RCC_APB1ENR_I2C3EN)
/**
* @brief Resets the I2C3 peripheral.
@@ -428,11 +406,9 @@ /**
* @brief Disables the SPI1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI1(lp) rccDisableAPB2(RCC_APB2ENR_SPI1EN, lp)
+#define rccDisableSPI1() rccDisableAPB2(RCC_APB2ENR_SPI1EN)
/**
* @brief Resets the SPI1 peripheral.
@@ -453,11 +429,9 @@ /**
* @brief Disables the SPI2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableSPI2(lp) rccDisableAPB1(RCC_APB1ENR_SPI2EN, lp)
+#define rccDisableSPI2() rccDisableAPB1(RCC_APB1ENR_SPI2EN)
/**
* @brief Resets the SPI2 peripheral.
@@ -483,11 +457,9 @@ /**
* @brief Disables the TIM2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM2(lp) rccDisableAPB1(RCC_APB1ENR_TIM2EN, lp)
+#define rccDisableTIM2() rccDisableAPB1(RCC_APB1ENR_TIM2EN)
/**
* @brief Resets the TIM2 peripheral.
@@ -508,11 +480,9 @@ /**
* @brief Disables the TIM6 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM6(lp) rccDisableAPB1(RCC_APB1ENR_TIM6EN, lp)
+#define rccDisableTIM6() rccDisableAPB1(RCC_APB1ENR_TIM6EN)
/**
* @brief Resets the TIM6 peripheral.
@@ -533,11 +503,9 @@ /**
* @brief Disables the TIM7 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM7(lp) rccDisableAPB1(RCC_APB1ENR_TIM7EN, lp)
+#define rccDisableTIM7() rccDisableAPB1(RCC_APB1ENR_TIM7EN)
/**
* @brief Resets the TIM7 peripheral.
@@ -558,11 +526,9 @@ /**
* @brief Disables the TIM21 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM21(lp) rccDisableAPB2(RCC_APB2ENR_TIM21EN, lp)
+#define rccDisableTIM21() rccDisableAPB2(RCC_APB2ENR_TIM21EN)
/**
* @brief Resets the TIM21 peripheral.
@@ -583,11 +549,9 @@ /**
* @brief Disables the TIM22 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableTIM22(lp) rccDisableAPB2(RCC_APB2ENR_TIM22EN, lp)
+#define rccDisableTIM22() rccDisableAPB2(RCC_APB2ENR_TIM22EN)
/**
* @brief Resets the TIM22 peripheral.
@@ -613,11 +577,9 @@ /**
* @brief Disables the USART1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART1(lp) rccDisableAPB2(RCC_APB2ENR_USART1EN, lp)
+#define rccDisableUSART1() rccDisableAPB2(RCC_APB2ENR_USART1EN)
/**
* @brief Resets the USART1 peripheral.
@@ -638,11 +600,9 @@ /**
* @brief Disables the USART2 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART2(lp) rccDisableAPB1(RCC_APB1ENR_USART2EN, lp)
+#define rccDisableUSART2() rccDisableAPB1(RCC_APB1ENR_USART2EN)
/**
* @brief Resets the USART2 peripheral.
@@ -663,11 +623,9 @@ /**
* @brief Disables the USART3 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSART3(lp) rccDisableAPB1(RCC_APB1ENR_USART3EN, lp)
+#define rccDisableUSART3() rccDisableAPB1(RCC_APB1ENR_USART3EN)
/**
* @brief Resets the USART3 peripheral.
@@ -688,11 +646,9 @@ /**
* @brief Disables the UART4 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUART4(lp) rccDisableAPB1(RCC_APB1ENR_USART4EN, lp)
+#define rccDisableUART4() rccDisableAPB1(RCC_APB1ENR_USART4EN)
/**
* @brief Resets the UART4 peripheral.
@@ -713,11 +669,9 @@ /**
* @brief Disables the UART5 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUART5(lp) rccDisableAPB1(RCC_APB1ENR_USART5EN, lp)
+#define rccDisableUART5() rccDisableAPB1(RCC_APB1ENR_USART5EN)
/**
* @brief Resets the UART5 peripheral.
@@ -738,11 +692,9 @@ /**
* @brief Disables the LPUART1 peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableLPUART1(lp) rccDisableAPB1(RCC_APB1ENR_LPUART1EN, lp)
+#define rccDisableLPUART1() rccDisableAPB1(RCC_APB1ENR_LPUART1EN)
/**
* @brief Resets the USART1 peripheral.
@@ -768,11 +720,9 @@ /**
* @brief Disables the USB peripheral clock.
*
- * @param[in] lp low power enable flag
- *
* @api
*/
-#define rccDisableUSB(lp) rccDisableAPB1(RCC_APB1ENR_USBEN, lp)
+#define rccDisableUSB() rccDisableAPB1(RCC_APB1ENR_USBEN)
/**
* @brief Resets the USB peripheral.
@@ -793,6 +743,6 @@ extern "C" { }
#endif
-#endif /* _STM32_RCC_ */
+#endif /* STM32_RCC_H */
/** @} */
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